TWI371095B - Semiconductor device and method of manufacturing the same - Google Patents
Semiconductor device and method of manufacturing the sameInfo
- Publication number
- TWI371095B TWI371095B TW096144880A TW96144880A TWI371095B TW I371095 B TWI371095 B TW I371095B TW 096144880 A TW096144880 A TW 096144880A TW 96144880 A TW96144880 A TW 96144880A TW I371095 B TWI371095 B TW I371095B
- Authority
- TW
- Taiwan
- Prior art keywords
- manufacturing
- same
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01L2924/097—Glass-ceramics, e.g. devitrified glass
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/181—Encapsulation
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2006319910A JP4305502B2 (ja) | 2006-11-28 | 2006-11-28 | 半導体装置の製造方法 |
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TW200832649A TW200832649A (en) | 2008-08-01 |
TWI371095B true TWI371095B (en) | 2012-08-21 |
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TW096144880A TWI371095B (en) | 2006-11-28 | 2007-11-27 | Semiconductor device and method of manufacturing the same |
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US (1) | US7790515B2 (zh) |
JP (1) | JP4305502B2 (zh) |
KR (1) | KR100930156B1 (zh) |
CN (1) | CN101192587B (zh) |
TW (1) | TWI371095B (zh) |
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JP4596053B2 (ja) * | 2008-07-22 | 2010-12-08 | カシオ計算機株式会社 | 半導体装置の製造方法および半導体構成体組立体 |
TWI420622B (zh) * | 2008-11-07 | 2013-12-21 | Unimicron Technology Corp | 嵌埋半導體元件之封裝結構及其製法 |
US8474824B2 (en) * | 2008-11-10 | 2013-07-02 | Eaton Corporation | Pressure sensing module having an integrated seal plate and method of assembling pressure sensing module |
JP4972633B2 (ja) | 2008-12-11 | 2012-07-11 | 日東電工株式会社 | 半導体装置の製造方法 |
CN102047404B (zh) | 2008-12-16 | 2013-07-10 | 松下电器产业株式会社 | 半导体装置和倒装芯片安装方法及倒装芯片安装装置 |
US9355962B2 (en) * | 2009-06-12 | 2016-05-31 | Stats Chippac Ltd. | Integrated circuit package stacking system with redistribution and method of manufacture thereof |
JP5563814B2 (ja) * | 2009-12-18 | 2014-07-30 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
CN103378044A (zh) * | 2012-04-25 | 2013-10-30 | 鸿富锦精密工业(深圳)有限公司 | 芯片组装结构及芯片组装方法 |
JP6292236B2 (ja) * | 2013-08-13 | 2018-03-14 | 株式会社村田製作所 | 複合電子部品 |
JP6524526B2 (ja) * | 2015-09-11 | 2019-06-05 | 大口マテリアル株式会社 | 半導体素子実装用基板及び半導体装置、並びにそれらの製造方法 |
US9896330B2 (en) | 2016-01-13 | 2018-02-20 | Texas Instruments Incorporated | Structure and method for packaging stress-sensitive micro-electro-mechanical system stacked onto electronic circuit chip |
US10734350B2 (en) * | 2016-05-09 | 2020-08-04 | Hitachi Chemical Company, Ltd. | Method for manufacturing semiconductor device |
KR102039710B1 (ko) * | 2017-10-19 | 2019-11-01 | 삼성전자주식회사 | 유기 인터포저를 포함하는 반도체 패키지 |
US10861741B2 (en) | 2017-11-27 | 2020-12-08 | Texas Instruments Incorporated | Electronic package for integrated circuits and related methods |
US11538767B2 (en) | 2017-12-29 | 2022-12-27 | Texas Instruments Incorporated | Integrated circuit package with partitioning based on environmental sensitivity |
CN116525555A (zh) * | 2022-01-20 | 2023-08-01 | 长鑫存储技术有限公司 | 一种半导体封装结构及其制备方法 |
Family Cites Families (15)
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JP2781019B2 (ja) | 1989-09-06 | 1998-07-30 | 新光電気工業株式会社 | 半導体装置およびその製造方法 |
JP3316532B2 (ja) | 1995-07-19 | 2002-08-19 | カシオ計算機株式会社 | 半導体装置及びその製造方法 |
CN101232778B (zh) * | 1999-09-02 | 2011-12-28 | 揖斐电株式会社 | 印刷布线板 |
JP4480108B2 (ja) | 2000-06-02 | 2010-06-16 | 大日本印刷株式会社 | 半導体装置の作製方法 |
EP1207555A1 (en) | 2000-11-16 | 2002-05-22 | Texas Instruments Incorporated | Flip-chip on film assembly for ball grid array packages |
TW511405B (en) * | 2000-12-27 | 2002-11-21 | Matsushita Electric Ind Co Ltd | Device built-in module and manufacturing method thereof |
JP4040389B2 (ja) | 2001-09-27 | 2008-01-30 | 大日本印刷株式会社 | 半導体装置の製造方法 |
JP4392157B2 (ja) | 2001-10-26 | 2009-12-24 | パナソニック電工株式会社 | 配線板用シート材及びその製造方法、並びに多層板及びその製造方法 |
JP3632960B2 (ja) | 2001-11-27 | 2005-03-30 | 京セラ株式会社 | 半導体装置 |
JP3666591B2 (ja) | 2002-02-01 | 2005-06-29 | 株式会社トッパンNecサーキットソリューションズ | 半導体チップ搭載用基板の製造方法 |
JP3741670B2 (ja) | 2002-05-14 | 2006-02-01 | 新日本無線株式会社 | 半導体装置の製造方法 |
JP4298559B2 (ja) * | 2004-03-29 | 2009-07-22 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
JP3925809B2 (ja) * | 2004-03-31 | 2007-06-06 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
JP2006059992A (ja) * | 2004-08-19 | 2006-03-02 | Shinko Electric Ind Co Ltd | 電子部品内蔵基板の製造方法 |
US7456493B2 (en) | 2005-04-15 | 2008-11-25 | Alps Electric Co., Ltd. | Structure for mounting semiconductor part in which bump and land portion are hardly detached from each other and method of manufacturing mounting substrate used therein |
-
2006
- 2006-11-28 JP JP2006319910A patent/JP4305502B2/ja not_active Expired - Fee Related
-
2007
- 2007-11-26 US US11/986,698 patent/US7790515B2/en not_active Expired - Fee Related
- 2007-11-27 KR KR1020070121487A patent/KR100930156B1/ko active IP Right Grant
- 2007-11-27 TW TW096144880A patent/TWI371095B/zh not_active IP Right Cessation
- 2007-11-28 CN CN2007101928794A patent/CN101192587B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
KR20080048411A (ko) | 2008-06-02 |
JP4305502B2 (ja) | 2009-07-29 |
TW200832649A (en) | 2008-08-01 |
US20080122087A1 (en) | 2008-05-29 |
US7790515B2 (en) | 2010-09-07 |
JP2008135521A (ja) | 2008-06-12 |
KR100930156B1 (ko) | 2009-12-07 |
CN101192587A (zh) | 2008-06-04 |
CN101192587B (zh) | 2011-01-19 |
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