TWI326192B - Circuit board and method for managing quality thereof - Google Patents

Circuit board and method for managing quality thereof Download PDF

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Publication number
TWI326192B
TWI326192B TW95124647A TW95124647A TWI326192B TW I326192 B TWI326192 B TW I326192B TW 95124647 A TW95124647 A TW 95124647A TW 95124647 A TW95124647 A TW 95124647A TW I326192 B TWI326192 B TW I326192B
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Taiwan
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circuit board
pattern
substrate
cutting
identification
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TW95124647A
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Chinese (zh)
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TW200806096A (en
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Cheng Po Yu
Chi Min Chang
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Unimicron Technology Corp
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1326192 . 19854twf.doc/g 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種電路板及其品質的管理方法,且 特別是有關於一種具有辨識圖樣的電路板及其品質的管理 方法。 【先前技術】1326192 . 19854twf.doc/g IX. Description of the Invention: [Technical Field] The present invention relates to a circuit board and a quality management method thereof, and more particularly to a circuit board having an identification pattern and its quality Management method. [Prior Art]

在科技持續進步的現代生活中,3C電子產品充滿人們 的生活中。這些電子產品隨著時代潮流不停的改進,並朝 著輕、薄、短、小的趨勢演變。當人們對電子產品的需求 曰漸增加時,電子產品週邊的諸多構件也跟著大量生產, 其中電路板(circuit board)便是不可或缺的構件之一。 一般而言,習知技術是在一面積較大的基板上,視產 品設計的需求來進行相對應的線路層的製程,以形成一塊 具有線路層的平板(panel)。其中平板上劃分有多個面積較 板(rip) ’且每個條板上皆具有各自的圖案化線路。 行切割,以得到多個彼此分 ^的條板,之後將处條板供應給_製 在現今的電路板生產過程告由 分的可觀。以台灣生產手機電:’面產3 產量高達百萬片,甚至是數百萬:的知名廠商為例,其月 下,習知技術通常會對這些用」。在②麼龐大的生產量 是條板進行檢測,以確定生產產手機電路板的平板或 良率是否符合標準。 &平板或是條板之製程的 19854twf.doc/g 因此’如何建立—奎雷 生產過程中品質管理、進^ ‘的品質管理方法’來作為 程“== = 【=容Γ鳴所亟欲達成的目標。 板的=的是提供-種電路板,以有效地掌控電路 法,月么f —目的是提供-種電路板品質的管理方 行加工。4板的加卫過財繼續對有喊的部分進 括-:上ίί::他目的’本發明提出-種電路板,包 述之線路線路圖案以及相對應的一辨識圖案,上 用以代及顺圖案皆位於基板上,其巾辨識圖案 圖案形紐製程的檢驗結果。 字、數字之一實施例中,上述之辨識圖案選自於文 在 付號及其組合所構成的族群JL中之一。 區域,之-實闕巾,上述之基板具有-第一切割 在本、\圖案與辨識圖案皆位於第一切割區域内。 切割線。實關中’上述之電路板更包括一第一 輪廓排列。二切割線位於基板上,並且沿著第一切割區的 多個第^月之—實施例中,上述之第一切割區域内具有 在本1副區域,且辨識圖案位於第二切割區域外。 ^明之一實施例中’上述之第二切割區域的排列 1326192 · 19854twf.doc/g 方式為陣列排列。 一在本發明之一實施例中,上述之電路板更包括多條第 二切割線,上述之第二切割線位於基板上,且沿 二 割區域的輪廓排列。 乐一切 在本發明之一實施例中,上述之辨識圖案的材質是 上述之辨識圖案是適於受一In the modern life of continuous technological advancement, 3C electronic products are full of people's lives. These electronic products have been continuously improved with the trend of the times, and have evolved toward a light, thin, short, and small trend. When the demand for electronic products is increasing, many components around the electronic products are also mass-produced, and circuit boards are one of the indispensable components. In general, the prior art is to perform a corresponding circuit layer process on a larger substrate, depending on the design requirements of the product, to form a panel having a wiring layer. The flat plate is divided into a plurality of area rips and each of the strips has a respective patterned line. Row cutting to obtain a plurality of strips that are separated from each other, and then supplying the strips to the system in the current production process of the board is considerable. Producing mobile phone power in Taiwan: The production of a large number of well-known manufacturers with a production capacity of up to a million or even millions: in the past, traditional technology usually uses these. In 2 large production volumes, strips are tested to determine if the flat or yield of the production cell phone board is up to standard. & slab or strip process of the process of 19854twf.doc / g Therefore 'how to establish - quality management in the production process of Qurei, the quality management method of 'to' as a process" == = [= Rong Yiming 亟The goal to be achieved. The board = is to provide - a kind of circuit board, in order to effectively control the circuit method, the month f - the purpose is to provide a kind of management of the board quality management. 4 board of the defender continues to The shouting part includes -: ίί:: his purpose 'the present invention proposes a circuit board, the circuit line pattern and the corresponding identification pattern, and the upper and lower patterns are located on the substrate, The invention recognizes the test result of the pattern pattern forming process. In one embodiment of the word and the number, the above identification pattern is selected from one of the group JLs composed of the text and the combination thereof. The substrate has a first-cut, a pattern, and an identification pattern in the first cutting area. The cutting line. The circuit board of the above-mentioned circuit board further includes a first contour arrangement. The two cutting lines are located on the substrate. And along the first cutting area In the first embodiment, the first cutting area has the first sub-area, and the identification pattern is located outside the second cutting area. In one embodiment, the arrangement of the second cutting area is 1326092. The 19854 twf.doc/g mode is an array arrangement. In an embodiment of the invention, the circuit board further includes a plurality of second cutting lines, wherein the second cutting line is located on the substrate and along the two-cut area In one embodiment of the present invention, the material of the identification pattern is that the identification pattern is suitable for receiving one

在本發明之一實施例中 辨識系統辨識的圖樣。 本發明提出一種電路板品質的管理方法,首先提供一 電路板,電路板包括一基板、一線路圖案以及一辨識圖案, 「中線路圖案與辨識圖案位於該基板上。接著對線路圖案 進行一檢驗步驟,以得到一檢驗結果。之後將檢驗結果儲 存於一資料儲存單元。爾後再辨識上述之辨識圖案,並且 依據辨識結果自資料儲存單元讀取檢驗結果。 風在本發明之一實施例中,上述之檢驗步驟為自動化光 學檢測(Automatic Optical Inspection, AOI)步驟。 本發明因為具有辨識圖案,並且此辨識圖樣代表對應 之線路圖案的檢驗結果,因此本發明可以在電路板的後續 製程中藉由辨識此辨識圖案來隨時獲得線路圖案的檢驗結 果。是以,本發明可以掌控電路板生產流程的進度與品質。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說 明如下。 8 1326192 . 19854twf.doc/g 【實施方式】In one embodiment of the invention, the pattern identified by the system is identified. The invention provides a method for managing the quality of a circuit board. Firstly, a circuit board is provided. The circuit board includes a substrate, a circuit pattern and an identification pattern. The middle circuit pattern and the identification pattern are located on the substrate. Then the line pattern is inspected. Steps are performed to obtain a test result. The test result is then stored in a data storage unit, and then the identification pattern is identified, and the test result is read from the data storage unit according to the identification result. In an embodiment of the present invention, The above-mentioned inspection step is an automatic optical inspection (AOI) step. The invention has an identification pattern, and the identification pattern represents the inspection result of the corresponding line pattern, so the invention can be used in the subsequent process of the circuit board by The identification pattern is recognized to obtain the inspection result of the line pattern at any time. Therefore, the present invention can control the progress and quality of the circuit board production process. To make the above and other objects, features and advantages of the present invention more obvious, the following Preferred embodiments and cooperation with the drawings Description in detail as follows. 8 1326192. 19854twf.doc / g [Embodiment

圖1為本發明一實施例之電路板結構剖面圖。請參照 圖1,本實施例之電路板10包括一基板100、一線路圖案 110a以及一辨識圖案110b。線路圖案ll〇a以及辨識圖案 ll〇b皆位於基板100上,且辨識圖案ll〇b用以代表線路 圖案110a形成後製程的檢驗結果。值得注意的是,在本實 施例中辨識圖案110b是選自文字、數字、符號及其組合所 構成的族群其中之一,並且辨識圖案ll〇b適於受一辨識系 統的辨識。 以下將對電路板10的製作方法進行詳細地描述。圖 2A至圖2B為本實施例之電路板之製造方法的流程示意 圖。明參照圖2A,首先提供一基板100。之後將一導電層 110配置於基板100上。導電層11〇的材質例如是銅,而 形成線路層11〇的方法例如是直接將銅箔(c〇pper f〇il)貼 附於基板100上、經由電鍍法將一銅箔形成於基板1〇〇上 或是其它種適於在基板100上形成銅箔的方法。接著將一 光阻層120配置於導電層11〇上,其中形成光阻層12〇的 方法例如是雜乾膜(dlyfilm)光阻、塗佈光 的方法。 J參Ϊ圖二接著對光阻層120進行曝光/顯影製程, 触層12Ga錢―帛二_案化光阻 =二 狀是對應於後 應於後_鄉奴 9 19854twf.doc/g 施例可以經由將—雷射光照· 射於光阻層120的部分區域上,、盆’以使雷射光照 一圖案化光阻層I2Ga以及 ^中此光罩具有對應於第 樣。之後,對光阻層120進/暖;圖顧案旦=阻層120b的圖 圖案化光阻層120a以及一第」製私’以形成第一 J.LM , ^ A 弟—圖案化光阻層120b。 戚光夕卜=貫施例除了可以經由光罩對光阻層進行 於=由束對光阻層12〇進行曝光。二 為精細且較為複雜的第一圖宰化来=田二先束來形成較 案化光阻層mb。 ΰ案化先阻層⑽以及第二圖 射光ί""以影製程’亦可以同時採用光罩以及雷 二ίΠ=Γ12%’其中本實施例可以經由光罩 圖層i2t)a’並且經由雷射光束來形成 Ώ綠為精細且較為_的第二_化光阻層腦。 声12=^1電/ 11G進彳爛,並謂第—_匕光阻 1所干^^弟—_化光阻層120b剝除’以形成如圖 化光阻Γ 。更詳細地說,本實施例是以第一圖案 導带:12Ga以及—第二圖案化光阻層120b為罩幕,對 進行姓刻’以形成一線路圖案11〇&以及一辨識 =二1%。之後將第一圖案化光阻層l2〇a以及一第二圖 更可二10。此外,本實施例 ^卓B (未、..g不)配置於線路圖案110a以及辨識 、、〇b上’其中焊罩層暴露出辨識圖案丨以及線路 10 13261.92 . 19854twf.doc/g 圖案110a的部分區域。 另外,本實施例之第一圖案化光阻層12〇a以及一第 二圖案化光阻層通㊉了可以經由微影製程的方式而被 =成於導電層11G上之外,還可以經由喷墨的方式形成於 電層110上。請參照圖3,其為本實施例之另一種形成 第^案化光阻層i施與第二圖案化光阻層·的方法 的不思圖。首先提供—基板1GG。之後將-導電層110配 置於基板1〇〇上。然後以喷印(ink_jet 祕ng)的方式,直 接將第-圖案化絲層偷與第二圖案化光阻層憑形 成於導電層110上。更詳細地說,本實施例是經由 頭200將光阻材料21〇形成於導電層11〇上,以直接形成 第=案化光阻層120a與第二圖案化光阻層12〇b。 道」然’本實施例中更可以經由前述的微影製程,先在 導電層110上形成第-圖案化光阻層ma。之後再經 墨頭2GG,將第二圖案化光阻層丨鳥形成於導電層11〇上: 干立rtt圖4B為圖1之電路板的另一製造方法的流程 不思圖。请參照圖4A,首先提供一基板⑽。之 配置於基板刚上。之後,經由前述的微影製程, 導電曰110上形成第-圖案化光阻層12〇a。缺後,以 一圖案化光阻層丨施為罩幕,對導電層11()進⑽列,= 圖案11Ga。之後將第—圖案化光阻層咖剝除。 响參考圖4B’接著經由噴墨頭2_塗料21〇 美 ,上,以形成圖!所示的電路板1〇,其中辨識幸= 疋由塗料220所形成。值得衫的是,上述料2 b 1326192 - 19854twf_doc/g - 可以是顏色和基板100的顏色有明顯差異之材料,其中塗 料220例如是光阻、顏料等各種可辨識的材質。^ 由上述之實施例可知,本發明之辨識圖案製造方法在 製程上具有相當的彈性,其可以利用雷射曝光或喷印等方 法來製作,並且可視製程所需加以調整應用。另外,辨識 圖案的材質包括銅或塗料等可供辨識的材料,亦可隨製程 設計的不同而加以改變。 目5為本發明另—實施例之電路板結制剖面圖。請 • 參照圖5 ’本實施例之電路板結構30包括—基板遍、多 個線路圖案310、一辨識圖案32〇、多個第一切割線332 以及^個第二切割線342。其中線路圖案、辨識圖案 320第切吾彳線以及第二切割線342皆位於基板3〇〇 上,且辨識圖案320用以代表線路圖案31〇的檢驗結果。 斤與耵述實施例不同的是,本實施例之電路板結構具有 一第一切割區域330,其中線路圖案31〇、辨識圖案32〇 以及第二切割線342皆位於第一切割區域33〇内,而第一 • 切割線332 ’則是沿著第一切割區域330的輪廓排列。 此外,第一切割區域33〇内具有多個第二切割區域 34γ ’上述之辨識圖案32〇位於第一切割區域33〇内,但位 於第二切割區域340之外。第二切割線342,則沿著第二 切割區域340的輪摩排列。 由上述可知,若沿第一切割線332進行切割,便可將 第一切割區域330自基板300上分離。在本實施例中,電 路板具有一個第—切割區域330,而在其他實施例中,第 lJZOl^Z · 19854twf.doc/g 一切:的數量則可視設計所需加以調整。 的排5,在本實施例中,第二切割區域340 中,亦可,然而在其他實施例 圖謂進行切割,則可以不包括辨識 雜,以、隹—& ΐ 。'〗區域34〇自第一切割區域330中分 仃Υ績製程。在其他實施例中,1 is a cross-sectional view showing the structure of a circuit board according to an embodiment of the present invention. Referring to FIG. 1, the circuit board 10 of the present embodiment includes a substrate 100, a circuit pattern 110a, and an identification pattern 110b. The line pattern ll 〇 a and the identification pattern 〇 〇 b are both located on the substrate 100 , and the identification pattern 〇 〇 b is used to represent the line pattern 110 a to form a post-process inspection result. It should be noted that in the present embodiment, the identification pattern 110b is one of a group selected from the group consisting of characters, numbers, symbols, and combinations thereof, and the identification pattern 11b is adapted to be recognized by an identification system. The method of fabricating the circuit board 10 will be described in detail below. 2A to 2B are schematic flow charts showing a method of manufacturing a circuit board of the embodiment. Referring to FIG. 2A, a substrate 100 is first provided. A conductive layer 110 is then disposed on the substrate 100. The material of the conductive layer 11A is, for example, copper, and the method of forming the wiring layer 11 is, for example, directly attaching a copper foil to the substrate 100, and forming a copper foil on the substrate 1 by electroplating. A method of forming a copper foil on the substrate 100 is preferred. Next, a photoresist layer 120 is disposed on the conductive layer 11A, and a method of forming the photoresist layer 12 is, for example, a dly film photoresist and a method of coating light. Figure 2 follows the exposure/development process of the photoresist layer 120. The touch layer 12Ga%-帛二_案化电阻=二状 corresponds to the post-_乡奴9 19854twf.doc/g The reticle can be patterned to correspond to the first portion by irradiating the laser light onto a portion of the photoresist layer 120, the basin to cause the laser to illuminate the patterned photoresist layer I2Ga. Thereafter, the photoresist layer 120 is heated/warmed; the pattern of the resist layer 120b is patterned to form the photoresist layer 120a and a first "custom" to form the first J.LM, ^ A brother - patterned photoresist Layer 120b. In the case of the light-shielding layer, the photoresist layer 12 can be exposed by the beam. Second, for the fine and more complicated first figure, the smear of the second layer to form a comparative photoresist layer mb. The smear first resist layer (10) and the second illuminating ί""<"<><><><><><><><> The beam is beamed to form a second _----------------------------------- Sound 12 = ^ 1 electricity / 11G into the smash, and said that the first - _ 匕 photoresist 1 dry ^ ^ brother - _ photoresist layer 120b stripped ' to form a photo resist Γ. In more detail, in this embodiment, the first pattern conduction band: 12Ga and the second patterned photoresist layer 120b are used as a mask, and the last name is formed to form a line pattern 11〇& and a recognition=2 1%. The first patterned photoresist layer 12a and a second image are then further divided into two. In addition, the present embodiment is provided on the line pattern 110a and the identification, 〇b', wherein the solder mask layer exposes the identification pattern 丨 and the line 10 13261.92. 19854twf.doc/g pattern 110a Part of the area. In addition, the first patterned photoresist layer 12A and the second patterned photoresist layer of the embodiment may be formed on the conductive layer 11G via a lithography process, or may be An inkjet method is formed on the electrical layer 110. Please refer to FIG. 3, which is another schematic diagram of a method for forming a photoresist layer i and a second patterned photoresist layer according to the embodiment. First, the substrate 1GG is provided. The conductive layer 110 is then placed on the substrate 1A. Then, the first patterned filament layer and the second patterned photoresist layer are directly formed on the conductive layer 110 by printing (ink_jet ng). In more detail, in the present embodiment, the photoresist material 21 is formed on the conductive layer 11A via the head 200 to directly form the first photoresist layer 120a and the second patterned photoresist layer 12B. In the present embodiment, the first patterned photoresist layer ma may be formed on the conductive layer 110 via the aforementioned lithography process. Then, the second patterned photoresist layer ostrich is formed on the conductive layer 11A via the ink head 2GG: Dry rtt Fig. 4B is a flow of another manufacturing method of the circuit board of Fig. 1. Referring to FIG. 4A, a substrate (10) is first provided. It is placed on the substrate just above. Thereafter, a first patterned photoresist layer 12A is formed on the conductive germanium 110 via the aforementioned lithography process. After the absence, a patterned photoresist layer is applied as a mask, and the conductive layer 11 () is placed in the (10) column, = pattern 11Ga. The first patterned photoresist layer is then stripped. Referring to Fig. 4B', the ink-jet head 2_coating 21 is then applied to form a circuit board 1 shown in Fig., wherein the identification is formed by the coating material 220. It is worthwhile that the above material 2 b 1326192 - 19854twf_doc/g - may be a material having a significant difference in color from the color of the substrate 100, wherein the coating 220 is, for example, a variety of identifiable materials such as photoresists and pigments. ^ As can be seen from the above embodiments, the identification pattern manufacturing method of the present invention has considerable flexibility in the process, which can be fabricated by laser exposure or printing, and can be adjusted for visual processing. In addition, the material of the identification pattern includes materials such as copper or paint that can be identified, and can be changed depending on the process design. Figure 5 is a cross-sectional view of a circuit board in accordance with another embodiment of the present invention. Referring to FIG. 5, the circuit board structure 30 of the present embodiment includes a substrate pass, a plurality of circuit patterns 310, an identification pattern 32A, a plurality of first cutting lines 332, and a second cutting line 342. The circuit pattern, the identification pattern 320, the second cutting line and the second cutting line 342 are all located on the substrate 3A, and the identification pattern 320 is used to represent the inspection result of the line pattern 31〇. The circuit board structure of this embodiment has a first cutting area 330, wherein the line pattern 31〇, the identification pattern 32〇, and the second cutting line 342 are all located in the first cutting area 33〇. And the first • cutting line 332 ′ is arranged along the contour of the first cutting area 330 . Further, the first cutting area 33 has a plurality of second cutting areas 34 γ ′. The above-described identification pattern 32 〇 is located in the first cutting area 33 , but outside the second cutting area 340 . The second cutting line 342 is aligned along the wheel of the second cutting zone 340. As can be seen from the above, the first cutting region 330 can be separated from the substrate 300 by cutting along the first cutting line 332. In the present embodiment, the circuit board has a first cutting area 330, and in other embodiments, the number of the first JJZ1Z · 19854twf.doc/g can be adjusted as needed for the design. In the embodiment, the second cutting area 340 is also possible. However, in other embodiments, the cutting is performed, and the identification may not be included, 隹-& The 'area area 34' is divided into the first cutting area 330. In other embodiments,

的數量^可,設計所需而調整。弟一切^或34〇 中,第-同的是,在本實施例之電路板結構 幸32〇亦:彡330内具有多個線路圖案310,辨識圖 t兒,—切割區域现之檢驗結果。換句 亦刪路細㈠目祕圖案別, 表的線路圖案調整辨識圖案320所代 =為本發明—實施例之電路板品質的管理方法示意 圖。1月參照圖6,以電路板10為例,首先將-電路板1〇 置於-辨識系統41G内,其中電路板1G包括—基板1〇〇、 -線路圖案110a以及一辨識圖案議。在本實施例中, 辨識系統410為-自動光學檢測系統,其中此自動光學檢 測系統包括一影像擷取裴置例如是電荷耦合元件(charge Coupled Devices ’ CCD) ’用以擷取電路板1〇上線路圖案 ll〇a與辨識圖案li〇b的影像。 請繼續參照圖6’接著辨識系統41〇對電路板1〇進行 一檢驗步驟,以得到一檢驗結果。值得注意的是,此檢驗 13 1326192 . 19854twf.doc/g =1^^進行檢驗,或是對形成線路圖 於-資料儲Jt二得到的檢驗結果儲存 為-電腦中的硬碟(L:=::他;=單元 Γ存單7也可以是光碟或是記《等資料儲存; 件,述,本㈣之電路板因為增加了_圖案的槿 軸圖案可代表對應之線路圖案的檢果、 =辨識各辨識圖案,讀取資料儲存單元中之; ΐ:?由此建立£化的電子資料庫,』 ==::有爾控生產的狀況,並節= 除此之外,也因為在電路板的生產過程中 3識各辨識圖案,讀取對應之電路板上線路圖荦 ;分續製程或是下游廠商的製: :辨出千板或疋條板的哪個部分具有瑕疲,進而可 的節Ϊ瑕疵的部分進行加工,有助於時間成本與製造成本 此外’因為本發明之辨顧案可對應於各線路 =對^數铺關案,可視設計所需_整,且辨 图案之製作方法可為噴印法或雷射曝光法, °Β :選ΐ應用’所以本發明之辨識圖案在製程上具 D° -己的空間,適於應用於不同的電路板製程中。… 1326192 19854twf.doc/g 〜雖然本發明已以較佳實施例揭露如上,,然其並非用以 限,本發明’任何熟胃此技藝者’在賴縣發明之精神 巳圍内’當可作些許之更動與卿,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1為本發明一實施例之電路板結構剖面圖。 圖2A至圖2B為本實施例之電路板之製造方法的流程 示意圖。 ’丨L王 圖3為本實施例之另一種形成第一圖案化光阻層與第 —圖案化光阻層的方法的示意圖。 圖4A至圖4B為圖1之電路板的另一製造方法的济矛。 示意圖。 圖5為本發明另一實施例之電路板結構的到面圖。 圖6為本發明一實施例之電路板品質的管理方法示音 圖。 【主要元件符號說明】 100、300 :基板 110 :導電層 110a、310 :線路圖案 110b、320 :辨識圖案 120a :第一圖案化光阻層 120b :第二圖案化光阻層 200 :噴墨頭 210 :塗料 15 1326192 19854twf.doc/g 330 第一切割區域 332 第一切割線 340 第二切割區域 342 第二切割線 410 辨識系統 420 資料儲存單元The number of ^ can be adjusted as needed for the design. The second or the same is the same as that of the circuit board structure of the present embodiment. The circuit board structure of the present embodiment is also 32 〇: 彡 330 has a plurality of circuit patterns 310, and the identification result is shown in the cutting area. In other words, it is also a schematic diagram of the management method of the circuit board quality of the present invention - the embodiment of the circuit pattern adjustment identification pattern 320 of the present invention. Referring to FIG. 6 in January, taking the circuit board 10 as an example, first, the circuit board 1 is placed in the identification system 41G, wherein the circuit board 1G includes a substrate 1A, a line pattern 110a, and an identification pattern. In the present embodiment, the identification system 410 is an automatic optical detection system, wherein the automatic optical detection system includes an image capture device such as a charge coupled device (CCD) for capturing the circuit board. The upper line pattern ll 〇 a and the image of the identification pattern li 〇 b. Referring to Figure 6', the identification system 41 then performs a verification step on the board 1 to obtain a test result. It is worth noting that this test 13 1326192 . 19854twf.doc/g =1^^ is tested, or the test result obtained by forming the circuit diagram in the data storage Jt 2 is stored as a hard disk in the computer (L:= ::He;=Unit 单 单 7 can also be a CD or a "storage of data"; the piece, the (4) circuit board because the 槿 pattern of the 槿 pattern can represent the corresponding line pattern test, = Identify each identification pattern and read it in the data storage unit; ΐ:? This establishes an electronic database," ==:: The status of the production is controlled, and the section = in addition, because of the circuit During the production process of the board, the identification pattern is read, and the corresponding circuit board diagram is read; the process of the continuous process or the system of the downstream manufacturer:: Identify which part of the thousand or the slab is fatigued, and then The processing of the thrifty part helps the time cost and the manufacturing cost. In addition, because the invention of the invention can correspond to each line = the number of paving cases, the visual design needs to be _ whole, and the pattern is recognized. The production method can be spray printing or laser exposure, °Β: selection application 'so this hair The identification pattern has a space of D°-self in the process, and is suitable for application in different circuit board processes.... 1326192 19854twf.doc/g~ Although the invention has been disclosed above in the preferred embodiment, it is not used To the extent that the present invention is used in the spirit of the invention of Lai County, the scope of protection of the present invention is defined by the scope of the appended patent application. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a circuit board structure according to an embodiment of the present invention. FIG. 2A to FIG. 2B are schematic flowcharts showing a method of manufacturing a circuit board according to an embodiment of the present invention. A schematic diagram of another method of forming a first patterned photoresist layer and a first patterned photoresist layer. FIG. 4A to FIG. 4B are schematic diagrams of another manufacturing method of the circuit board of FIG. 1. FIG. FIG. 6 is a schematic diagram of a circuit board quality management method according to an embodiment of the present invention. [Main component symbol description] 100, 300: substrate 110: conductive layer 110a, 310: line pattern 110b 320: identification pattern 120a: first patterned photoresist layer 120b: second patterned photoresist layer 200: inkjet head 210: paint 15 1326192 19854twf.doc/g 330 first cutting area 332 first cutting line 340 Two cutting area 342 second cutting line 410 identification system 420 data storage unit

Claims (1)

13261.92 98-10-23 P ' ΐυ : λ.) 十、申請專利範圍: 1.一種電路板,包括: 一基板; 一線路圖案,位於該基板上;以及 :辨識随,位於該基板上,其中該辨識醉用以代 表該線路®案形錢各製程的檢驗結果,且杯一13261.92 98-10-23 P ' ΐυ : λ.) X. Patent application scope: 1. A circuit board comprising: a substrate; a line pattern on the substrate; and: a recognition on the substrate, wherein The identification is used to represent the inspection results of the process of the line. 第-切割區域,並且魏路圖案與輯: 切割區域内。 卞见仄忑弟 其中該辨識 的族群其中 2.如申請專利範圍第丨項所述之電路板, 圖案選自於文子、數字、符號及其、纟且合所構成 之一。 3.如申請專利範圍第1項所述之電路板,更勹 一切割線,位於該基板上,並且沿著該第一切割^括—第 排列。 。品的輪摩The first-cut area, and the Wei road pattern and series: within the cutting area.卞见仄忑弟 The group of the identified ones 2. The circuit board as described in the scope of the patent application, the pattern is selected from one of the text, the number, the symbol, and the combination thereof. 3. The circuit board of claim 1, further comprising a cutting line on the substrate and along the first cutting line. . Wheel of the goods 4·如申請專利範圍第1項所述之電路板,其中該* 切割區域内具有多個第二切割區域,該辨識圖案位 第二切割區域外。 % ;該些 5. 如申請專利範圍第4項所述之電路板,其中今此μ 二切割區域的排列方式為陣列排列。 第 6. 如申請專利範圍第4項所述之電路板,更包括多, 第二切割線’位於該基板上,並且沿著該第二切割區^條 輪廓排列。 @ 7. 如申請專利範圍第丨項所述之電路板,其中該辨識 圖案的材質是銅。 17 v,· -- 98-10-23 日修⑻正錢.1 ^ 種電路板品質的管理方法,包括: 及J電路板包括—基板一線路圖案以 上;。图木/、中該線路圖案與該辨識圖案位於該基板 路圖案進行—檢驗步驟 將該檢驗結果儲存於-資料儲存單L以Γ 辨識該辨識圖案,並且 元讀取該檢聽果。 霸U自料料儲存單 10·如申請專利範圍第9項所述之 該檢驗步驟為自動化光學檢測步驟。 法,其中4. The circuit board of claim 1, wherein the *cutting region has a plurality of second cutting regions, the identification pattern being located outside the second cutting region. The circuit board of claim 4, wherein the μ-cut area is arranged in an array. 6. The circuit board of claim 4, further comprising a plurality of second cutting lines disposed on the substrate and arranged along the contour of the second cutting zone. @ 7. The circuit board of claim </ RTI> wherein the identification pattern is made of copper. 17 v,· -- 98-10-23 日修(8)正钱.1 ^ Management method of board quality, including: and J circuit board including - substrate one line pattern above; The circuit pattern and the identification pattern are located on the substrate pattern. The inspection step stores the inspection result in the data storage sheet L to identify the identification pattern, and reads the inspection result.霸U自料料储单10· The inspection procedure described in item 9 of the patent application scope is an automated optical inspection step. Law, where
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