TW441077B - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device Download PDF

Info

Publication number
TW441077B
TW441077B TW89100582A TW89100582A TW441077B TW 441077 B TW441077 B TW 441077B TW 89100582 A TW89100582 A TW 89100582A TW 89100582 A TW89100582 A TW 89100582A TW 441077 B TW441077 B TW 441077B
Authority
TW
Taiwan
Prior art keywords
electronic device
contact
application
item
patent application
Prior art date
Application number
TW89100582A
Other languages
English (en)
Chinese (zh)
Inventor
Toshio Hanada
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Application granted granted Critical
Publication of TW441077B publication Critical patent/TW441077B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
TW89100582A 1999-01-18 2000-01-15 Hybrid integrated circuit device TW441077B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP901099A JP2000208669A (ja) 1999-01-18 1999-01-18 ハイブリッド集積回路装置の構造

Publications (1)

Publication Number Publication Date
TW441077B true TW441077B (en) 2001-06-16

Family

ID=11708693

Family Applications (1)

Application Number Title Priority Date Filing Date
TW89100582A TW441077B (en) 1999-01-18 2000-01-15 Hybrid integrated circuit device

Country Status (3)

Country Link
JP (1) JP2000208669A (ja)
KR (1) KR20000071262A (ja)
TW (1) TW441077B (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4486553B2 (ja) * 2005-06-23 2010-06-23 富士通株式会社 キャパシタ内蔵両面実装回路基板を有する電子装置
WO2007029445A1 (ja) * 2005-09-06 2007-03-15 Matsushita Electric Industrial Co., Ltd. キャパシタ搭載型半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6442158A (en) * 1987-08-10 1989-02-14 Nec Corp Hybrid integrated circuit device
JPH0435058A (ja) * 1990-05-31 1992-02-05 Hitachi Ltd 複合集積回路装置および混成集積回路装置
JPH08340059A (ja) * 1995-06-12 1996-12-24 Oki Electric Ind Co Ltd 半導体デバイスパッケージングシステム
JPH09252076A (ja) * 1996-03-15 1997-09-22 Sansei Denshi Japan Kk Ic及びic用リードフレーム

Also Published As

Publication number Publication date
KR20000071262A (ko) 2000-11-25
JP2000208669A (ja) 2000-07-28

Similar Documents

Publication Publication Date Title
TW451454B (en) Semiconductor device
TW418467B (en) Process for mounting electronic device and semiconductor device
TW455962B (en) Semiconductor device having a plurality of semiconductor elements interconnected by a redistribution layer
TWI293765B (en) Planar inductor with segmented conductive plane
TW473751B (en) Multi-layer capacitor, wiring board, and high-frequency circuit
TW498508B (en) Semiconductor package and method of fabricating the same
TW381334B (en) Semiconductor modules
US6191479B1 (en) Decoupling capacitor configuration for integrated circuit chip
US20010039075A1 (en) Method for Capacitively Coupling Electronic Devices
TW435059B (en) Electronic component package with decoupling capacitors completely within die receiving cavity of substrate
TW552562B (en) Semiconductor devices and the manufacturing method
TW569252B (en) Electronic assembly with laterally connected capacitors and manufacturing method
TWI292676B (en) Method of providing multiple voltages, method for forming thin film capacitor, semiconductor apparatus, communication system and computer system
TW516166B (en) Semiconductor integrated circuit device and the manufacturing method thereof
TW439162B (en) An integrated circuit package
TW432755B (en) Multi in-line memory module and electronic component socket combined with the same
TW493217B (en) An improved high quality factor capacitor
TW595292B (en) Electronic circuit unit
TW321791B (ja)
TW200305981A (en) Electronic circuit device
US9257418B2 (en) Semiconductor package having heat slug and passive device
JP2003516007A (ja) 少なくとも一つの半導体チップを有する平坦なマウント
TW441077B (en) Hybrid integrated circuit device
TW432669B (en) Semiconductor integrated circuit device capable of achieving reductions in chip area and consumption power
TWI492335B (zh) 電子裝置及其封裝結構

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees