TW269052B - Process for semiconductor wafer, semiconductor integrated circuit and devices thereof - Google Patents
Process for semiconductor wafer, semiconductor integrated circuit and devices thereofInfo
- Publication number
- TW269052B TW269052B TW084100015A TW84100015A TW269052B TW 269052 B TW269052 B TW 269052B TW 084100015 A TW084100015 A TW 084100015A TW 84100015 A TW84100015 A TW 84100015A TW 269052 B TW269052 B TW 269052B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor
- impurity
- integrated circuit
- semiconductor substrate
- devices
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 10
- 239000012535 impurity Substances 0.000 abstract 5
- 239000000758 substrate Substances 0.000 abstract 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0925—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising an N-well only in the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Recrystallisation Techniques (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17687294 | 1994-07-28 | ||
JP6265529A JPH0897163A (ja) | 1994-07-28 | 1994-10-28 | 半導体ウエハの製造方法、半導体ウエハ、半導体集積回路装置の製造方法および半導体集積回路装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW269052B true TW269052B (en) | 1996-01-21 |
Family
ID=26497627
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084100015A TW269052B (en) | 1994-07-28 | 1995-01-04 | Process for semiconductor wafer, semiconductor integrated circuit and devices thereof |
Country Status (8)
Country | Link |
---|---|
US (5) | US6043114A (zh) |
EP (1) | EP0696062B1 (zh) |
JP (1) | JPH0897163A (zh) |
KR (1) | KR100377649B1 (zh) |
CN (1) | CN1110073C (zh) |
DE (1) | DE69528798T2 (zh) |
HK (1) | HK1010768A1 (zh) |
TW (1) | TW269052B (zh) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0897163A (ja) * | 1994-07-28 | 1996-04-12 | Hitachi Ltd | 半導体ウエハの製造方法、半導体ウエハ、半導体集積回路装置の製造方法および半導体集積回路装置 |
JPH11214533A (ja) * | 1998-01-29 | 1999-08-06 | Nec Corp | 半導体装置の製造方法 |
US6423615B1 (en) * | 1999-09-22 | 2002-07-23 | Intel Corporation | Silicon wafers for CMOS and other integrated circuits |
US6358821B1 (en) * | 2000-07-19 | 2002-03-19 | Chartered Semiconductor Manufacturing Inc. | Method of copper transport prevention by a sputtered gettering layer on backside of wafer |
US6878595B2 (en) * | 2003-01-27 | 2005-04-12 | Full Circle Research, Inc. | Technique for suppression of latchup in integrated circuits (ICS) |
US7247534B2 (en) * | 2003-11-19 | 2007-07-24 | International Business Machines Corporation | Silicon device on Si:C-OI and SGOI and method of manufacture |
KR100514172B1 (ko) * | 2004-01-19 | 2005-09-09 | 삼성전자주식회사 | 반도체 소자 형성방법 |
US20060049464A1 (en) * | 2004-09-03 | 2006-03-09 | Rao G R Mohan | Semiconductor devices with graded dopant regions |
JP4387291B2 (ja) * | 2004-12-06 | 2009-12-16 | パナソニック株式会社 | 横型半導体デバイスおよびその製造方法 |
JP4703364B2 (ja) * | 2005-10-24 | 2011-06-15 | 株式会社東芝 | 半導体装置及びその製造方法 |
CN101777498A (zh) * | 2010-01-12 | 2010-07-14 | 上海宏力半导体制造有限公司 | 带浅表外延层的外延片形成方法及其外延片 |
KR102332469B1 (ko) | 2014-03-28 | 2021-11-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 트랜지스터 및 반도체 장치 |
CN106653599B (zh) * | 2015-11-02 | 2021-03-16 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
CN113381286B (zh) * | 2021-06-02 | 2023-03-03 | 山东大学 | 离子束增强腐蚀制备晶体薄膜的方法 |
Family Cites Families (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4005453A (en) * | 1971-04-14 | 1977-01-25 | U.S. Philips Corporation | Semiconductor device with isolated circuit elements and method of making |
US3974003A (en) * | 1975-08-25 | 1976-08-10 | Ibm | Chemical vapor deposition of dielectric films containing Al, N, and Si |
JPS5617011A (en) * | 1979-07-23 | 1981-02-18 | Toshiba Corp | Semiconductor device and manufacture thereof |
US4684971A (en) * | 1981-03-13 | 1987-08-04 | American Telephone And Telegraph Company, At&T Bell Laboratories | Ion implanted CMOS devices |
JPS58218159A (ja) * | 1982-06-11 | 1983-12-19 | Toshiba Corp | 相補型mos半導体装置 |
JPS5994861A (ja) * | 1982-11-24 | 1984-05-31 | Hitachi Ltd | 半導体集積回路装置及びその製造方法 |
DE3314450A1 (de) * | 1983-04-21 | 1984-10-25 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen |
US4477310A (en) * | 1983-08-12 | 1984-10-16 | Tektronix, Inc. | Process for manufacturing MOS integrated circuit with improved method of forming refractory metal silicide areas |
JPS60132358A (ja) * | 1983-12-20 | 1985-07-15 | Nec Corp | 相補型mos集積回路装置 |
JPS612356A (ja) * | 1984-06-14 | 1986-01-08 | Toshiba Corp | Cmos型半導体装置 |
US4622082A (en) * | 1984-06-25 | 1986-11-11 | Monsanto Company | Conditioned semiconductor substrates |
US4578128A (en) * | 1984-12-03 | 1986-03-25 | Ncr Corporation | Process for forming retrograde dopant distributions utilizing simultaneous outdiffusion of dopants |
US4662082A (en) | 1985-04-22 | 1987-05-05 | Shabazz Rasheed A | Shoe saver |
EP0204979B1 (de) * | 1985-06-03 | 1989-03-29 | Siemens Aktiengesellschaft | Verfahren zum gleichzeitigen Herstellen von bipolaren und komplementären MOS-Transistoren auf einem gemeinsamen Siliziumsubstrat |
US4740827A (en) * | 1985-09-30 | 1988-04-26 | Kabushiki Kaisha Toshiba | CMOS semiconductor device |
US4766090A (en) * | 1986-04-21 | 1988-08-23 | American Telephone And Telegraph Company, At&T Bell Laboratories | Methods for fabricating latchup-preventing CMOS device |
EP0248988B1 (de) * | 1986-06-10 | 1990-10-31 | Siemens Aktiengesellschaft | Verfahren zum Herstellen von hochintegrierten komplementären MOS-Feldeffekttransistorschaltungen |
EP0250722A3 (de) * | 1986-07-04 | 1988-08-03 | Siemens Aktiengesellschaft | Verfahren zur Herstellung benachbarter, mit Dotierstoffionen unterschiedlichen Leitungstyps implantierter Wannen für hochintegrierte CMOS-Bauelemente |
US5156990A (en) * | 1986-07-23 | 1992-10-20 | Texas Instruments Incorporated | Floating-gate memory cell with tailored doping profile |
JPH07114241B2 (ja) | 1986-10-20 | 1995-12-06 | 松下電子工業株式会社 | 半導体装置 |
JP2751926B2 (ja) * | 1986-12-22 | 1998-05-18 | 日産自動車株式会社 | 電導度変調形mosfet |
US4835740A (en) * | 1986-12-26 | 1989-05-30 | Kabushiki Kaisha Toshiba | Floating gate type semiconductor memory device |
JPS6465865A (en) | 1987-09-05 | 1989-03-13 | Fujitsu Ltd | Manufacture of complementary semiconductor device |
JPH01260832A (ja) | 1988-04-12 | 1989-10-18 | Oki Electric Ind Co Ltd | 半導体素子の製造方法 |
US4943536A (en) * | 1988-05-31 | 1990-07-24 | Texas Instruments, Incorporated | Transistor isolation |
IT1230028B (it) * | 1988-12-16 | 1991-09-24 | Sgs Thomson Microelectronics | Procedimento di fabbricazione di dispositivi semiconduttori mos avvalentesi di un trattamento "gettering" di migliorare caratteristiche, e dispositivi semiconduttori mos con esso ottenuti |
US5216269A (en) * | 1989-03-31 | 1993-06-01 | U.S. Philips Corp. | Electrically-programmable semiconductor memories with buried injector region |
US5219768A (en) * | 1989-05-10 | 1993-06-15 | Oki Electric Industry Co., Ltd. | Method for fabricating a semiconductor device |
US5182219A (en) * | 1989-07-21 | 1993-01-26 | Linear Technology Corporation | Push-back junction isolation semiconductor structure and method |
US5290714A (en) * | 1990-01-12 | 1994-03-01 | Hitachi, Ltd. | Method of forming semiconductor device including a CMOS structure having double-doped channel regions |
US5154946A (en) * | 1990-09-27 | 1992-10-13 | Motorola, Inc. | CMOS structure fabrication |
KR940011483B1 (ko) * | 1990-11-28 | 1994-12-19 | 가부시끼가이샤 도시바 | 반도체 디바이스를 제조하기 위한 방법 및 이 방법에 의해 제조되는 반도체 디바이스 |
US5248624A (en) * | 1991-08-23 | 1993-09-28 | Exar Corporation | Method of making isolated vertical pnp transistor in a complementary bicmos process with eeprom memory |
US5252501A (en) * | 1991-12-30 | 1993-10-12 | Texas Instruments Incorporated | Self-aligned single-mask CMOS/BiCMOS twin-well formation with flat surface topography |
JPH05183159A (ja) * | 1992-01-07 | 1993-07-23 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US5296047A (en) * | 1992-01-28 | 1994-03-22 | Hewlett-Packard Co. | Epitaxial silicon starting material |
US5508540A (en) * | 1993-02-19 | 1996-04-16 | Hitachi, Ltd. | Semiconductor integrated circuit device and process of manufacturing the same |
US5374567A (en) * | 1993-05-20 | 1994-12-20 | The United States Of America As Represented By The Secretary Of The Navy | Operational amplifier using bipolar junction transistors in silicon-on-sapphire |
US5362665A (en) * | 1994-02-14 | 1994-11-08 | Industrial Technology Research Institute | Method of making vertical DRAM cross point memory cell |
JPH0897163A (ja) * | 1994-07-28 | 1996-04-12 | Hitachi Ltd | 半導体ウエハの製造方法、半導体ウエハ、半導体集積回路装置の製造方法および半導体集積回路装置 |
JP3637651B2 (ja) * | 1995-03-22 | 2005-04-13 | 株式会社デンソー | 温度式膨張弁 |
-
1994
- 1994-10-28 JP JP6265529A patent/JPH0897163A/ja active Pending
-
1995
- 1995-01-04 TW TW084100015A patent/TW269052B/zh not_active IP Right Cessation
- 1995-06-23 DE DE69528798T patent/DE69528798T2/de not_active Expired - Fee Related
- 1995-06-23 EP EP95304434A patent/EP0696062B1/en not_active Expired - Lifetime
- 1995-07-27 CN CN95109607A patent/CN1110073C/zh not_active Expired - Fee Related
- 1995-07-27 KR KR1019950022450A patent/KR100377649B1/ko not_active IP Right Cessation
-
1997
- 1997-09-22 US US08/934,774 patent/US6043114A/en not_active Expired - Lifetime
-
1998
- 1998-10-30 HK HK98111663A patent/HK1010768A1/xx not_active IP Right Cessation
-
2000
- 2000-02-25 US US09/513,349 patent/US6368905B1/en not_active Expired - Lifetime
-
2001
- 2001-12-05 US US10/002,147 patent/US6630375B2/en not_active Expired - Lifetime
- 2001-12-14 US US10/014,405 patent/US6806130B2/en not_active Expired - Fee Related
-
2004
- 2004-06-07 US US10/861,450 patent/US20040219727A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
CN1121643A (zh) | 1996-05-01 |
KR960005769A (ko) | 1996-02-23 |
EP0696062A2 (en) | 1996-02-07 |
DE69528798D1 (de) | 2002-12-19 |
CN1110073C (zh) | 2003-05-28 |
US20020055204A1 (en) | 2002-05-09 |
US20020061615A1 (en) | 2002-05-23 |
EP0696062A3 (en) | 1996-12-11 |
DE69528798T2 (de) | 2003-08-14 |
EP0696062B1 (en) | 2002-11-13 |
US6043114A (en) | 2000-03-28 |
US6368905B1 (en) | 2002-04-09 |
KR100377649B1 (ko) | 2003-06-02 |
US20040219727A1 (en) | 2004-11-04 |
US6630375B2 (en) | 2003-10-07 |
US6806130B2 (en) | 2004-10-19 |
JPH0897163A (ja) | 1996-04-12 |
HK1010768A1 (en) | 1999-06-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |