TW269052B - Process for semiconductor wafer, semiconductor integrated circuit and devices thereof - Google Patents

Process for semiconductor wafer, semiconductor integrated circuit and devices thereof

Info

Publication number
TW269052B
TW269052B TW084100015A TW84100015A TW269052B TW 269052 B TW269052 B TW 269052B TW 084100015 A TW084100015 A TW 084100015A TW 84100015 A TW84100015 A TW 84100015A TW 269052 B TW269052 B TW 269052B
Authority
TW
Taiwan
Prior art keywords
semiconductor
impurity
integrated circuit
semiconductor substrate
devices
Prior art date
Application number
TW084100015A
Other languages
English (en)
Inventor
Hirouto Kawakoe
Tatsumi Shirasu
Shogo Kiyoda
Norio Suzuki
Eiichi Yamada
Original Assignee
Hitachi Seisakusyo Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Seisakusyo Kk filed Critical Hitachi Seisakusyo Kk
Application granted granted Critical
Publication of TW269052B publication Critical patent/TW269052B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0925—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising an N-well only in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Semiconductor Memories (AREA)
TW084100015A 1994-07-28 1995-01-04 Process for semiconductor wafer, semiconductor integrated circuit and devices thereof TW269052B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP17687294 1994-07-28
JP6265529A JPH0897163A (ja) 1994-07-28 1994-10-28 半導体ウエハの製造方法、半導体ウエハ、半導体集積回路装置の製造方法および半導体集積回路装置

Publications (1)

Publication Number Publication Date
TW269052B true TW269052B (en) 1996-01-21

Family

ID=26497627

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084100015A TW269052B (en) 1994-07-28 1995-01-04 Process for semiconductor wafer, semiconductor integrated circuit and devices thereof

Country Status (8)

Country Link
US (5) US6043114A (zh)
EP (1) EP0696062B1 (zh)
JP (1) JPH0897163A (zh)
KR (1) KR100377649B1 (zh)
CN (1) CN1110073C (zh)
DE (1) DE69528798T2 (zh)
HK (1) HK1010768A1 (zh)
TW (1) TW269052B (zh)

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JPH0897163A (ja) * 1994-07-28 1996-04-12 Hitachi Ltd 半導体ウエハの製造方法、半導体ウエハ、半導体集積回路装置の製造方法および半導体集積回路装置
JPH11214533A (ja) * 1998-01-29 1999-08-06 Nec Corp 半導体装置の製造方法
US6423615B1 (en) * 1999-09-22 2002-07-23 Intel Corporation Silicon wafers for CMOS and other integrated circuits
US6358821B1 (en) * 2000-07-19 2002-03-19 Chartered Semiconductor Manufacturing Inc. Method of copper transport prevention by a sputtered gettering layer on backside of wafer
US6878595B2 (en) * 2003-01-27 2005-04-12 Full Circle Research, Inc. Technique for suppression of latchup in integrated circuits (ICS)
US7247534B2 (en) * 2003-11-19 2007-07-24 International Business Machines Corporation Silicon device on Si:C-OI and SGOI and method of manufacture
KR100514172B1 (ko) * 2004-01-19 2005-09-09 삼성전자주식회사 반도체 소자 형성방법
US20060049464A1 (en) * 2004-09-03 2006-03-09 Rao G R Mohan Semiconductor devices with graded dopant regions
JP4387291B2 (ja) * 2004-12-06 2009-12-16 パナソニック株式会社 横型半導体デバイスおよびその製造方法
JP4703364B2 (ja) * 2005-10-24 2011-06-15 株式会社東芝 半導体装置及びその製造方法
CN101777498A (zh) * 2010-01-12 2010-07-14 上海宏力半导体制造有限公司 带浅表外延层的外延片形成方法及其外延片
KR102332469B1 (ko) 2014-03-28 2021-11-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 트랜지스터 및 반도체 장치
CN106653599B (zh) * 2015-11-02 2021-03-16 中芯国际集成电路制造(上海)有限公司 半导体装置及其制造方法
CN113381286B (zh) * 2021-06-02 2023-03-03 山东大学 离子束增强腐蚀制备晶体薄膜的方法

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JPS5617011A (en) * 1979-07-23 1981-02-18 Toshiba Corp Semiconductor device and manufacture thereof
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Also Published As

Publication number Publication date
CN1121643A (zh) 1996-05-01
KR960005769A (ko) 1996-02-23
EP0696062A2 (en) 1996-02-07
DE69528798D1 (de) 2002-12-19
CN1110073C (zh) 2003-05-28
US20020055204A1 (en) 2002-05-09
US20020061615A1 (en) 2002-05-23
EP0696062A3 (en) 1996-12-11
DE69528798T2 (de) 2003-08-14
EP0696062B1 (en) 2002-11-13
US6043114A (en) 2000-03-28
US6368905B1 (en) 2002-04-09
KR100377649B1 (ko) 2003-06-02
US20040219727A1 (en) 2004-11-04
US6630375B2 (en) 2003-10-07
US6806130B2 (en) 2004-10-19
JPH0897163A (ja) 1996-04-12
HK1010768A1 (en) 1999-06-25

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees