TW202121491A - 磊晶結構與半導體裝置 - Google Patents
磊晶結構與半導體裝置 Download PDFInfo
- Publication number
- TW202121491A TW202121491A TW108142106A TW108142106A TW202121491A TW 202121491 A TW202121491 A TW 202121491A TW 108142106 A TW108142106 A TW 108142106A TW 108142106 A TW108142106 A TW 108142106A TW 202121491 A TW202121491 A TW 202121491A
- Authority
- TW
- Taiwan
- Prior art keywords
- thickness direction
- nucleation layer
- aluminum content
- along
- lattice constant
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 230000006911 nucleation Effects 0.000 claims abstract description 105
- 238000010899 nucleation Methods 0.000 claims abstract description 105
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 239000002019 doping agent Substances 0.000 claims abstract description 13
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical group [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims abstract description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 89
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 89
- 230000007423 decrease Effects 0.000 claims description 61
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 18
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 17
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 3
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 229910052742 iron Inorganic materials 0.000 claims description 3
- 229910052749 magnesium Inorganic materials 0.000 claims description 3
- 239000011777 magnesium Substances 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims 2
- 230000007547 defect Effects 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
- H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02581—Transition metal or rare earth elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Bipolar Transistors (AREA)
- Recrystallisation Techniques (AREA)
Abstract
一種磊晶結構與半導體裝置,所述磊晶結構至少包括:碳化矽基板、成核層以及氮化鎵層。成核層形成於碳化矽基板上,成核層的材料為摻雜有摻質的氮化鋁鎵,所述成核層的鋁含量沿厚度方向由高變低,成核層的晶格常數在3.08 Å~3.21 Å之間,且成核層的摻雜濃度沿厚度方向由高變低。氮化鎵層則形成於所述成核層上。
Description
本發明是有關於一種半導體結構,且特別是有關於一種磊晶結構與半導體裝置。
由於環保意識抬頭,車用充電器已成為重要發展事項。而且因為氮化鎵(GaN)與碳化矽(SiC)具有較高之耐壓、頻率與輸出功率等優點,所以目前最有可能取代傳統的矽功率元件。
然而,因為氮化鎵與碳化矽的晶格不匹配較大以及能階差(∆Eg較大),故容易導致元件缺陷密度增加與順向電壓Vf增加,並不利於傳導性。
本發明提供一種磊晶結構,可改善傳統異質接面的問題,以提升磊晶特性與元件電性。
本發明另提供一種半導體裝置,能提升元件電性。
本發明的磊晶結構包括碳化矽基板、成核層以及氮化鎵層。成核層形成於碳化矽基板上,成核層的材料為摻雜有摻質的氮化鋁鎵,成核層的晶格常數在3.08 Å~3.21 Å之間,成核層的鋁含量沿厚度方向由高變低,且成核層的摻雜濃度沿厚度方向由高變低,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,所述摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
。氮化鎵層則形成於所述成核層上。
在本發明的一實施例中,上述成核層中的摻質包括矽、鐵、鎂或碳。
在本發明的一實施例中,上述成核層的鋁含量沿厚度方向為漸變式降低,上述摻雜濃度沿厚度方向為漸變式降低,上述成核層的晶格常數沿厚度方向為漸變式增加,且鋁含量的起始值為80%~100%,鋁含量的結束值為0~20%,鋁含量的漸變斜率為-0.1%/nm~-20%/nm。摻雜濃度的起始值在5E18 cm-3
~5E19 cm-3
,摻雜濃度的結束值在5E18 cm-3
~2E19 cm-3
。晶格常數的起始值為3.11±0.03Å,晶格常數的結束值為3.18±0.03Å。成核層的能隙則沿厚度方向從6.13±1 eV至3.42±1 eV漸變式降低。
在本發明的一實施例中,上述成核層的鋁含量沿厚度方向為漸變式降低,上述摻雜濃度沿厚度方向為漸變式降低,上述成核層的晶格常數沿厚度方向為漸變式增加,且鋁含量的起始值為10%~60%,鋁含量的結束值為0~20%,鋁含量的漸變斜率為-0.1%/nm~-20%/nm。所述摻雜濃度的起始值在5E18 cm-3
~5E19 cm-3
,所述摻雜濃度的結束值在5E18 cm-3
~2E19 cm-3
。晶格常數的起始值為3.151±0.03Å,晶格常數的結束值為3.18±0.03Å。成核層的能隙則沿厚度方向從4.78±1 eV至3.42±1 eV漸變式降低。
在本發明的一實施例中,上述成核層的鋁含量沿厚度方向為步階式降低,上述摻雜濃度沿厚度方向為步階式降低,上述成核層的晶格常數沿厚度方向為步階式增加,且鋁含量的起始值為80%~100%,鋁含量的結束值為0~20%,鋁含量的步階斜率為-0.1%/步階~-50%/步階。所述摻雜濃度的起始值在5E18 cm-3
~5E19 cm-3
,所述摻雜濃度的結束值在5E18 cm-3
~2E19 cm-3
。晶格常數的起始值為3.11±0.03Å,晶格常數的結束值為3.18±0.03Å。成核層的能隙則沿厚度方向從6.13±1 eV至3.42±1 eV漸變式降低。
在本發明的一實施例中,上述成核層的鋁含量沿厚度方向為步階式降低,上述摻雜濃度沿厚度方向為步階式降低,上述成核層的晶格常數沿厚度方向為步階式增加,且鋁含量的起始值為10%~60%,鋁含量的結束值為0~20%,鋁含量的步階斜率為-0.1%/步階~-50%/步階。所述摻雜濃度的起始值在5E18 cm-3
~5E19 cm-3
,所述摻雜濃度的結束值在5E18 cm-3
~2E19 cm-3
。晶格常數的起始值為3.151±0.03Å,晶格常數的結束值為3.18±0.03Å。成核層的能隙則沿厚度方向從4.78±1 eV至3.42±1 eV漸變式降低。
在本發明的一實施例中,上述成核層的鋁含量沿厚度方向為步階漸變式降低,上述摻雜濃度沿厚度方向為步階漸變式降低,上述成核層的晶格常數沿厚度方向為步階漸變式增加,且鋁含量的起始值為80%~100%,鋁含量的結束值為0~20%,鋁含量的漸變斜率為-0.1%/nm~-50%/nm,鋁含量的步階斜率為-0.1%/步階~-50%/步階。所述摻雜濃度的起始值在5E18 cm-3
~5E19 cm-3
,所述摻雜濃度的結束值在5E18 cm-3
~2E19 cm-3
。晶格常數的起始值為3.11±0.03Å,晶格常數的結束值為3.18±0.03Å。成核層的能隙則沿厚度方向從6.13±1 eV至3.42±1 eV漸變式降低。
在本發明的一實施例中,上述成核層的鋁含量沿厚度方向為步階漸變式降低,上述摻雜濃度沿厚度方向為步階漸變式降低,上述成核層的晶格常數沿厚度方向為步階漸變式增加,且鋁含量的起始值為10%~60%,鋁含量的結束值為0~20%,鋁含量的漸變斜率為-0.1%/nm~-50%/nm,鋁含量的步階斜率為-0.1%/步階~-50%/步階。所述摻雜濃度的起始值在5E18 cm-3
~5E19 cm-3
,所述摻雜濃度的結束值在5E18 cm-3
~2E19 cm-3
。晶格常數的起始值為3.151±0.03Å,晶格常數的結束值為3.18±0.03Å。成核層的能隙則沿厚度方向從4.78±1 eV至3.42±1 eV漸變式降低。
在本發明的一實施例中,上述成核層是由2至50層的薄膜層所構成。
本發明的半導體裝置包括上述的磊晶結構。
基於上述,本發明藉由設置於碳化矽基板與氮化鎵層之間具有特定摻雜濃度變化之氮化鋁鎵作為成核層,來提升氮化鎵與碳化矽之間的晶格匹配性,並藉此降低元件缺陷密度與順向電壓,進而提升元件電性。
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。
下文列舉一些實施例並配合所附圖式來進行詳細地說明,但所提供的實施例並非用以限制本發明所涵蓋的範圍。此外,圖式僅以說明為目的,並未依照原尺寸作圖。為了方便理解,下述說明中相同的元件將以相同之符號標示來說明。
圖1是依照本發明的一實施例的一種磊晶結構的剖面示意圖。
請參照圖1,本實施例的磊晶結構包括碳化矽基板100、成核層102以及氮化鎵層104。成核層102形成於碳化矽基板100上,成核層102的材料為摻雜有摻質的氮化鋁鎵(Alx
Ga1-x
N,x小於1),成核層102的晶格常數在3.08 Å~3.21 Å之間,成核層102的鋁含量沿厚度方向由高變低,且成核層102的摻雜濃度沿厚度方向由高變低。在一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,所述摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
。氮化鎵層104則形成於成核層102上,且碳化矽基板100、成核層102以及氮化鎵層104的導電態均可為n+型,但本發明並不限於此。在本實施例中,成核層的厚度例如在1 nm~1000 nm之間,較佳為1 nm~200 nm。此外,圖1雖然顯示的是一整層的成核層102,但應知成核層102於厚度方向上可由多個薄膜層組成,且在本文中所敘述的一個「薄膜層」的定義為氮化鋁鎵(Alx
Ga1-x
N)中x值的一種變化,其中成核層102例如是由2至50層的薄膜層所構成。成核層102的鋁含量還可沿厚度方向為漸變式降低、步階式降低或步階漸變式降低。關於上述鋁含量變化將於下文詳述。
請繼續參照圖1,成核層102中的摻質例如矽、鐵、鎂或碳;若是以碳化矽基板100與氮化鎵層104之間的晶格匹配來看,摻質較佳是矽。而且,成核層102的摻雜濃度可沿厚度方向為漸變式降低、步階式降低或步階漸變式降低。關於上述摻雜濃度變化將於下文詳述。
本實施例設置於碳化矽基板100與氮化鎵層104之間的成核層102,因為其中特定摻雜濃度變化,可改善磊晶結構的晶格匹配性,並藉此降低元件缺陷密度與順向電壓,進而提升元件電性。
圖2至圖7是上述實施例的不同示例性磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
在圖2的成核層102中,摻雜濃度沿厚度方向為漸變式降低,晶格常數沿厚度方向為漸變式增加,文中的「漸變式降低或增加」是指沿厚度方向連續降低或增加。在以矽為摻質的一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,較佳為5E18 cm-3
~5E19 cm-3
;所述摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
,較佳為5E18 cm-3
~2E19 cm-3
。成核層102的晶格常數的起始值例如3.11±0.03Å,較佳為3.11±0.01Å;晶格常數的結束值例如3.18±0.03Å,較佳為3.18±0.01Å。成核層102的能隙(Eg)例如沿厚度方向從6.13±1 eV至3.42±1 eV漸變式降低,較佳為從6.13±0.5 eV至3.42±0.5 eV漸變式降低。此外,圖2雖未顯示成核層102的鋁含量,但在此條件下,鋁含量沿厚度方向是漸變式降低,且鋁含量的起始值例如80%~100%,較佳為90%~100%;鋁含量的結束值例如0~20%,較佳為0~10%;鋁含量的漸變斜率例如-0.1%/nm~-20%/nm,較佳為-0.1%/nm~-10%/nm。
在圖3的成核層102中,摻雜濃度沿厚度方向為漸變式降低,晶格常數沿厚度方向為漸變式增加。在以矽為摻質的一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,較佳為5E18 cm-3
~5E19 cm-3
;摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
,較佳為5E18 cm-3
~2E19 cm-3
。成核層102的晶格常數的起始值例如3.151±0.03Å,較佳為3.151±0.01Å;晶格常數的結束值例如3.18±0.03Å,較佳為3.18±0.01Å。成核層102的能隙則沿厚度方向從4.78±1 eV至3.42±1 eV漸變式降低,較佳為從4.78±0.5 eV至3.42±0.5 eV漸變式降低。此外,圖3雖未顯示成核層102的鋁含量,但在此條件下,鋁含量沿厚度方向是漸變式降低,且鋁含量的起始值例如10%~60%,較佳為40%~60%;鋁含量的結束值例如0~20%,較佳為0~10%;鋁含量的漸變斜率例如-0.1%/nm~-20%/nm,較佳為-0.1%/nm~-10%/nm。
在圖4的成核層102中,摻雜濃度沿厚度方向為步階式降低,晶格常數沿厚度方向為步階式增加,文中的「步階式降低或增加」是指沿厚度方向逐步降低或增加,例如圖中有多個步階式區段,每個步階式區段內的數值不變。在以矽為摻質的一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,較佳為5E18 cm-3
~5E19 cm-3
;摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
,較佳為5E18 cm-3
~2E19 cm-3
。成核層102的晶格常數的起始值例如3.11±0.03Å,較佳為3.11±0.01Å;晶格常數的結束值例如3.18±0.03Å,較佳為3.18±0.01Å。成核層102的能隙例如沿厚度方向從6.13±1 eV至3.42±1 eV步階式降低,較佳為從6.13±0.5 eV至3.42±0.5 eV步階式降低。此外,圖4雖未顯示成核層102的鋁含量,但在此條件下,鋁含量沿厚度方向是步階式降低,且鋁含量的起始值例如80%~100%,較佳為90%~100%;鋁含量的結束值例如0~20%,較佳為0~10%;鋁含量的步階斜率例如-0.1%/步階~-50%/步階,較佳為-0.1%/步階~-10%/步階。
在圖5的成核層102中,摻雜濃度沿厚度方向為步階式降低,晶格常數沿厚度方向為步階式增加。在以矽為摻質的一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,較佳為5E18 cm-3
~5E19 cm-3
;摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
,較佳為5E18 cm-3
~2E19 cm-3
。成核層102的晶格常數的起始值例如3.151±0.03Å,較佳為3.151±0.01Å;晶格常數的結束值例如3.18±0.03Å,較佳為3.18±0.01Å。成核層102的能隙則沿厚度方向從4.78±1 eV至3.42±1 eV步階式降低,較佳為從4.78±0.5 eV至3.42±0.5 eV步階式降低。此外,圖5雖未顯示成核層102的鋁含量,但在此條件下,鋁含量沿厚度方向是步階式降低,且鋁含量的起始值例如10%~60%,較佳為40%~60%;鋁含量的結束值例如0~20%,較佳為0~10%;鋁含量的步階斜率例如-0.1%/步階~-50%/步階,較佳為-0.1%/步階~-10%/步階。
在圖6的成核層102中,摻雜濃度沿厚度方向為步階漸變式降低,晶格常數沿厚度方向為步階漸變式增加,且文中的「步階漸變式降低或增加」是指沿厚度方向由一段步階區域106a與一段漸變區域106b降低或增加的變化。在以矽為摻質的一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,較佳為5E18 cm-3
~5E19 cm-3
;摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
,較佳為5E18 cm-3
~2E19 cm-3
。成核層102的晶格常數的起始值例如3.11±0.03Å,較佳為3.11±0.01Å;晶格常數的結束值例如3.18±0.03Å,較佳為3.18±0.01Å。成核層102的能隙例如沿厚度方向從6.13±1 eV至3.42±1 eV步階漸變式降低,較佳為從6.13±0.5 eV至3.42±0.5 eV步階漸變式降低。此外,圖6雖未顯示成核層102的鋁含量,但在此條件下,鋁含量沿厚度方向是步階漸變式降低,且鋁含量的起始值例如80%~100%,較佳為90%~100%;鋁含量的結束值例如0~20%,較佳為0~10%;鋁含量的漸變斜率例如-0.1%/nm~-50%/nm,較佳為-0.1%/nm~-20%/nm;鋁含量的步階斜率例如-0.1%/步階~-50%/步階,較佳為-0.1%/步階~-10%/步階。
在圖7的成核層102中,摻雜濃度沿厚度方向為步階漸變式降低,晶格常數沿厚度方向為步階漸變式增加。在以矽為摻質的一實施例中,所述摻雜濃度的起始值在5E18 cm-3
~1E20 cm-3
,較佳為5E18 cm-3
~5E19 cm-3
;摻雜濃度的結束值在1E18 cm-3
~5E19 cm-3
,較佳為5E18 cm-3
~2E19 cm-3
。成核層102的晶格常數的起始值為3.151±0.03Å,較佳為3.151±0.01Å;晶格常數的結束值例如3.18±0.03Å,較佳為3.18±0.01Å。成核層102的能隙則沿厚度方向從4.78±1 eV至3.42±1 eV步階漸變式降低,較佳為從4.78±0.5 eV至3.42±0.5 eV步階漸變式降低。此外,圖7雖未顯示成核層102的鋁含量,但在此條件下,鋁含量沿厚度方向為步階漸變式降低,且鋁含量的起始值例如10%~60%,較佳為40%~60%;鋁含量的結束值例如0~20%,較佳為0~10%;鋁含量的漸變斜率例如-0.1%/nm~-50%/nm,較佳為-0.1%/nm~-20%/nm;鋁含量的步階斜率例如-0.1%/步階~-50%/步階,較佳為-0.1%/步階~-10%/步階。
圖8是依照本發明的另一實施例的一種半導體裝置的剖面示意圖,其中使用與上一實施例相同或相似的元件符號表示相同或相似的構件,且相同的構件的說明可參照上一實施例,於此不再贅述。
請參照圖8,第二實施例之半導體裝置是以半導體功率元件為例,其中可包含圖1的磊晶結構(碳化矽基板100、成核層102以及氮化鎵層104)與阻障層108、閘極110、源極112、汲極114以及閘極絕緣層116。氮化鎵層104可作為通道層而在接近阻障層108之界面處,因極化效應而產生二維電子氣(2DEG)。此外,如有其他需求還可於圖8的裝置中增設其他功能性膜層。然而,本發明並不限於此,凡是半導體裝置中包含上一實施例之磊晶結構,均為本發明的專利保護範圍。
綜上所述,本發明藉由具有特定摻雜濃度變化之氮化鋁鎵作為成核層,並將其設置於碳化矽基板與氮化鎵層之間,使氮化鎵與碳化矽之間的晶格不匹配降低,並藉此降低元件缺陷密度與順向電壓,進而提升半導體元件電性。
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100:碳化矽基板
102:成核層
104:氮化鎵層
106a:步階區域
106b:漸變區域
108:阻障層
110:閘極
112:源極
114:汲極
116:閘極絕緣層
圖1是依照本發明的一實施例的一種磊晶結構的剖面示意圖。
圖2是上述實施例的部分磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
圖3是上述實施例的部分磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
圖4是上述實施例的部分磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
圖5是上述實施例的部分磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
圖6是上述實施例的部分磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
圖7是上述實施例的部分磊晶結構沿厚度方向的摻雜濃度、能階及晶格常數的曲線圖。
圖8是依照本發明的另一實施例的一種半導體裝置的剖面示意圖。
100:碳化矽基板
102:成核層
104:氮化鎵層
Claims (10)
- 一種磊晶結構,包括: 碳化矽基板; 成核層,形成於所述基板上,所述成核層的材料為摻雜有摻質的氮化鋁鎵,所述成核層的晶格常數在3.08 Å~3.21 Å之間,所述成核層的鋁含量沿厚度方向由高變低,且所述成核層的摻雜濃度沿厚度方向由高變低,所述摻雜濃度的起始值在5E18 cm-3 ~1E20 cm-3 ,所述摻雜濃度的結束值在1E18 cm-3 ~5E19 cm-3 ;以及 氮化鎵層,形成於所述成核層上。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層中的所述摻質包括矽、鐵、鎂或碳。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層的鋁含量沿所述厚度方向為漸變式降低,所述摻雜濃度沿所述厚度方向為漸變式降低,所述成核層的所述晶格常數沿所述厚度方向為漸變式增加,且 所述鋁含量的起始值為80%~100%,所述鋁含量的結束值為0~20%,所述鋁含量的漸變斜率為-0.1%/nm~-20%/nm, 所述摻雜濃度的起始值在5E18 cm-3 ~5E19 cm-3 ,所述摻雜濃度的結束值在5E18 cm-3 ~2E19 cm-3 , 所述晶格常數的起始值為3.11±0.03Å,所述晶格常數的結束值為3.18±0.03Å,以及 所述成核層的能隙沿所述厚度方向從6.13±1 eV至3.42±1 eV漸變式降低。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層的鋁含量沿所述厚度方向為漸變式降低,所述摻雜濃度沿所述厚度方向為漸變式降低,所述成核層的所述晶格常數沿所述厚度方向為漸變式增加,且 所述鋁含量的起始值為10%~60%,所述鋁含量的結束值為0~20%,所述鋁含量的漸變斜率為-0.1%/nm~-20%/nm, 所述摻雜濃度的起始值在5E18 cm-3 ~5E19 cm-3 ,所述摻雜濃度的結束值在5E18 cm-3 ~2E19 cm-3 , 所述晶格常數的起始值為3.151±0.03Å,所述晶格常數的結束值為3.18±0.03Å,以及 所述成核層的能隙沿所述厚度方向從4.78±1 eV至3.42±1 eV漸變式降低。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層的鋁含量沿所述厚度方向為步階式降低,所述摻雜濃度沿所述厚度方向為步階式降低,所述成核層的所述晶格常數沿所述厚度方向為步階式增加,且 所述鋁含量的起始值為80%~100%,所述鋁含量的結束值為0~20%,所述鋁含量的步階斜率為-0.1%/步階~-50%/步階, 所述摻雜濃度的起始值在5E18 cm-3 ~5E19 cm-3 ,所述摻雜濃度的結束值在5E18 cm-3 ~2E19 cm-3 , 所述晶格常數的起始值為3.11±0.03Å,所述晶格常數的結束值為3.18±0.03Å,以及 所述成核層的能隙沿所述厚度方向從6.13±1 eV至3.42±1 eV步階式降低。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層的鋁含量沿所述厚度方向為步階式降低,所述摻雜濃度沿所述厚度方向為步階式降低,所述成核層的所述晶格常數沿所述厚度方向為步階式增加,且 所述鋁含量的起始值為10%~60%,所述鋁含量的結束值為0~20%,所述鋁含量的步階斜率為-0.1%/步階~-50%/步階, 所述摻雜濃度的起始值在5E18 cm-3 ~5E19 cm-3 ,所述摻雜濃度的結束值在5E18 cm-3 ~2E19 cm-3 , 所述晶格常數的起始值為3.151±0.03Å,所述晶格常數的結束值為3.18±0.03Å,以及 所述成核層的能隙沿所述厚度方向從4.78±1 eV至3.42±1 eV步階式降低。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層的鋁含量沿所述厚度方向為步階漸變式降低,所述摻雜濃度沿所述厚度方向為步階漸變式降低,所述成核層的所述晶格常數沿所述厚度方向為步階漸變式增加,且 所述鋁含量的起始值為80%~100%,所述鋁含量的結束值為0~20%,所述鋁含量的漸變斜率為-0.1%/nm~-50%/nm,所述鋁含量的步階斜率為-0.1%/步階~-50%/步階, 所述摻雜濃度的起始值在5E18 cm-3 ~5E19 cm-3 ,所述摻雜濃度的結束值在5E18 cm-3 ~2E19 cm-3 , 所述晶格常數的起始值為3.11±0.03Å,所述晶格常數的結束值為3.18±0.03Å,以及 所述成核層的能隙沿所述厚度方向從6.13±1 eV至3.42±1 eV步階漸變式降低。
- 如申請專利範圍第1項所述的磊晶結構,其中所述成核層的鋁含量沿所述厚度方向為步階漸變式降低,所述摻雜濃度沿所述厚度方向為步階漸變式降低,所述成核層的所述晶格常數沿所述厚度方向為步階漸變式增加,且 所述鋁含量的起始值為10%~60%,所述鋁含量的結束值為0~20%,所述鋁含量的漸變斜率為-0.1%/nm~-50%/nm,所述鋁含量的步階斜率為-0.1%/步階~-50%/步階, 所述摻雜濃度的起始值在5E18 cm-3 ~5E19 cm-3 ,所述摻雜濃度的結束值在5E18 cm-3 ~2E19 cm-3 , 所述晶格常數的起始值為3.151±0.03Å,所述晶格常數的結束值為3.18±0.03Å,以及 所述成核層的能隙沿所述厚度方向從4.78±1 eV至3.42±1 eV步階漸變式降低。
- 如申請專利範圍第5~8項中任一項所述的磊晶結構,其中所述成核層是由2至50層的薄膜層所構成。
- 一種半導體裝置,包括申請專利範圍第1~9項中任一項所述的磊晶結構。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108142106A TWI772715B (zh) | 2019-11-20 | 2019-11-20 | 磊晶結構與半導體裝置 |
US16/952,105 US11456362B2 (en) | 2019-11-20 | 2020-11-19 | Epitaxial structure and semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108142106A TWI772715B (zh) | 2019-11-20 | 2019-11-20 | 磊晶結構與半導體裝置 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202121491A true TW202121491A (zh) | 2021-06-01 |
TWI772715B TWI772715B (zh) | 2022-08-01 |
Family
ID=75909301
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW108142106A TWI772715B (zh) | 2019-11-20 | 2019-11-20 | 磊晶結構與半導體裝置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US11456362B2 (zh) |
TW (1) | TWI772715B (zh) |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007059719A (ja) | 2005-08-25 | 2007-03-08 | Nippon Telegr & Teleph Corp <Ntt> | 窒化物半導体 |
CN101390201B (zh) * | 2005-12-28 | 2010-12-08 | 日本电气株式会社 | 场效应晶体管和用于制备场效应晶体管的多层外延膜 |
JP2011071356A (ja) * | 2009-09-26 | 2011-04-07 | Sanken Electric Co Ltd | 半導体装置 |
US8604461B2 (en) | 2009-12-16 | 2013-12-10 | Cree, Inc. | Semiconductor device structures with modulated doping and related methods |
KR20150085724A (ko) * | 2014-01-16 | 2015-07-24 | 엘지전자 주식회사 | 질화물 반도체 소자 및 그 제조 방법 |
EP3366807B1 (en) * | 2015-10-21 | 2021-03-17 | Air Water Inc. | Compound semiconductor substrate provided with sic layer |
US9680056B1 (en) * | 2016-07-08 | 2017-06-13 | Bolb Inc. | Ultraviolet light-emitting device with a heavily doped strain-management interlayer |
US10211297B2 (en) * | 2017-05-03 | 2019-02-19 | Globalwafers Co., Ltd. | Semiconductor heterostructures and methods for forming same |
US11262604B2 (en) * | 2018-05-11 | 2022-03-01 | Raytheon Bbn Technologies Corp. | Photonic devices |
-
2019
- 2019-11-20 TW TW108142106A patent/TWI772715B/zh active
-
2020
- 2020-11-19 US US16/952,105 patent/US11456362B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11456362B2 (en) | 2022-09-27 |
TWI772715B (zh) | 2022-08-01 |
US20210151570A1 (en) | 2021-05-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI585863B (zh) | 適於具有異質基板的三族氮化物元件的緩衝層結構 | |
JP5665171B2 (ja) | Iii族窒化物半導体電子デバイス、iii族窒化物半導体電子デバイスを作製する方法 | |
JP6113135B2 (ja) | 半導体フィールドプレートを含むiii−v族トランジスタ | |
WO2011118099A1 (ja) | 電界効果トランジスタ、電界効果トランジスタの製造方法、および電子装置 | |
WO2014181856A1 (ja) | 窒化物半導体素子 | |
WO2014121710A1 (zh) | 一种氮化物功率器件及其制造方法 | |
JP2010171032A (ja) | 窒化物半導体装置形成用基板及び窒化物半導体装置 | |
CN104241352A (zh) | 一种具有极化诱导掺杂高阻层的GaN基HEMT结构及生长方法 | |
CN102931230B (zh) | 铝镓氮做高阻层的双异质结氮化镓基hemt及制作方法 | |
CN112436056A (zh) | 高电子迁移率晶体管 | |
JP2010040828A (ja) | 窒化物半導体装置 | |
TWI574407B (zh) | 半導體功率元件 | |
WO2018098952A1 (zh) | 氮化镓基外延结构、半导体器件及其形成方法 | |
JPWO2017199792A1 (ja) | 炭化珪素エピタキシャル基板および炭化珪素半導体装置 | |
CN106601790A (zh) | 纵向调制掺杂氮化镓基场效应晶体管结构及其制作方法 | |
US20210148007A1 (en) | Epitaxial structure | |
TW202121491A (zh) | 磊晶結構與半導體裝置 | |
CN109638066A (zh) | 含有组分渐变高阻缓冲层的双异质结hemt及其制作方法 | |
CN116153993A (zh) | 半导体结构及其形成方法 | |
TWI671801B (zh) | 磊晶結構 | |
US9240474B2 (en) | Enhanced GaN transistor and the forming method thereof | |
TWI785864B (zh) | 半導體基板以及電晶體 | |
US20230352538A1 (en) | Applications of two-dimensional silicon carbide as the channel layer in field-effect transistors | |
US20230045328A1 (en) | Semiconductor structure | |
US20230132155A1 (en) | Semiconductor substrate with balanced stress |