TW201905682A - 正則化之參數調適 - Google Patents

正則化之參數調適

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Publication number
TW201905682A
TW201905682A TW107120638A TW107120638A TW201905682A TW 201905682 A TW201905682 A TW 201905682A TW 107120638 A TW107120638 A TW 107120638A TW 107120638 A TW107120638 A TW 107120638A TW 201905682 A TW201905682 A TW 201905682A
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Taiwan
Prior art keywords
channel parameters
regularized
input signal
circuit
adaptation algorithm
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TW107120638A
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English (en)
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TWI701591B (zh
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馬克斯 梅洛
杰森 貝羅拉都
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美商司固科技公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
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    • H04B1/16—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
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    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
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    • G11B5/58—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
    • G11B5/596—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
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Abstract

一種設備可包括一電路，該電路經組態以使用一組通道參數處理至少一個輸入信號。該電路可使用一正則化之調適演算法調適一第一組通道參數以供該電路使用，作為處理該至少一個輸入信號之該組通道參數，該正則化之調適演算法懲罰該第一組通道參數與一對應的預定之第二組通道參數之偏差。然後，電路可使用第一組通道參數作為該組通道參數來執行該至少一個輸入信號之處理。

Description

正則化之參數調適
本申請案係關於一種用於正則化之參數調適之設備、系統、及方法。
本揭露大致上可關於正則化之參數調適，且在一些實施例中，本揭露可關於在一多讀取頭系統中之一多輸入單輸出(MISO)均衡器之參數的正則化之參數調適。
在某些實施例中，一種設備可包括一電路，該電路經組態以使用一組通道參數處理至少一個輸入信號。該電路可使用一正則化之調適演算法調適一第一組通道參數以供該電路使用，作為處理該至少一個輸入信號之該組通道參數，該正則化之調適演算法懲罰該第一組通道參數與一對應的預定之第二組通道參數之偏差。然後，電路可使用第一組通道參數作為該組通道參數來執行該至少一個輸入信號之處理。
在某些實施例中，一種系統可包括一通道電路及一調適電路，該通道電路經組態以使用一組通道參數處理至少一個輸入信號該調適電路經組態以使用一正則化之調適演算法調適一第一組通道參數以供該通道電路使用，作為處理該至少一個輸入信號之該組通道參數， 該正則化之調適演算法懲罰該第一組通道參數與一預定之對應的第二組通道參數之偏差。
在某些實施例中，一種方法可包括由一經組態以使用一組通道參數及使用一正則化之調適演算法處理至少一個輸入信號之電路來調適一第一組通道參數以供該電路使用，作為處理該至少一個輸入信號之該組通道參數，該正則化之調適演算法懲罰該第一組通道參數與一對應的預定之第二組通道參數之偏差。另外，該方法可包括：使用第一組通道參數作為該組通道參數來執行該至少一個輸入信號之處理。
100‧‧‧系統/通訊通道
102‧‧‧讀取頭
104‧‧‧讀取頭
106‧‧‧磁軌
108‧‧‧表面
110‧‧‧前端處理電路
112‧‧‧前端處理電路
114‧‧‧MISO均衡器
116‧‧‧調適组件
118‧‧‧偵測器
120‧‧‧正則化資料
122‧‧‧連續時間輸入信號/信號
124‧‧‧連續時間輸入信號/信號
126‧‧‧數位化樣本序列
128‧‧‧數位化樣本序列
130‧‧‧均衡化樣本序列
132‧‧‧參數
134‧‧‧資料序列/值
136‧‧‧寫入資料
200‧‧‧系統
202‧‧‧有限脈衝響應(FIR)濾波器/FIR 1
204‧‧‧有限脈衝響應(FIR)濾波器/FIR 2
206‧‧‧目標
208‧‧‧調適器
210‧‧‧加法器
212‧‧‧加法器
214‧‧‧數位化樣本序列
216‧‧‧數位化樣本序列
218‧‧‧參數
220‧‧‧參數
222‧‧‧中間均衡化樣本序列
224‧‧‧中間均衡化樣本序列
226‧‧‧均衡化樣本序列
228‧‧‧參數
230‧‧‧決定資料
232‧‧‧目標均衡化樣本序列
234‧‧‧誤差
300‧‧‧流程圖
302‧‧‧方塊
304‧‧‧方塊
306‧‧‧方塊
308‧‧‧方塊
310‧‧‧方塊
312‧‧‧方塊
314‧‧‧方塊
316‧‧‧方塊
318‧‧‧方塊
400‧‧‧流程圖
402‧‧‧方塊
404‧‧‧方塊
406‧‧‧方塊
408‧‧‧方塊
410‧‧‧方塊
412‧‧‧方塊
414‧‧‧方塊
500‧‧‧系統
502‧‧‧系統處理器
504‧‧‧記憶體
506‧‧‧緩衝器
508‧‧‧資料儲存媒體
510‧‧‧讀取/寫入(R/W)通道
512‧‧‧主機介面電路
514‧‧‧主機裝置/主機
516‧‧‧DSD
518‧‧‧方塊
圖1係根據本揭露之某些實施例，包括正則化之參數調適之一通訊通道之方塊圖；圖2係根據本揭露之某些實施例，包括正則化之參數調適之一通訊通道之一部分之方塊圖；圖3係根據本揭露之某些實施例，一正則化之參數調適之方法之流程圖；圖4係根據本揭露之某些實施例，一正則化之參數調適之方法之流程圖；圖5係根據本揭露之某些實施例，包括正則化之參數調適之一系統之方塊圖。
在以下對實施例之詳細說明中，參照了隨附圖式，其構成該詳細說明之一部分且其中藉由圖解之方式進行展示。應當理解，可組合各種所述實施例之特徵，可利用其他實施例，且在不脫離本揭露之範圍的情况下可進行結構變化。亦應當理解，在不脫離本揭露之範圍的情况下，可組合、交換、或移除本文之各種實施例及實例之特徵。
根據各種實施例，本文所述之方法及功能可經實施為在一電腦處理器或控制器上運行之一或多個軟體程式。根據另一個實施例，本文所述之方法及功能可經實施為在一計算裝置(諸如使用磁碟驅動器之個人電腦)上運行之一或多個軟體程式。專用硬體實施方案，包括但不限於特定應用積體電路、可程式化邏輯陣列、及可同樣經建構以實施本文所述之方法及功能之其他硬體裝置。此外，本文所述之方法可經實施為一電腦可讀的儲存媒體或裝置，其包括在經執行時使一處理器執行該等方法之指令。
本揭露大致上可關於正則化之參數調適，且在一些實施例中，本揭露可關於在一多讀取頭系統中之一多輸入單輸出(MISO)均衡器之參數的正則化之參數調適。
一些系統，諸如電氣、電子、電動機驅動、處理、或其他系統可接收一關注之信號且基於參數來處理該信號。例如，一通訊系統或一磁性記錄儲存系統之一讀取通道可利用調適性參數來處理至少一個輸入信號。在一些多讀取器或多接收器系統中，一偵測器可基於由一MISO均衡器產生之一均衡化樣本序列來產生一資料序列，該MISO均衡器接收對應於各別讀取頭之複數個數位化樣本序列。一調適組件可 包括用於調適MISO均衡器之參數之各種調適性函數或演算法。例如，該等調適性參數可係MISO均衡器內的複數個有限脈衝響應濾波器(FIR)之係數或抽頭。例如，在一些實施例中，一MISO均衡器可基於已使用一正則化之調適演算法調適之參數來產生一均衡化樣本序列。在一些實例中，一正則化之調適演算法可利用或可基於一價值函數，該價值函數可懲罰或抑制與一組已知參數值(例如，預定之抽頭值)之偏差。
下文參照圖1討論此類系統之一實例。
參照圖1，展示了包括正則化之參數調適之一通訊通道之方塊圖，且通常將其指定為100。更具體而言，圖1可繪示包括正則化之參數調適之一多讀取器磁性儲存系統之一讀取通道之實例實施例。系統100可包括兩個讀取頭，即讀取頭102及讀取頭104，其等可自一磁性儲存媒體之一表面108上之一磁軌106進行讀取。讀取頭102及104可經耦接至各別前端處理電路110及112(例如，經繪示為對110及112之輸入)。前端處理電路110及112可經耦接至一MISO均衡器114。MISO均衡器114可經耦接至一偵測器118。偵測器118可經耦接至一調適組件116及一輸出(例如，自通訊通道100之一輸出或至一解碼器(未圖示)之輸出)。調適組件116可經連接至MISO均衡器114。調適組件116亦可包括用於儲存正則化資料120之一記憶體，或可存取經儲存在一單獨記憶體(未圖示)中之正則化資料120。
讀取頭102及104、前端處理電路110及112、MISO均衡器114、偵測器118、及調適組件116之各者可係一單獨電路、一系 統單晶片(SOC)、韌體、(多個)處理器、或未列出之其他系統、或其任何組合。
如上所述，讀取頭102及104可自一磁性儲存媒體之一表面108上之一磁軌106進行讀取。讀取頭102及104可各自產生一連續時間輸入信號x1(t) 122及x2(t) 124且可分別提供該連續時間輸入信號x1(t) 122及x2(t) 124至前端處理電路110及112。
前端處理電路110可應用增益、濾波、取樣、及遲延函數至連續時間輸入信號x1(t) 122以產生數位化樣本序列x1 126。在一些實施例中，前端處理電路可包括各種組件，諸如類比前端(AFE)及類比數位轉換器(ADC)。相似地，前端處理電路112可應用增益、濾波、取樣、及遲延函數至連續時間輸入信號x2(t) 124以產生數位化樣本序列x2 128。例如，在應用增益及濾波函數至連續時間輸入信號(例如，藉由一可變增益放大器及一基於類比之濾波器)之後，前端處理電路110及112可按規則間隔對各別連續時間信號取樣且可量化各別信號以產生各別數位化樣本序列x1 126及x2 128。前端處理電路110及112然後可應用一遲延至x1 126及x2 128中之一者或兩者以同步讀取頭102及讀取頭104之讀取位置(例如，以補償讀取頭102及104之下行磁軌隔距(在圖1之視圖中經圖示係垂直隔距))。前端處理電路110及112然後可輸出x1 126及x2 128至MISO均衡器114。
MISO均衡器114可接收數位化樣本序列x1 126及x2 128及參數p 132且產生一均衡化樣本序列y 130。
MISO均衡器114可係一濾波器。通常，MISO均衡器可組合複數個輸入信號以產生單個輸出信號，該輸出信號可經提供至一處理器、通道、緩衝器、其他電路、或其任何組合。例如，一MISO均衡器可係一N輸入(例如，其中N可係讀取頭之數目)調適性均衡器，其包括具有L個抽頭之N個有限脈衝響應濾波器。在一些實例中，L個抽頭可係可經應用至不同輸入之加權因子(例如，光譜加權)。然而，實施方案不限於此。在其他實施方案中，MISO均衡器可執行一簡單平均或加權平均。如下文更詳細地討論，MISO均衡器114之抽頭或參數p 132可藉由調適組件116來調適且接收自調適組件。
偵測器118可操作以基於均衡化樣本序列y 130來判定(或估計)對應於信號x1(t) 122及x2(t) 124之位元值的一資料序列b 134。在一些實施例中，資料序列b 134可代表各位元係零或一之機率。值134可經表示為此等概率之比率之對數，且可被稱為對數相似比或LLR。偵測器118可起作用以基於一通道響應(例如各可能寫入/傳輸資料圖案之預期通道輸出)之知識而產生該等LLR值。在一些實例中，偵測器118可採用一軟輸出維特比演算法(SOVA)。此外，偵測器118可係一迭代解碼單元，且除了一偵測器之外亦包括一解碼器(例如，一SOVA偵測器及一低密度同位核對(LDPC)解碼器)。替代地或額外地，偵測器118可操作以判定(或估計)位元值之資料序列b 134，作為對各位元是否係零或一之決定。
調適組件116可操作以接收均衡化樣本序列y 130、資料序列b 134、或已知的寫入資料t 136，且調適MISO均衡器114之參數p 132。
可基於調適演算法之正則化型式來調適MISO均衡器114之抽頭或參數p 132，該等調適演算法之正則化型式諸如：正則化之最小均方(LMS)演算法、正則化之最小位元誤差率(MBER)演算法、或正則化之遞迴最小平方(RLS)演算法。在一些實例中，一多讀取頭硬碟驅動器讀取通道之一MISO均衡器可利用一正則化之調適演算法，該正則化之調適演算法可懲罰或抑制與可儲存為正則化資料120之先前判定之磁軌上(on-track)讀取參數之偏差。例如，調適組件116可使用LMS或其他調適性演算法來調適MISO均衡器114之參數p 132，以最小化均方誤差、位元誤差率、或其他調適性基準之正則化型式。
正則化資料120可在製造期間或現場之訓練程序期間產生。在一硬碟驅動器或其參數在媒體上變化之其他裝置的情况下，可針對各儲存單元(例如，磁區、頁等)或針對可對應於磁軌群組之較大區域或區(其係下文討論之實例中之情况)產生正則化資料120。在正則化資料之產生期間，可使用已知的寫入資料及(例如)來自磁軌上讀取期間之讀取信號之樣本產生參數集。然後可儲存所產生之參數集，用作正常操作期間之正則化參數。
下文參考圖2提供了一實例正則化之調適程序之額外細節。
在本文所討論之實例中，經調適之參數係MISO均衡器之參數。雖然本文之討論利用一讀取通道之一MISO均衡器之參數作為實例，但所揭示之技術及系統可適用於其他電路或參數。鑒於本揭露，許多變型對於所屬技術領域中具有通常知識者而言將係顯而易見的。
參照圖2，展示了包括正則化之參數調適之一通訊通道之一部分之方塊圖，且通常將其指定為200。更具體而言，圖2繪示了圖1所繪示之多讀取器磁性儲存系統100之MISO均衡器114及調適組件116之更詳細的實例實施例。
如上所述，系統200可包括MISO均衡器114及調適組件116。MISO均衡器114可包括兩個有限脈衝響應(FIR)濾波器，FIR 1 202及FIR 2 204，其各自可經耦接至一加法器212。加法器212可經耦接至調適組件116之一加法器210且經耦接至一輸出(例如，至未圖示之一偵測器或解碼器)。加法器210可經耦接至一調適器208，該調適器可經耦接至MISO均衡器114之FIR 1 202及FIR 2 204且經耦接至調適組件116之一目標206。目標206可經耦接至加法器210。調適器208亦可包括用於儲存正則化資料120之一記憶體，或可存取經儲存在一單獨記憶體(未圖示)中之正則化資料120。FIR 1 202、FIR 2 204、加法器210及212、目標206、及調適器208之各者可係一單獨電路、一系統單晶片(SOC)、韌體、(多個)處理器、或未列出之其他系統、或其任何組合。
在操作中，FIR 1 202及FIR 2 204可接收來自各別ADC之各別數位化樣本序列x1 214及x2 216(例如，其可對應於數位化樣 本序列x1 126及x2 128)與來自調適器208之參數h1 218及h2 218。使用參數h1 218及h2 218(例如，作為抽頭權重或係數)，FIR 1 202及FIR 2 204可對各別數位化樣本序列x1 214及x2 216執行濾波功能，以產生各別中間均衡化樣本序列y1 222及y2 224。加法器212可接收且組合(例如，加總)中間均衡化樣本序列y1 222及y2 224以產生一均衡化樣本序列y 226。
目標206可接收來自調適器208之參數t 228及決定資料b 230(或已知的寫入資料)。基於t 228及b 230，目標206可例如藉由執行一目標響應濾波功能來產生一目標均衡化樣本序列yt 232。
加法器210可接收均衡化樣本序列y 226及目標均衡化樣本序列yt 232。加法器210可判定誤差e 234作為y 226與yt 232之間的差異(例如，藉由y 226減去yt 232)。
調適器208可接收誤差e 234。調適器208可使用一正則化之調適演算法，基於誤差234及正則化資料120來調適參數h1 218及h2 220。取決於該實施方案，調適器208可使用一正則化或標準調適演算法來調適參數t 228。例如，在正常操作期間，可暫停對參數t 228之調適。在此類情况下，參數t 228之調適之正則化不會提供超過標準調適之有益效果。下文提供了一實例正則化之調適演算法及可用以正則化該調適演算法之實例變體之細節。
在一些實例中，FIR濾波器FIR 1 202及FIR 2 204之參數可使用一正則化之最小均方誤差(MMSE)價值函數且在特定實例中使用一正則化之最小均方(LMS)隨機梯度下降調適演算法來調適。在 FIR輸入係類似時(例如，當讀取信號具有相似或同等品質時)之時間段期間，MISO均衡器中之標準LMS調適可能係病態的。這可導致誤差234之誤差表面係平坦的或具有淺斜率。這繼而可導致參數或係數回應於該等類似輸入中之微小差異而隨機地漂移。一旦MISO均衡器之參數或係數已漂移，則當該等輸入(例如)自離軌(off-track)讀取偏離時，可能會產生效能損失。具體而言，對於離軌讀取，此漂移或病態可提供對參數或係數之隨機初始化，使其可能遠離正確的權重。因而，歸因於存在增加的用以返回至良態參數或係數之瞬態時間，效能可能會損失。
在一些實施例中，使用一正則化之最小均方誤差(MMSE)價值函數且具體而言使用最小均方(LMS)隨機梯度下降調適演算法，可避免上文討論之漂移。如上所述，正則化一調適演算法可包括添加對與先前判定之磁軌上讀取參數之偏差之一懲罰或抑制至價值函數或調適演算法。
在一標準MMSE調適中，經最小化之價值函數可係：
一正則化之MMSE價值函數可懲罰與預定值h1,reg及h2,reg之參數或權重偏差。如上所述，預定值h1,reg及h2,reg可自正則化資料120加載且例如可係以下參數：其調適在與目前磁軌或磁區相關聯之區或區域之磁軌上讀取期間係會聚的。
一實例正則化之MMSE價值函數可寫為： 其中X係一正則化參數，其可判定價值函數之正則化項之一相對權重。換言之，X經設定愈大，對與預定值h1,reg及h2,reg之偏差施加之懲罰愈高。
基於以上實例正則化之MMSE價值函數，標準LMS係數更新方程式(其可使用相對於該係數之J的近似梯度)：h 1,i →h 1,i -μx 1,j -i＊e j h 2,i →h 2,i -μx 2,j -i＊e j ,可經修改為：h 1,i →h 1,i -μx 1,j-i ＊e j -λ(h 1,i -h 1,reg,i ) h 2,i →h 2,i -μx 2,j-i ＊e j -λ(h 2,i -h 2,reg,i ).其中i可係係數指標，且j可係時間指標。
如上所述，在一多讀取器HDD系統中，針對一MISO均衡器之正則化之係數h1,reg及h2,reg之良好選擇可係磁軌上調適之參數。在此情況下，正則化可防止參數自一磁軌上最佳值漂移太多。
在本文所討論之實例中，經調適之參數可係MISO均衡器之參數。雖然本文之討論利用一讀取通道之一MISO均衡器之參數作為實例，但所揭示之技術及系統可適用於其他電路或參數，且可使用不同於上述彼等者的經修改之價值函數或經修改之調適演算法。例如，在 包括在正常操作之目標調適之一系統中，正則化之MMSE價值函數及正則化之LMS演算法皆可包括t 228及b 230之項。
鑒於本揭露，許多其他變型對於所屬技術領域中具有通常知識者而言將係顯而易見的。例如，正則化之另一使用可係實施一軟飽和。例如，在最小BER(MBER)調適之一些實施方案中，一硬飽和約束可用以限制MBER參數自最小平方(LS)參數移動得太遠。此類漂移可導致定點飽和且降低效能。硬飽和可防止調適使係數移動至某個點之外。例如，若一係數係欲飽和至+7之值，則系統可防止係數之調適移動至高於+7(例如，使用韌體或類似電路邏輯中之若則敘述)。在本文所揭示之主題之一些實例中，引入正則化可將一額外項添加至MBER價值函數，以懲罰自LS值之移動。此優於硬飽和，因為本文所揭示之正則化可在係數之變化產生價值函數之減少時允許係數移動，而同時提供與硬飽和所提供者類似之漂移約束。
參照圖3，展示了一種正則化之參數調適之流程圖，且通常將其指定為300。更具體而言，流程圖300可係用以產生如上文相對於圖1及圖2(例如，針對一目前區)所詳述之正則化資料120之製造操作或訓練操作。
在302處，該系統可在一磁軌上讀取期間接收一第一讀取頭之一第一連續時間輸入信號之第一複數個樣本、及一第二讀取頭之一第二連續時間輸入信號之第二複數個樣本。然後，在304處，系統可施加一遲延至第一複數個樣本或第二複數個樣本，以同步第一讀取頭及第二讀取頭之讀取位置。在306處，系統可基於第一連續時間輸入信號 產生一第一數位化樣本序列且基於第二連續時間輸入信號產生一第二數位化樣本序列。
接著，在308處，系統可基於第一數位化樣本及一或多個第一參數產生一第一經濾波之樣本序列且基於第二數位化樣本及一或多個第二參數產生一第二經濾波之樣本序列。在310處，系統可組合第一經濾波之樣本序列及第二經濾波之樣本序列以產生可係一均衡化樣本序列之一MISO輸出。在312處，系統可基於偵測器決定或已知資料及一通道脈衝響應來產生一目標樣本序列。
然後，在314處，系統可基於目標樣本序列與均衡化樣本序列之間的一誤差，使用例如LMS調適來調適該(等)第一參數及該(等)第二參數。雖然LMS調適經用作一實例調適演算法，但是其他調適演算法亦可用於第一參數及第二參數之調適。
然後，在316處，系統可判定該(等)第一參數及該(等)第二參數是否已穩定。若該等參數已穩定，則在318處，系統可儲存目前區之該(等)第一參數及該(等)第二參數(例如，作為正則化資料120)。若參數尚未穩定，則系統可返回至308以進行額外的調適操作。雖然未圖示，但在一些實施例中，當參數尚未穩定或可針對新的樣本執行穩定性判定時，亦可重複額外的操作，諸如操作302至306中之一或多者，直至對於該區之資料樣本，該等參數已大致上穩定。
參照圖4，展示了一種正則化之參數調適之流程圖，且通常將其指定為400。更具體而言，流程圖400可係在讀取或接收操作 期間所執行的取樣、均衡、及正則化之參數調適操作，且可如上文相對於圖1及圖2所詳述者經執行。
在操作中，在402處，系統可例如針對一目前資料磁區而接收一第一讀取頭之一第一連續時間輸入信號之第一複數個樣本、及一第二讀取頭之一第二連續時間輸入信號之第二複數個樣本。在404處，系統可施加一遲延至第一複數個樣本或第二複數個樣本，以同步第一讀取頭及第二讀取頭之讀取位置。接著，在406處，系統可基於第一連續時間輸入信號產生一第一數位化樣本序列且基於第二連續時間輸入信號產生一第二數位化樣本序列。
在408處，系統可基於第一數位化樣本及第一參數產生一第一經濾波之樣本序列且基於第二數位化樣本及第二參數產生一第二經濾波之樣本序列。如上所述，該等參數可係權重、係數等，用作一MISO均衡器之複數個FIR濾波器之抽頭值。該等參數可藉由一調適組件調適且自調適組件經供應至MISO均衡器。接下來，在410處，系統可組合第一經濾波之樣本序列及第二經濾波之樣本序列以產生可係一均衡化樣本序列之一MISO輸出。
在412處，系統可基於偵測器決定或已知資料及一通道脈衝響應來產生一目標樣本序列。最後，在414處，系統可基於目標樣本序列及經組合之均衡化樣本序列(例如基於兩者之間的差異)，使用正則化之LMS調適來調適該(等)第一參數及該(等)第二參數。
方法300及400中列出之所有步驟可應用於具有調適性參數之系統。如上所述，其他調適演算法可取代MMSE，且此等程序 可用於諸如解碼器、均衡器、ADC等其他電路之參數。此外，鑒於本揭露，所屬技術領域中具有通常知識者將理解，讀取頭或輸入信號之數目可大於兩個(例如複數個)。鑒於本揭露，許多其他變體將係顯而易見的。用以執行該方法中之操作之組件及電路可係離散的、整合進一系統單晶片(SOC)、或其他電路。此外，該等步驟可在一處理器(例如，一數位信號處理器)中執行、以軟體實施、經由韌體實施、或藉由其他手段實施。
參照圖5，展示了包括正則化之參數調適之一系統之方塊圖，且通常將其指定為500。系統500可係一資料儲存裝置(DSD)之實例，且可係系統100及200之實例實施方案。DSD 516可可選地連接至一主機裝置514且可自該主機裝置移除，該主機裝置可係具有儲存資料之裝置或系統，諸如桌上型電腦、膝上型電腦、伺服器、數位視訊記錄器、影印機、電話機、音樂播放器、未列出之其他電子裝置或系統、或其任何組合。資料儲存裝置516可經由基於硬體/韌體之主機介面電路512與主機裝置514通訊，該主機介面電路可包括一連接器(未圖示)，該連接器允許DSD 516與主機514物理連接及斷開。
DSD 516可包括一系統處理器502(其可係一可程式化控制器)及相關聯之記憶體504。系統處理器502可係一系統單晶片(SOC)之一部分。一緩衝器506可臨時儲存讀取及寫入操作期間之資料，且可包括一命令佇列。讀取/寫入(R/W)通道510可編碼寫入操作期間之資料至資料儲存媒體508且自該資料儲存媒體重建讀取期間之資 料。資料儲存媒體508被展示且描述為一硬碟驅動器，但亦可係其他類型之磁性媒體，諸如快閃媒體、光學媒體、或其他媒體、或其任何組合。
R/W通道510可同時自多於一個資料儲存媒體接收資料，且在一些實施例中，亦可並行地接收多個資料信號，諸如來自一讀取頭之多於一個輸出。例如，具有二維磁性記錄(TDMR)系統之儲存系統可具有多個讀取或記錄元件，且可同時或幾乎同時自兩個磁軌讀取。多維記錄(MDR)系統可接收來自多個源(例如，記錄頭、快閃記憶體、光學記憶體等)之兩個或更多個輸入。如本文之實例中所述，R/W通道510可組合多個輸入且提供單個輸出。
方塊518可實施系統及方法100、200、300、及400之系統及功能性之全部或部分。在一些實施例中，方塊518可係一單獨電路、整合進R/W通道510、包括在一系統單晶片、韌體、軟體、或其任何組合。
本文所述之圖解、實例、及實施例意欲提供對各種實施例之結構之大致理解。該等圖解不意欲作為對利用本文所述之結構或方法之設備及系統的所有元件及特徵的完整描述。在查看本揭露後，許多其他實施例對於所屬技術領域中具有通常知識者而言可係顯而易見的。其他實施例可加以利用且衍生自本揭露，使得在不脫離本揭露之範圍的情况下可進行結構及邏輯取代及變化。例如，圖式及以上說明提供了可經改變(諸如，為了系統之設計要求)之架構及電壓之實例。此外，雖然本文繪示且描述了具體實施例，但應當理解，為達成相同或相似目的而設計的任何後續配置可取代所展示之具體實施例。
本揭露意欲涵蓋各種實施例之任何且全部後續調適或變型。在檢視本說明之後，以上實例之組合及本文未具體描述之其他實施例對於所屬技術領域中具有通常知識者而言將係顯而易見的。另外，該等圖解僅僅係代表性的，且可不按比例繪製。圖解中之某些比例可經放大，而其他比例可經縮小。因此，本揭露及圖式應被視係例示性的、而非限制性的。

Claims (20)

  1. 一種設備，其包含：一電路，其經組態以使用一組通道參數處理至少一個輸入信號，該電路進一步經組態以：使用一正則化之調適演算法調適一第一組通道參數以供該電路使用，作為處理該至少一個輸入信號之該組通道參數，該正則化之調適演算法懲罰該第一組通道參數與對應的預定之一第二組通道參數之偏差；及使用該第一組通道參數作為該組通道參數來執行該至少一個輸入信號之該處理。
  2. 如請求項1之設備，其進一步包含：該電路進一步包括一MISO均衡器，該MISO均衡器使用該組通道參數作為濾波器抽頭來執行該至少一個輸入信號之該處理。
  3. 如請求項2之設備，其進一步包含：該至少一個輸入信號係對應於複數個讀取頭之複數個數位信號。
  4. 如請求項3之設備，其進一步包含：該第二組通道參數係在一先前磁軌上讀取期間使用該正則化之調適演算法之一非正則化型式產生的。
  5. 如請求項3之設備，其進一步包含：一記憶體，其儲存該第二組通道參數；該至少一個輸入信號係基於由該複數個讀取頭自一磁性儲存媒體之一磁區讀取之讀回信號；及 該第二組通道參數對應於包括該磁區之該磁性儲存媒體之一區域。
  6. 如請求項3之設備，該電路進一步包含複數個類比數位轉換器(ADC)，該複數個數位信號之各者係由該複數個ADC中之一對應ADC產生；該MISO均衡器包含：複數個有限脈衝響應(FIR)濾波器，該組通道參數包括該複數個有限脈衝響應濾波器之濾波器抽頭，該複數個數位信號之各者係由該複數個有限脈衝響應濾波器中之一對應FIR濾波器處理；及一組合器電路，其組合該複數個FIR濾波器之該等輸出。
  7. 如請求項6之設備，其進一步包含：該電路進一步包括一偵測器，該偵測器對該MISO均衡器之該輸出執行位元偵測操作，該電路進一步經組態以：基於該偵測器之偵測器決定及一通道脈衝響應來判定一目標；基於該MISO均衡器輸出與該目標之差異來判定一誤差；及基於該誤差執行該調適。
  8. 如請求項1之設備，其進一步包含：該正則化之調適演算法係一正則化之LMS調適演算法或一正則化之MMSE調適演算法。
  9. 如請求項1之設備，其進一步包含：該正則化之調適演算法進一步包括一可調參數，該可調參數標度對該第一組通道參數與該第二組通道參數之偏差之懲罰。
  10. 一種系統，其包含：一通道電路，其經組態以使用一組通道參數處理至少一個輸入信號；一調適電路，其經組態以：使用一正則化之調適演算法調適一第一組通道參數以供該通道電路使用，作為處理該至少一個輸入信號之該組通道參數，該正則化之調適演算法懲罰該第一組通道參數與預定之對應的一第二組通道參數之偏差。
  11. 如請求項10之系統，其進一步包含：該通道電路係一多輸入單輸出(MISO)均衡器且該組通道參數係該MISO均衡器之過濾器抽頭。
  12. 如請求項11之系統，其進一步包含：該正則化之調適演算法係一正則化之LMS調適演算法或一正則化之MMSE調適演算法。
  13. 如請求項12之系統，其進一步包含：該正則化之調適演算法進一步包括一可調參數，該可調參數標度對該第一組通道參數與該第二組通道參數之偏差之懲罰。
  14. 如請求項11之系統，其進一步包含：該至少一個輸入信號係對應於複數個讀取頭之複數個數位信號。
  15. 如請求項14之系統，其進一步包含：一記憶體，該記憶體儲存該第二組通道參數，該第二組通道參數係在一先前磁軌上讀取期間使用該正則化之調適演算法之一非正則化型式產生的； 該至少一個輸入信號係基於由該複數個讀取頭自一磁性儲存媒體之一磁區讀取之讀回信號；及該第二組通道參數對應於包括該磁區之該磁性儲存媒體之一區域
  16. 如請求項11之系統，其進一步包含：複數個類比數位轉換器(ADC)，該複數個數位信號之各者係由該複數個ADC中之一對應ADC產生；該MISO均衡器包含：複數個有限脈衝響應(FIR)濾波器，該組通道參數包括該複數個有限脈衝響應濾波器之濾波器抽頭，該複數個數位信號之各者係由該複數個FIR濾波器中之一對應FIR濾波器處理；及一組合器電路，其組合該複數個FIR濾波器之該等輸出；一偵測器，其對該MISO均衡器之該輸出執行位元偵測操作；一目標電路，其經組態以：基於該偵測器之偵測器決定及一通道脈衝響應來判定一目標；基於該MISO均衡器輸出與該目標之差異來判定一誤差；及該調適電路進一步經組態以基於該誤差來執行該調適。
  17. 一種方法，其包含： 由一經組態以使用一組通道參數及使用一正則化之調適演算法處理至少一個輸入信號之電路來調適一第一組通道參數以供該電路使用，作為處理該至少一個輸入信號之該組通道參數，該正則化之調適演算法懲罰該第一組通道參數與一對應的預定之第二組通道參數之偏差；及使用該第一組通道參數作為該組通道參數來執行該至少一個輸入信號之該處理。
  18. 如請求項17之方法，其進一步包含：該電路包括一MISO均衡器，該MISO均衡器使用該組通道參數作為濾波器抽頭來執行該至少一個輸入信號之該處理。
  19. 如請求項18之方法，其進一步包含：該正則化之調適演算法係一正則化之LMS調適演算法或一正則化之MMSE調適演算法。
  20. 如請求項17之方法，其進一步包含：該至少一個輸入信號係一或多個數位化樣本序列，該一或多個數位化樣本序列對應於一磁性儲存媒體之一磁區；該第二組通道參數對應於包括該磁區之該磁性儲存媒體之一區域，且係在對經寫入包括該磁區之該磁性儲存媒體之該區域中之資料之一先前磁軌上讀取期間，使用該正則化之調適演算法之一非正則化型式產生的。
TW107120638A 2017-06-20 2018-06-15 用於正則化之參數調適之設備、系統、及方法 TWI701591B (zh)

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