TW201505498A - Hole-filling substrate with surface conductive film and production method thereof, and method for preventing expansion and peeling - Google Patents

Abstract

The present invention provides a hole-filling substrate, which includes an insulation substrate (2) having a main surface provided thereon a hole part; a conductive through hole part (3) formed by filling conductive filler into the hole part; and a surface conductive film (4) formed on a first main surface of the insulation substrate that includes the conductive through hole part, wherein the structure exposed from a partial surface at a main surface side of the conductive through hole part is employed to form the aforementioned surface conductive film. In addition, the aforementioned hole part is a through hole, and the aforementioned surface conductive film includes an electroplated coating layer.

Description

具有表面導電膜之孔填充基板及其製造方法、以及膨脹或剝離抑制方法 Hole-filled substrate having surface conductive film, method of manufacturing the same, and expansion or peeling suppression method

本發明係關於一種具有表面導電膜之孔填充基板及其製造方法、以及抑制上述表面導電膜之膨脹或剝離之方法，尤其是關於一種可用於各種電子機器之正面及背面導通基板(孔填充基板)及其製造方法、以及抑制上述表面導電膜之膨脹或剝離之方法。 The present invention relates to a hole-filled substrate having a surface conductive film, a method of manufacturing the same, and a method of suppressing expansion or peeling of the surface conductive film, and more particularly to a front and back conductive substrate (hole-filled substrate) which can be used in various electronic devices. And a method of manufacturing the same, and a method of suppressing expansion or peeling of the surface conductive film.

自先前以來，電子基板用於配置功能零件或形成配線電路。近年來，由於電子機器或零件之小型化、高功能化及積體化，故而於絕緣性基板形成貫通孔(通孔)並於貫通孔內設置導電材料使基板兩面電性導通之用途正不斷增加。進而，藉由利用導電材料(金屬)完全填充貫通孔內而提昇基板之厚度方向上之導熱率之具有所謂導熱孔(thermal via)功能之需求亦增加。 Electronic substrates have been used to configure functional parts or form wiring circuits since the beginning. In recent years, due to the miniaturization, high functionality, and integration of electronic devices and components, the use of through holes (through holes) in an insulating substrate and the provision of a conductive material in the through holes to electrically conduct both sides of the substrate are constantly being used. increase. Further, there is an increasing demand for a so-called thermal via function by which the conductive material (metal) is completely filled in the through hole to increase the thermal conductivity in the thickness direction of the substrate.

作為將基板兩面電性導通之方法，專利文獻1中揭示有於絕緣性基板之貫通孔之內壁部形成鍍Au層作為金屬層的方法，專利文獻2中揭示有利用鍍敷金屬完全填充形成於絕緣性基板之特定位置之大致鼓狀之透孔的方法。 As a method of electrically conducting both surfaces of the substrate, Patent Document 1 discloses a method in which an Au plating layer is formed as a metal layer on the inner wall portion of the through hole of the insulating substrate, and Patent Document 2 discloses that the plating metal is completely filled. A method of substantially drum-shaped through holes at specific locations on an insulating substrate.

然而，於該等方法中，作為形成鍍敷金屬之上一階段，必須於基板表面形成導電膜，而步驟變複雜，經濟性下降。又，若欲利用鍍敷金屬完全填充透孔，則鍍敷步驟需要較長時間，因此經濟性進一步下降。 However, in these methods, as a step on the formation of the plating metal, it is necessary to form a conductive film on the surface of the substrate, and the steps become complicated and the economy is lowered. Further, if the through hole is completely filled with the plating metal, the plating step takes a long time, and thus the economy is further lowered.

又，業界亦提出有於貫通孔填充導電性膏之方法，例如亦已知有如下方法：於貫通孔填充由金屬粉及硬化性樹脂構成之膏，進行硬化而獲得導電性填充通孔(填充有導電材料之貫通孔)。然而，於該方法中，導電材料含有樹脂成分，因此導電性較低，由於含有耐熱性較低之樹脂成分，因此基板之耐熱性亦受到限制。 In addition, a method of filling a conductive paste with a through-hole is also known. For example, a method in which a paste made of a metal powder and a curable resin is filled in a through hole and hardened to obtain a conductive filled via hole is filled. There are through holes for conductive materials). However, in this method, since the conductive material contains a resin component, the conductivity is low, and since the resin component having low heat resistance is contained, the heat resistance of the substrate is also limited.

因此，專利文獻3中提出有如下方法：於貫通孔填充由金屬粉末、玻璃粉末及有機黏合劑構成之膏，加熱至金屬之燒結溫度以上而燒結金屬粉末，從而獲得導電性填充通孔。該方法之簡便性優異，並且樹脂成分因焙燒而蒸發、分解，因此導電性、導熱性及耐熱性亦較高。 For this reason, Patent Document 3 proposes a method in which a paste composed of a metal powder, a glass powder, and an organic binder is filled in a through hole, and the metal powder is heated to a temperature higher than a sintering temperature of the metal to obtain a conductive filled through hole. This method is excellent in simplicity, and the resin component is evaporated and decomposed by baking, so that conductivity, thermal conductivity, and heat resistance are also high.

利用上述方法所獲得之孔填充基板通常將與填充孔部連接之表面導電膜積層於基板之表面而形成電極或配線圖案。為了獲得與填充通孔之導通(連接)，必須使上述表面導電膜與填充部重疊，為形成步驟之方便起見，以完全覆蓋填充孔部(開口部)之形態積層於基板表面。形成有上述圖案之孔填充基板通常於焊接等後續步驟中例如暴露在300℃以上之高溫下，但於填充孔部存在表面導電膜膨脹或剝離之情況。 The hole-filled substrate obtained by the above method generally laminates a surface conductive film connected to the filled hole portion on the surface of the substrate to form an electrode or a wiring pattern. In order to obtain conduction (connection) with the filling via hole, it is necessary to overlap the surface conductive film and the filling portion, and it is necessary to laminate the filling hole portion (opening portion) on the surface of the substrate in order to facilitate the formation step. The hole-filled substrate on which the above-described pattern is formed is usually exposed to a high temperature of 300 ° C or higher in a subsequent step such as soldering, but there is a case where the surface conductive film is expanded or peeled off at the filling hole portion.

[先前技術文獻] [Previous Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本專利特開平5-308182號公報 [Patent Document 1] Japanese Patent Laid-Open No. Hei 5-308182

[專利文獻2]日本專利特開2006-203112號公報 [Patent Document 2] Japanese Patent Laid-Open Publication No. 2006-203112

[專利文獻3]日本專利特開2010-108917號公報 [Patent Document 3] Japanese Patent Laid-Open Publication No. 2010-108917

因此，本發明之目的在於提供一種即便進行加熱亦可抑制於填充孔部(導電通孔部)之表面導電膜之膨脹或剝離產生的孔填充基板及 其製造方法、以及抑制上述表面導電膜之膨脹或剝離之方法。 Therefore, an object of the present invention is to provide a hole-filled substrate which can be prevented from being expanded or peeled off by a surface conductive film of a filling hole portion (conductive via portion) even when heated. A method of producing the same, and a method of suppressing expansion or peeling of the surface conductive film.

本發明之另一目的在於提供一種耐熱性及可靠性較高，即便長期或於嚴酷之條件下加熱或使用亦可維持導電性的孔填充基板及其製造方法、以及抑制上述表面導電膜之膨脹或剝離之方法。 Another object of the present invention is to provide a hole-filled substrate having high heat resistance and reliability, which can maintain electrical conductivity even under long-term or severe conditions, and a method for producing the same, and suppressing expansion of the surface conductive film. Or the method of stripping.

本發明者等人對在填充孔部(導電通孔部)之表面形成有鍍敷層之孔填充基板產生膨脹或剝離之原因進行了研究，結果查明，其與混入至填充通孔之液狀物於高溫下之加熱時汽化膨脹有關。詳細而言，於表面膜為鍍敷層之情形時，於對基板表面進行鍍敷加工時鍍敷液會進入至存在於填充通孔表面之空隙或多孔部(當於基板表面形成有鍍敷用基底層之情形時，沿表面整體或部分地附著有鍍敷用基底層的空隙或多孔部)中，而被其後形成之鍍敷膜封閉。又，亦存在源自導電性膏之殘留物(或有機物)等殘留於填充通孔內之情形。推測該等被封閉之液狀物等於高溫加熱時汽化膨脹，藉由該膨脹力而破壞鍍敷層與填充通孔之界面接合或填充通孔內部等，從而引起鍍敷層之膨脹或剝離。又，推測即便為鍍敷層以外之表面導電膜，填充通孔中所含之揮發性物質同樣被封閉在表面導電膜與填充通孔之間而產生同樣之現象。 The inventors of the present invention have studied the cause of swelling or peeling of the hole-filled substrate in which the plating layer is formed on the surface of the filled hole portion (conductive via portion), and as a result, it has been found that it is mixed with the liquid mixed into the through hole. The vaporization expansion is related to heating at high temperatures. In detail, when the surface film is a plating layer, the plating solution may enter the void or the porous portion existing on the surface of the filled via hole when plating the surface of the substrate (when plating is formed on the surface of the substrate) In the case of the base layer, the void or the porous portion of the plating base layer is entirely or partially adhered to the surface, and is closed by the plating film formed thereafter. Further, there is a case where a residue (or an organic substance) derived from the conductive paste remains in the filled via hole. It is presumed that the liquid to be sealed is equal to vaporization expansion when heated at a high temperature, and the expansion or the like breaks the interface between the plating layer and the filling via hole or fills the inside of the through hole, etc., thereby causing expansion or peeling of the plating layer. Further, it is presumed that even if it is a surface conductive film other than the plating layer, the volatile matter contained in the filled via hole is also enclosed between the surface conductive film and the filled via hole, and the same phenomenon occurs.

因此，本發明者等人為了達成上述課題而潛心研究，結果發現，藉由形成使填充通孔之一部分露出之表面鍍敷層，即便殘存鍍敷液等揮發性物質汽化，亦可使汽化物自填充通孔之露出部逸出，即便進行加熱亦可抑制於填充孔部之表面導電膜之膨脹或剝離之產生。尤其是亦發現或許係因焙燒型導電膏所形成之填充導體具有多孔構造而形成有用以使汽化物有效地自露出部逸出之連續通路，故而即便用以使填充通孔露出之鍍敷層之開口部之面積較小，亦可抑制膨脹或剝離。 Therefore, the inventors of the present invention have conducted intensive studies to achieve the above-mentioned problems, and as a result, it has been found that by forming a surface plating layer which partially exposes one of the filled via holes, vaporization can be caused even if a volatile substance such as a plating solution remains vaporized. The exposed portion of the filled via hole escapes, and even if heated, the expansion or peeling of the surface conductive film of the filled hole portion can be suppressed. In particular, it has also been found that the filled conductor formed by the calcined conductive paste may have a porous structure to form a continuous passage for the vapor to escape effectively from the exposed portion, so that even the plating layer for exposing the filled via is exposed. The area of the opening is small, and expansion or peeling can be suppressed.

即，本發明之孔填充基板為包含於第一主面上具有孔部之絕緣性基板、由填充於上述孔部之導電性填充材所形成之導電通孔部、及形成於上述絕緣性基板之第一主面上之包含上述導電通孔部之區域之表面導電膜者，且上述表面導電膜係由使上述導電通孔部之第一主面側之表面之一部分露出之構造所形成。上述孔部亦可為貫通孔。上述表面導電膜亦可含有鍍敷層。於上述導電通孔部之露出區域之表面可積層對揮發性物質之透過性較表面導電膜高之保護膜。上述保護膜之平均厚度可為表面導電膜之平均厚度之1/3以下。上述保護膜之至少表面可由選自鈀、鉑、銀及金中之至少1種貴金屬形成。又，上述保護膜可包含經無電鍍敷所形成之無電鍍敷層。上述導電通孔部之第一主面側之表面可以50%以下(尤其是5~20%)之面積比率露出。上述表面導電膜可於導電通孔部之第一主面側之表面之大致中央區域具有開口部。上述孔部之與第一主面方向平行之剖面形狀可為大致圓形，且上述表面導電膜之開口部之形狀亦可為大致圓形。上述絕緣性基板之表面粗糙度Ra可為0.1μm以下。上述導電性填充材可為導電性膏之焙燒物。焙燒前之導電性膏可包含有機黏合劑。 In other words, the hole-filled substrate of the present invention is an insulating substrate including a hole portion on the first main surface, a conductive via portion formed of a conductive filler filled in the hole portion, and the insulating substrate. The surface conductive film of the region including the conductive via portion on the first main surface is formed by partially exposing one surface of the first main surface side of the conductive via portion. The hole portion may be a through hole. The surface conductive film may also contain a plating layer. A protective film having a higher permeability to a volatile substance than the surface conductive film may be deposited on the surface of the exposed region of the conductive via portion. The average thickness of the protective film may be 1/3 or less of the average thickness of the surface conductive film. At least a surface of the protective film may be formed of at least one noble metal selected from the group consisting of palladium, platinum, silver, and gold. Further, the protective film may include an electroless plating layer formed by electroless plating. The surface of the first main surface side of the conductive via portion may be exposed at an area ratio of 50% or less (particularly 5 to 20%). The surface conductive film may have an opening in a substantially central portion of a surface of the first main surface side of the conductive via portion. The cross-sectional shape of the hole portion parallel to the first main surface direction may be substantially circular, and the shape of the opening portion of the surface conductive film may be substantially circular. The surface roughness Ra of the insulating substrate may be 0.1 μm or less. The conductive filler may be a baked product of a conductive paste. The conductive paste before baking may contain an organic binder.

本發明亦包含上述孔填充基板之製造方法，該製造方法包括：導電通孔部形成步驟，其係於絕緣性基板之孔部填充導電性填充材而形成導電通孔部；及表面導電膜形成步驟，其係於絕緣性基板之第一主面上以使上述導電通孔部之第一主面側之表面之一部分露出之方式形成表面導電膜。本發明之製造方法亦可進而包括整面步驟，其係將導電通孔部形成步驟中所形成之導電通孔部之第一主面側之表面及絕緣性基板之第一主面調整為平滑。又，本發明之製造方法亦可進而包括保護膜形成步驟，其係於導電通孔部之第一主面側之表面之露出區域之表面形成保護膜。 The present invention also includes a method of manufacturing the hole-filled substrate, the method comprising: a conductive via portion forming step of forming a conductive via portion by filling a conductive filler in a hole portion of the insulating substrate; and forming a surface conductive film And forming a surface conductive film on a first main surface of the insulating substrate such that one of the surfaces of the first main surface side of the conductive via portion is exposed. The manufacturing method of the present invention may further include a whole surface step of adjusting the surface of the first main surface side of the conductive via portion formed in the conductive via portion forming step and the first main surface of the insulating substrate to be smoothed . Moreover, the manufacturing method of the present invention may further include a protective film forming step of forming a protective film on the surface of the exposed region of the surface on the first main surface side of the conductive via portion.

本發明亦包括如下方法：於包含具有孔部之絕緣性基板、由填 充於上述孔部之導電性填充材所形成之導電通孔部、及形成於上述絕緣性基板之第一主面上之包含上述導電通孔部之區域之表面導電膜的孔填充基板中，由使上述導電通孔部之第一主面側之表面之一部分露出之構造形成上述表面導電膜，藉此抑制加熱時上述表面導電膜之膨脹或剝離。 The present invention also includes a method of including an insulating substrate having a hole portion, and filling a conductive via hole formed by the conductive filler filled in the hole portion; and a hole-filled substrate formed on the surface conductive film of the region including the conductive via portion on the first main surface of the insulating substrate, The surface conductive film is formed by partially exposing one surface of the first main surface side of the conductive via portion, thereby suppressing expansion or peeling of the surface conductive film during heating.

於本發明中，形成孔填充基板之圖案之表面導電膜係由使上述導電通孔部(填充孔部)之一部分露出之構造所形成，因此即便進行加熱亦可抑制填充孔部(導電通孔部)之表面導電膜之膨脹或剝離之產生。進而，雖然導電通孔部(填充孔部)露出一部分，而耐熱性及可靠性較高，即便長期或於嚴酷之條件下加熱或使用，亦可維持導電性。 In the present invention, the surface conductive film forming the pattern of the hole-filled substrate is formed by partially exposing one of the conductive via portions (filled hole portions), so that the filling hole portion (conductive via hole) can be suppressed even by heating. The expansion or peeling of the surface conductive film of the part). Further, although the conductive via portion (filling hole portion) is partially exposed, heat resistance and reliability are high, and conductivity can be maintained even if it is heated or used under severe conditions for a long period of time.

1‧‧‧孔填充基板 1‧‧‧ hole filled substrate

2‧‧‧絕緣性基板 2‧‧‧Insulating substrate

3‧‧‧導電通孔部 3‧‧‧Electrical through hole

3a‧‧‧空隙 3a‧‧‧ gap

4‧‧‧表面導電膜 4‧‧‧Surface conductive film

4a‧‧‧開口部 4a‧‧‧ openings

11‧‧‧氧化鋁基板 11‧‧‧Alumina substrate

12‧‧‧通孔填充用銅導體膏 12‧‧‧ Copper conductor paste for through hole filling

13‧‧‧金屬膜 13‧‧‧Metal film

13a‧‧‧濺鍍膜 13a‧‧‧Sputter film

14‧‧‧負型鍍敷阻劑 14‧‧‧Negative plating resist

14a‧‧‧光阻膜 14a‧‧‧Photoresist film

15‧‧‧曝光用光罩 15‧‧‧Exposure reticle

16‧‧‧Au膜(鍍敷膜) 16‧‧‧Au film (coated film)

17‧‧‧開口部 17‧‧‧ openings

18‧‧‧鍍Ni膜 18‧‧‧Ni plating

18a‧‧‧鍍Ni膜 18a‧‧‧Ni plating

19‧‧‧鍍金膜 19‧‧‧ gold-plated film

圖1係表示具有經圖案化之表面導電膜之本發明之孔填充基板之一例的概略俯視圖。 Fig. 1 is a schematic plan view showing an example of a hole-filled substrate of the present invention having a patterned surface conductive film.

圖2係圖1之孔填充基板之A-A線概略剖面圖。 Fig. 2 is a schematic cross-sectional view showing the A-A line of the hole-filled substrate of Fig. 1.

圖3(a)-(i)係表示實施例1之孔填充基板之製造步驟的概略圖。 3(a) to 3(i) are schematic views showing the steps of manufacturing the hole-filled substrate of the first embodiment.

圖4係表示實施例2中獲得之孔填充基板的概略俯視圖。 4 is a schematic plan view showing a hole-filled substrate obtained in Example 2.

圖5係表示實施例3中獲得之孔填充基板的概略俯視圖。 Fig. 5 is a schematic plan view showing a hole-filled substrate obtained in Example 3.

圖6係實施例4中獲得之孔填充基板的概略剖面圖。 Fig. 6 is a schematic cross-sectional view showing a hole-filled substrate obtained in Example 4.

圖7(a)-(c)係表示實施例5之孔填充基板之製造步驟的概略圖。 7(a) to 7(c) are schematic views showing the steps of manufacturing the hole-filled substrate of the fifth embodiment.

圖8係表示實施例中之熱衝擊試驗之結果的曲線圖。 Fig. 8 is a graph showing the results of a thermal shock test in the examples.

圖9係表示實施例中之高溫加速壽命(HAST)試驗之結果的曲線圖。 Fig. 9 is a graph showing the results of the high temperature accelerated life (HAST) test in the examples.

圖10係表示實施例中之高溫放置試驗之結果的曲線圖。 Fig. 10 is a graph showing the results of the high temperature placement test in the examples.

[孔填充基板] [hole filled substrate]

本發明之孔填充基板包含於第一主面上具有孔部之絕緣性基板、由填充於上述孔部之導電性填充材所形成之導電通孔部、及形成於上述絕緣性基板之第一主面上之包含上述導電通孔部之區域之表面導電膜。 The hole-filled substrate of the present invention includes an insulating substrate having a hole portion on a first main surface, a conductive via portion formed of a conductive filler filled in the hole portion, and a first surface formed on the insulating substrate A surface conductive film on a main surface of the region including the conductive via portion.

圖1係表示具有經圖案化之表面導電膜之本發明之孔填充基板之一例的概略俯視圖，圖2係圖1之孔填充基板之A-A線概略剖面圖。如該等圖所示，孔填充基板1係由具有貫通孔部之絕緣性基板2、由填充於上述貫通孔部之導電性填充材所形成之導電通孔部3、及形成於上述絕緣性基板2之第一主面上之經圖案化之區域(被覆上述導電通孔部之一部分之區域)之表面導電膜4所形成。 1 is a schematic plan view showing an example of a hole-filled substrate of the present invention having a patterned surface conductive film, and FIG. 2 is a schematic cross-sectional view taken along line A-A of the hole-filled substrate of FIG. As shown in the above figures, the hole-filled substrate 1 is formed of an insulating substrate 2 having a through-hole portion, a conductive via portion 3 formed of a conductive filler filled in the through-hole portion, and the insulating layer. The patterned conductive region (the region covering a portion of the conductive via portion) on the first main surface of the substrate 2 is formed of the surface conductive film 4.

如圖2所示，導電通孔部3通常具有由製造過程中有機物之分解或金屬之收縮等所致之空隙3a。因此，於絕緣性基板之表面成為液狀物容易混入至由該空隙3a所致之凹部之狀態。再者，於該圖所示之例中，表面導電膜為單層，但於形成包含鍍敷層之積層構造之情形時，較薄之鍍敷用基底層追隨基材表面之形狀，因此殘存鍍敷液容易滯留於形成於鍍敷用基底層之表面之凹部與鍍敷層之界面。 As shown in FIG. 2, the conductive via portion 3 usually has a void 3a caused by decomposition of an organic substance during production or shrinkage of a metal or the like. Therefore, the surface of the insulating substrate is in a state in which the liquid material is easily mixed into the concave portion due to the gap 3a. Further, in the example shown in the figure, the surface conductive film is a single layer, but in the case of forming a laminated structure including a plating layer, the thin base layer for plating follows the shape of the surface of the substrate, and thus remains. The plating solution easily stays on the interface between the concave portion formed on the surface of the plating underlayer and the plating layer.

關於本發明之孔填充基板，為了將絕緣性基板之正面及背面導通，表面導電膜與導電通孔部連接而形成為圖案狀，於表面導電膜之與導電通孔部之連接區域形成開口部4a。該開口部4a於大致圓形之導電通孔部之第一主面側之表面之大致中央區域形成為大致圓形。因此，於表面導電膜之開口部成為導電通孔部露出之態，該露出部(開口部)具有用以於孔填充基板表面之空隙3a中所滯留之殘存鍍敷液等液狀物因加熱而汽化時使經膨脹之汽化物未滯留於表面導電膜與導電通孔部之間而揮散之作為排出口之作用。 In the hole-filled substrate of the present invention, in order to electrically connect the front surface and the back surface of the insulating substrate, the surface conductive film is connected to the conductive via portion to form a pattern, and an opening portion is formed in a connection region between the surface conductive film and the conductive via portion. 4a. The opening portion 4a is formed in a substantially circular shape in a substantially central region of the surface on the first main surface side of the substantially circular conductive via portion. Therefore, the opening portion of the surface conductive film is exposed in a state where the conductive via portion is exposed, and the exposed portion (opening portion) has a liquid material such as a residual plating solution remaining in the space 3a in which the hole is filled in the surface of the substrate is heated. In the vaporization, the expanded vapor is not retained between the surface conductive film and the conductive via portion, and is volatilized as a discharge port.

(表面導電膜) (surface conductive film)

表面導電膜係以使導電通孔部之一部分露出之構造進行積層， 被封閉在存在於表面導電膜下方之空隙或多孔中之液狀物即便因加熱被汽化，亦自露出部揮散，因此可抑制導電通孔部之表面導電膜之膨脹或剝離之產生。 The surface conductive film is laminated in a structure in which one of the conductive via portions is exposed. The liquid material enclosed in the void or the pores existing under the surface conductive film is volatilized from the exposed portion even if vaporized by heating, so that the occurrence of expansion or peeling of the surface conductive film of the conductive via portion can be suppressed.

表面導電膜只要於孔填充基板表面以使導電通孔部之一部分露出之方式進行積層即可，導電通孔部之第一主面側之表面之露出比率(面積比率)例如可為50%以下(例如1~50%)，例如為2~40%，較佳為3~30%，進而較佳為5~20%(尤其是8~15%)左右。若露出比率過大，則表面導電膜與導電通孔部之接觸面積變小，因此導電通孔部與表面導電膜之通電性(導通性)下降。再者，於本發明中，即便露出比率(於基板第一主面上導電通孔部未被表面導電膜被覆而露出的比率)較小，亦可有效地逸出汽化物，可抑制表面導電膜之膨脹或剝離，推測其原因在於：藉由使導電通孔部為多孔質構造而形成氣體可自由流通之連續之空間(流路)。 The surface conductive film may be laminated so that one surface of the conductive via portion is exposed on the surface of the hole-filled substrate, and the exposure ratio (area ratio) of the surface on the first main surface side of the conductive via portion may be, for example, 50% or less. (for example, 1 to 50%), for example, 2 to 40%, preferably 3 to 30%, and more preferably 5 to 20% (especially 8 to 15%). When the exposure ratio is too large, the contact area between the surface conductive film and the conductive via portion becomes small, and thus the conductivity (conductivity) of the conductive via portion and the surface conductive film is lowered. Further, in the present invention, even if the exposure ratio (the ratio at which the conductive via portion is not covered by the surface conductive film on the first main surface of the substrate) is small, the vapor can be efficiently escaped, and the surface conduction can be suppressed. The expansion or peeling of the film is presumed to be due to the fact that the conductive via portion has a porous structure to form a continuous space (flow path) through which the gas can flow freely.

表面導電膜之形狀並不限定於圖1及2所示之形狀，可根據電極或圖案之形狀而選擇，只要為可使導電通孔部之第一主面側之表面之一部分露出之形狀即可，就與導電通孔部之通電性優異之層面而言，較佳為具有成為導電通孔部之露出部之開口部之形狀。開口部之形狀可根據導電通孔部之形狀而選擇，例如亦可為正方形、長方形、六邊形等多邊形、圓形(直徑小於導電通孔部之圓形)、橢圓形等。進而，開口部之位置並無特別限定，但為了可使汽化物有效地揮散並且與導電通孔部之通電性亦屬優異，而亦可形成於導電通孔部之大致中央區域。 The shape of the surface conductive film is not limited to the shape shown in FIGS. 1 and 2, and may be selected according to the shape of the electrode or the pattern, as long as it is a shape in which one surface of the first main surface side of the conductive via portion is exposed. It is preferable that the layer having excellent conductivity with the conductive via portion has a shape that becomes an opening portion of the exposed portion of the conductive via portion. The shape of the opening portion may be selected according to the shape of the conductive via portion, and may be, for example, a polygon such as a square, a rectangle, or a hexagon, a circular shape (a diameter smaller than a circular shape of the conductive via portion), an elliptical shape, or the like. Further, the position of the opening portion is not particularly limited. However, in order to allow the vapor to be effectively volatilized and to be excellent in electrical conductivity with the conductive via portion, it may be formed in a substantially central region of the conductive via portion.

作為表面導電膜，可列舉的有慣用之導電膜，例如藉由鍍敷所形成之鍍敷層、直接與基板表面接著之金屬箔、使用導電性膏所形成之導電層等。該等表面導電膜可為單獨，亦可為組合兩種以上而成之積層體。 As the surface conductive film, a conventional conductive film such as a plating layer formed by plating, a metal foil directly adjacent to the surface of the substrate, a conductive layer formed using a conductive paste, or the like can be exemplified. These surface conductive films may be used alone or in combination of two or more.

於該等表面導電膜中，作為導電材，通常使用導電性金屬，例如可列舉：過渡金屬(例如鈦等週期表第4族金屬；釩、鈮等週期表第5族金屬；鉬、鎢等週期表第6族金屬；週期表第7族金屬；鎳、鐵、鈷、銠、鈀、銥、鉑等週期表第8~10族金屬；銅、銀、金等週期表第11族金屬等)、週期表第12族金屬、週期表第13族金屬(例如銦、鋁、鎵等)、週期表第14族金屬(例如錫、鉛等)、週期表第15族金屬等。該等導電性金屬可單獨使用或組合兩種以上使用。該等之中，較佳為導電性較高之金屬，例如鈀、鉑等週期表第8族金屬，銅、銀、金等週期表第11族金屬，鋁等週期表第13族金屬，尤佳為銅、銀、金等週期表第11族金屬。 In the surface conductive film, a conductive metal is usually used as the conductive material, and examples thereof include a transition metal (for example, a Group 4 metal such as titanium; a Group 5 metal such as vanadium or niobium; molybdenum, tungsten, etc.) Metals of Group 6 of the periodic table; metals of Group 7 of the periodic table; metals of Groups 8 to 10 of the periodic table such as nickel, iron, cobalt, ruthenium, palladium, iridium and platinum; metals of the 11th group of periodic table such as copper, silver and gold ), a metal of Group 12 of the periodic table, a metal of Group 13 of the periodic table (for example, indium, aluminum, gallium, etc.), a metal of Group 14 of the periodic table (for example, tin, lead, etc.), a metal of Group 15 of the periodic table, and the like. These conductive metals may be used singly or in combination of two or more. Among these, metals having higher conductivity, such as metals of Group 8 of the periodic table such as palladium and platinum, metals of Group 11 of the periodic table such as copper, silver and gold, and metals of Group 13 of the periodic table such as aluminum, are preferred. Good for copper, silver, gold and other metals of the 11th periodic table.

使用導電性膏所得之導電層可為將含有硬化性樹脂之膏硬化而成之硬化膜，亦可為將含有黏合劑之導電性膏焙燒而成之焙燒膜。該等之中，就導電性或耐熱性優異之層面而言，較佳為焙燒膜。作為焙燒膜，可利用由與形成下述導電通孔部之焙燒體相同者所形成之焙燒膜等。 The conductive layer obtained by using the conductive paste may be a cured film obtained by curing a paste containing a curable resin, or may be a baked film obtained by firing a conductive paste containing a binder. Among these, a calcined film is preferred in terms of a layer having excellent conductivity or heat resistance. As the calcined film, a calcined film or the like formed by the same as the calcined body in which the conductive via portion described below is formed can be used.

該等表面導電膜中，就顯著地表現出本發明之效果之層面而言，較佳為包含濕式鍍敷層之導電膜。濕式鍍敷於形成表面導電膜時需要濕式步驟，其原因在於：形成表面導電膜時混入鍍敷液而容易產生膨脹或剝離。作為濕式鍍敷，例如可列舉電鍍、無電鍍敷等。進而，作為表面導電膜，就緻密性較高、可提昇導電性之層面而言，尤佳為電鍍。 Among the surface conductive films, a conductive film including a wet plating layer is preferred in terms of the effect of the present invention. The wet plating requires a wet step in forming the surface conductive film because the plating liquid is mixed in the formation of the surface conductive film to easily cause swelling or peeling. Examples of the wet plating include electroplating, electroless plating, and the like. Further, as the surface conductive film, it is particularly preferable to perform electroplating in terms of high density and conductivity.

於利用電鍍或無電鍍敷於絕緣性基板表面形成鍍敷層之情形時，通常必須首先於基板表面形成金屬之鍍敷用基底層。於電鍍之情形時，鍍敷用基底層較佳為亦具有通電而供給電子從而形成金屬鍍敷層，並且賦予鍍敷膜與基板間之密接力的功能。又，於無電鍍敷之情形時，鍍敷用基底層較佳為使無電鍍敷用觸媒析出於擔載鍍敷膜，並 且賦予鍍敷膜與絕緣性基板間之密接力。為了達成上述目的，可適當選擇鍍敷用基底層所使用之金屬，例如可為鈦等週期表第4族金屬，鉻等週期表第6族金屬，鈀、鉑等週期表第8~10族金屬等。於絕緣性基板為陶瓷之情形時，使用與陶瓷之反應性較高之鈦、鉻等可獲得較高之密接力，因而較佳。又，鍍敷用基底層可由複數種金屬構成。考慮到導電性或無電鍍敷時之鍍敷用觸媒之擔載性等，較佳為於鈦層或鉻層上積層鈀、鉑、鎳、金等。鍍敷用基底層較鍍敷層薄，例如可藉由濺鍍法、蒸鍍法、化學氣相成長法、浸漬或塗佈法等形成於絕緣性基板及填充導電通孔部上。於利用電鍍於絕緣性基板表面形成鍍敷層之情形時，為了獲得鍍敷用基底層與絕緣性基板間之較高之密接力，較佳為藉由濺鍍法形成鍍敷用基底層。 In the case where a plating layer is formed on the surface of an insulating substrate by electroplating or electroless plating, it is usually necessary to first form a metal plating underlayer on the surface of the substrate. In the case of electroplating, it is preferred that the plating underlayer also has a function of supplying electricity to supply electrons to form a metal plating layer, and imparting an adhesive force between the plating film and the substrate. Moreover, in the case of electroless plating, the plating underlayer is preferably such that the electroless plating catalyst is deposited on the supporting plating film, and Moreover, the adhesion between the plating film and the insulating substrate is imparted. In order to achieve the above object, a metal used for the plating underlayer may be appropriately selected, and for example, a metal such as Group 4 of the periodic table such as titanium, a metal of Group 6 of the periodic table such as chromium, or a group 8 to 10 of the periodic table such as palladium or platinum. Metal, etc. In the case where the insulating substrate is a ceramic, it is preferable to use titanium, chromium or the like having high reactivity with ceramics to obtain a high adhesion. Further, the plating underlayer may be composed of a plurality of metals. In view of conductivity or the supporting property of the plating catalyst for electroless plating, it is preferred to deposit palladium, platinum, nickel, gold or the like on the titanium layer or the chromium layer. The base layer for plating is thinner than the plating layer, and can be formed on the insulating substrate and the filled conductive via portion by, for example, a sputtering method, a vapor deposition method, a chemical vapor deposition method, a dipping method, or a coating method. In the case where a plating layer is formed on the surface of an insulating substrate by plating, in order to obtain a high adhesion between the plating underlayer and the insulating substrate, it is preferable to form a plating underlayer by sputtering.

鍍敷用基底層之總厚度(平均厚度)只要可達成上述功能，則並無特別限制，通常為0.01~5μm左右之範圍，較佳為0.02~2.0μm，進而較佳為0.05~1.0μm左右。若基底層之厚度過薄，則導電性或密接性之賦予不充分，若過厚，則成本變高。 The total thickness (average thickness) of the underlayer for plating is not particularly limited as long as the above functions can be achieved, and is usually in the range of about 0.01 to 5 μm, preferably 0.02 to 2.0 μm, and more preferably 0.05 to 1.0 μm. . When the thickness of the underlayer is too thin, the conductivity or the adhesion is insufficient, and if it is too thick, the cost is high.

表面導電膜之厚度(平均厚度)並無特別限定，只要根據所要求之電氣特性適當選定即可。例如為1~300μm，較佳為2~100μm，進而較佳為2.5~30μm(尤其是3~10μm)左右。若表面導電膜過薄，則電路之導電性及穩定性下降，若過厚，則製造成本變高。 The thickness (average thickness) of the surface conductive film is not particularly limited, and may be appropriately selected in accordance with the required electrical characteristics. For example, it is 1 to 300 μm, preferably 2 to 100 μm, and more preferably 2.5 to 30 μm (especially 3 to 10 μm). When the surface conductive film is too thin, the electrical conductivity and stability of the circuit are lowered, and if it is too thick, the manufacturing cost is high.

(絕緣性基板) (insulating substrate)

關於構成絕緣性基板之材質，由於經過焙燒步驟，故而要求耐熱性，可為工程塑膠等有機材料，通常為無機材料(無機素材)。 The material constituting the insulating substrate is required to have heat resistance after the baking step, and may be an organic material such as an engineering plastic, and is usually an inorganic material (inorganic material).

作為無機材料，例如可列舉：玻璃類(鈉玻璃、硼矽酸玻璃、冕玻璃、含鋇玻璃、含鍶玻璃、含硼玻璃、低鹼玻璃、無鹼玻璃、結晶化透明玻璃、二氧化矽玻璃、石英玻璃、耐熱玻璃等)、陶瓷{金屬氧化物(氧化矽、石英、氧化鋁(alumina)或氧化鋁(Aluminium oxide)、 氧化鋯、藍寶石、鐵氧體、二氧化鈦或氧化鈦、氧化鋅、氧化鈮、莫來石、氧化鈹等)、金屬氮化物(氮化鋁、氮化矽、氮化硼、氮化碳、氮化鈦等)、金屬碳化物(碳化矽、碳化硼、碳化鈦、碳化鎢等)、金屬硼化物(硼化鈦、硼化鋯等)、金屬多氧化物[鈦酸金屬鹽(鈦酸鋇、鈦酸鍶、鈦酸鉛、鈦酸鈮、鈦酸鈣、鈦酸鎂等)、鋯酸金屬鹽(鋯酸鋇、鋯酸鈣、鋯酸鉛等)等]等}。該等之中，較佳為玻璃、氧化鋁等陶瓷、氮化鋁等金屬氮化物。 Examples of the inorganic material include glass (soda glass, borosilicate glass, bismuth glass, bismuth-containing glass, bismuth-containing glass, boron-containing glass, low-alkali glass, alkali-free glass, crystallized transparent glass, and cerium oxide). Glass, quartz glass, heat-resistant glass, etc., ceramics {metal oxides (yttria, quartz, alumina or alumina) Zirconium oxide, sapphire, ferrite, titanium dioxide or titanium oxide, zinc oxide, antimony oxide, mullite, antimony oxide, etc.), metal nitride (aluminum nitride, tantalum nitride, boron nitride, carbon nitride, nitrogen) Titanium, etc.), metal carbides (tantalum carbide, boron carbide, titanium carbide, tungsten carbide, etc.), metal borides (titanium boride, zirconium boride, etc.), metal oxides [titanium titanate (barium titanate) , barium titanate, lead titanate, barium titanate, calcium titanate, magnesium titanate, etc.), metal zirconate (cerium zirconate, calcium zirconate, lead zirconate, etc.), etc.]. Among these, a metal such as glass or alumina or a metal nitride such as aluminum nitride is preferable.

絕緣性基板之表面亦可實施氧化處理[表面氧化處理、例如放電處理(電暈放電處理、輝光放電處理等)、酸處理(鉻酸處理等)、紫外線照射處理、火焰處理等]、表面凹凸處理(溶劑處理、噴砂處理等)等表面處理。 The surface of the insulating substrate may be subjected to an oxidation treatment [surface oxidation treatment, for example, discharge treatment (corona discharge treatment, glow discharge treatment, etc.), acid treatment (chromic acid treatment, etc.), ultraviolet irradiation treatment, flame treatment, etc.], surface unevenness Surface treatment such as treatment (solvent treatment, sand blasting, etc.).

絕緣性基板之表面粗糙度Ra並無特別限定，只要根據所要求之配線尺寸及配線精度並基於業者之通常之技術常識而選定即可。例如為0.5μm以下(例如0.01~0.5μm)，較佳為0.01~0.1μm，進而較佳為0.01~0.05μm左右。再者，表面粗糙度Ra可依據JIS B0651-1976而測定，詳細而言，可利用下述實施例中記載之方法測定。 The surface roughness Ra of the insulating substrate is not particularly limited, and may be selected based on the required wiring size and wiring accuracy based on the usual technical knowledge of the industry. For example, it is 0.5 μm or less (for example, 0.01 to 0.5 μm), preferably 0.01 to 0.1 μm, and more preferably about 0.01 to 0.05 μm. Further, the surface roughness Ra can be measured in accordance with JIS B0651-1976, and in detail, it can be measured by the method described in the following examples.

絕緣性基板之厚度只要根據用途而適當選擇即可，例如為0.01~5mm，較佳為0.05~2mm，進而較佳為0.1~1mm(尤其是0.2~0.8mm)左右。 The thickness of the insulating substrate may be appropriately selected depending on the application, and is, for example, 0.01 to 5 mm, preferably 0.05 to 2 mm, and more preferably 0.1 to 1 mm (particularly 0.2 to 0.8 mm).

於絕緣性基板上形成有用以填充導電性填充材之孔部。上述孔部可為非貫通孔，通常為貫通孔。 A hole portion for filling the conductive filler is formed on the insulating substrate. The hole portion may be a non-through hole, and is usually a through hole.

孔部之與基板面方向平行之剖面形狀並無特別限定，可為多邊形(三角形、四邊形或六邊形等)等，通常為圓形或橢圓形，較佳為圓形。 The cross-sectional shape of the hole portion parallel to the substrate surface direction is not particularly limited, and may be a polygon (a triangle, a quadrangle, or a hexagon) or the like, and is generally circular or elliptical, and is preferably circular.

孔部之平均孔徑例如為0.05~10mm，較佳為0.08~5mm，進而較佳為0.1~1mm左右。 The average pore diameter of the pore portion is, for example, 0.05 to 10 mm, preferably 0.08 to 5 mm, and more preferably about 0.1 to 1 mm.

(導電通孔部) (conductive via hole)

於絕緣性基板之孔部填充導電性填充材而形成導電通孔部。作為導電性填充材，包含上述表面導電膜之項中例示之導電性金屬。上述導電性金屬中，較佳為鈦等週期表第4族金屬，鎳、鈀、鉑等週期表第8~10族金屬，銅、銀、金等週期表第11族金屬，鋁等週期表第13族金屬，尤佳為銅、銀等週期表第11族金屬。 A conductive filler is filled in the hole portion of the insulating substrate to form a conductive via portion. The conductive filler is a conductive metal exemplified in the above-mentioned surface conductive film. Among the above-mentioned conductive metals, metals such as Group 4 of the periodic table such as titanium, metals of Groups 8 to 10 of the periodic table such as nickel, palladium and platinum, metals of Group 11 of the periodic table such as copper, silver and gold, and periodic tables of aluminum and the like are preferred. Group 13 metal, especially copper, silver and other metals of the 11th periodic table.

導電性填充材只要含有上述導電性金屬即可，可為單獨由金屬所形成之填充材，較佳為使用含有黏合劑成分之導電性膏所得之填充材，就容易產生滯留殘存鍍敷液等液狀物之空隙，而容易表現出本申請案發明之效果之方面而言，尤佳為由導電性膏之焙燒物所形成之填充材。 The conductive filler may be a filler formed of a metal alone as long as it contains the conductive metal, and it is preferable to use a filler obtained by using a conductive paste containing a binder component, and it is easy to cause a residual plating solution or the like. The filler of the conductive paste is particularly preferably a filler formed of the calcined product of the conductive paste in terms of the void of the liquid material and the effect of the invention of the present application.

為了使與絕緣性基板之密接性提昇，於導電性膏之焙燒物中通常除含上述導電性金屬以外亦含有無機黏合劑。作為無機黏合劑，例如可列舉：硼矽酸系玻璃、硼矽酸鋅系玻璃、鉍系玻璃、鉛系玻璃等低熔點玻璃等。該等玻璃可單獨使用或組合兩種以上使用。該等無機黏合劑中，就對鍍敷處理之耐久性等方面而言，較佳為硼矽酸系玻璃或硼矽酸鋅系玻璃。 In order to improve the adhesion to the insulating substrate, the baked product of the conductive paste usually contains an inorganic binder in addition to the conductive metal. Examples of the inorganic binder include low-melting glass such as borosilicate glass, borosilicate zinc-based glass, bismuth-based glass, and lead-based glass. These glasses may be used singly or in combination of two or more. Among these inorganic binders, boronic acid-based glass or zinc borosilicate-based glass is preferred in terms of durability of the plating treatment and the like.

無機黏合劑之比率相對於導電性金屬100質量份例如為0.1~10質量份，較佳為0.5~8質量份，進而較佳為1~6質量份左右。若無機黏合劑之比率過多，則導電性下降或於焙燒時產生膨脹等，若過少，則對基板之密接性下降。 The ratio of the inorganic binder is, for example, 0.1 to 10 parts by mass, preferably 0.5 to 8 parts by mass, and more preferably about 1 to 6 parts by mass, per 100 parts by mass of the conductive metal. When the ratio of the inorganic binder is too large, the conductivity is lowered or the expansion occurs during firing, and if the amount is too small, the adhesion to the substrate is lowered.

為了減少燒結收縮，於導電性膏之焙燒物中亦可含有金屬之氧化物(例如氧化銅等)。金屬氧化物之比率相對於導電性金屬100質量份可為15質量份以下，例如為0.1~15質量份，較佳為0.5~10質量份，進而較佳為1~8質量份左右。 In order to reduce the sintering shrinkage, a metal oxide (for example, copper oxide or the like) may be contained in the calcined product of the conductive paste. The ratio of the metal oxide may be 15 parts by mass or less, for example, 0.1 to 15 parts by mass, preferably 0.5 to 10 parts by mass, and more preferably about 1 to 8 parts by mass, per 100 parts by mass of the conductive metal.

導電通孔部之表面其平滑性較絕緣性基板低，存在容易滯留鍍 敷液等液狀物之空隙，尤其是於導電通孔部為導電性膏之焙燒物之情形時，因有機黏合劑之蒸發或分解等引起之多孔或空隙之存在頻度較大。因此，導電通孔部之表面粗糙度Ra可為3μm以下(尤其是2μm以下)，例如可為1~3μm左右。位於導電通孔部表面或內部之多孔或空隙部之尺寸通常為孔徑5μm以下(多孔部)，視情況亦存在10μm以上之大孔徑之尺寸者(空隙部)。多孔或空隙部平均孔徑例如為0.1~10μm，較佳為0.2~8μm，進而較佳為0.5~5μm左右，最大孔徑例如為30μm以下，較佳為20μm以下，進而較佳為10μm以下。平均孔徑及最大孔徑之測定方法例如可根據由電子顯微鏡拍攝之填充部之剖面圖像測定。又，導電通孔部之空隙率(空隙之體積比率)例如為10~50%，較佳為20~40%。空隙率可根據用於填充之導電性膏所含之無機成分之體積分率，基於以下之式而算出。 The surface of the conductive via portion is smoother than the insulating substrate, and there is easy plating retention. The void of the liquid material such as the dressing liquid, especially when the conductive via portion is a baked product of the conductive paste, has a large frequency of occurrence of voids or voids due to evaporation or decomposition of the organic binder. Therefore, the surface roughness Ra of the conductive via portion may be 3 μm or less (especially 2 μm or less), and may be, for example, about 1 to 3 μm. The size of the porous or void portion located on the surface or inside the conductive via portion is usually 5 μm or less (porous portion), and optionally has a large aperture of 10 μm or more (void portion). The average pore diameter of the porous or void portion is, for example, 0.1 to 10 μm, preferably 0.2 to 8 μm, more preferably about 0.5 to 5 μm, and the maximum pore diameter is, for example, 30 μm or less, preferably 20 μm or less, and more preferably 10 μm or less. The method of measuring the average pore diameter and the maximum pore diameter can be measured, for example, from a cross-sectional image of a packed portion taken by an electron microscope. Further, the void ratio (volume ratio of the voids) of the conductive via portion is, for example, 10 to 50%, preferably 20 to 40%. The void ratio can be calculated based on the volume fraction of the inorganic component contained in the conductive paste for filling based on the following formula.

空隙率=[1-(導電性膏中之無機成分體積分率)]×100(%) Void ratio = [1 - (inorganic component volume fraction in conductive paste)] × 100 (%)

(保護膜) (protective film)

為了防止氧化等，於導電通孔部之露出區域之表面亦可積層對揮發性物質之透過性較表面導電膜高之保護膜。即，於本發明中，僅使導電通孔部之一部分露出並且可調整露出部之位置，因此即便於由銅等賤金屬形成之導電通孔部露出之情形時，通常之使用中並無問題，亦可根據用途形成上述保護膜。例如於導電通孔部之直徑(導電通孔部之第一主面側之面之直徑)較小之情形時，對於在導電通孔部之表面或附近進行元件安裝或打線結合之情形等有效。即便導電通孔部之露出部被保護膜被覆，保護膜周圍之阻氣性亦較表面導電膜低，因此加熱時產生之揮發性物質不會對周圍之表面導電膜造成損壞，而該物質通過保護膜被釋放。 In order to prevent oxidation or the like, a protective film having a higher permeability to a volatile substance than the surface conductive film may be laminated on the surface of the exposed region of the conductive via portion. That is, in the present invention, only one portion of the conductive via portion is exposed and the position of the exposed portion can be adjusted. Therefore, even when the conductive via portion formed of a base metal such as copper is exposed, there is no problem in usual use. The protective film may be formed according to the use. For example, when the diameter of the conductive via portion (the diameter of the surface of the first main surface side of the conductive via portion) is small, it is effective for component mounting or wire bonding on or near the surface of the conductive via portion. . Even if the exposed portion of the conductive via portion is covered by the protective film, the gas barrier property around the protective film is lower than that of the surface conductive film, so that the volatile substance generated during heating does not cause damage to the surrounding surface conductive film, and the substance passes through The protective film is released.

保護膜只要其阻氣性較周圍之表面導電膜低而可使內部之揮發性物質自露出部逸出即可，通常由較表面導電膜之緻密性或厚度低之 膜形成。作為形成保護膜之材料，可列舉的有表面導電膜之項中例示之導電性金屬等。通氣性與膜之厚度及緻密性有關，膜越薄或緻密性越低則通氣性越高。關於緻密性，利用蒸鍍或導電膏、無電鍍敷製成之膜之緻密性較利用電鍍製成之鍍敷膜低。 The protective film may have a gas barrier property lower than that of the surrounding surface conductive film, so that the volatile matter inside can escape from the exposed portion, and generally the denseness or the thickness of the surface conductive film is low. Film formation. Examples of the material for forming the protective film include a conductive metal exemplified in the item of the surface conductive film. The air permeability is related to the thickness and compactness of the film, and the thinner the film or the lower the denseness, the higher the air permeability. Regarding the compactness, the film formed by vapor deposition or conductive paste or electroless plating is lower in density than the plating film formed by electroplating.

保護膜只要形成於導電通孔部之露出區域之一部分即可，就可提昇保護功能之層面而言，只要以相對於上述露出區域為50%以上、較佳為60%以上、進而較佳為80%以上之佔有比率形成即可，尤佳為形成於整個露出區域。 The protective film may be formed in one portion of the exposed region of the conductive via portion, and the protective function may be 50% or more, preferably 60% or more, more preferably 60% or more, relative to the exposed region. More than 80% of the occupancy ratio can be formed, and it is particularly preferable to form the entire exposed area.

保護膜可根據用途適當選擇材料或層數，就抗氧化性、焊接性、打線結合性等之提昇效果較高之層面而言，較佳為至少表層係由選自由鈀、鉑、銀及金所組成之群中之至少1種貴金屬(尤其是金)形成，就上述提昇效果較高並且阻氣性亦較低之層面而言，尤佳為形成由上述貴金屬形成之薄層(貴金屬層)作為表層。 The protective film may be appropriately selected depending on the use, and in terms of a layer having a higher effect of improving oxidation resistance, weldability, wire bonding, etc., it is preferred that at least the surface layer is selected from the group consisting of palladium, platinum, silver, and gold. At least one noble metal (especially gold) is formed in the group, and in view of the above-mentioned layer having a high lifting effect and a low gas barrier property, it is particularly preferable to form a thin layer (precious metal layer) formed of the above noble metal. As a surface layer.

貴金屬層之厚度(平均厚度)例如為0.01~0.5μm，較佳為0.02~0.3μm，進而較佳為0.025~0.2μm(尤其是0.03~0.1μm)左右。若貴金屬層之厚度過厚，則通氣性及經濟性下降，若過薄，則抗氧化性等保護功能下降。 The thickness (average thickness) of the noble metal layer is, for example, 0.01 to 0.5 μm, preferably 0.02 to 0.3 μm, and more preferably 0.025 to 0.2 μm (especially 0.03 to 0.1 μm). When the thickness of the noble metal layer is too thick, the air permeability and economy are lowered, and if it is too thin, the protective function such as oxidation resistance is lowered.

保護膜可為表層之貴金屬層與鍍敷層之積層體。作為鍍敷層，可利用表面導電膜之項中例示之鍍敷層，就緻密性及阻氣性較低、可於開口部選擇性地形成金等之貴金屬層之層面而言，較佳為由鎳或錫等形成之無電鍍敷層(尤其是由鎳形成之無電鍍敷層)。 The protective film may be a laminate of a noble metal layer and a plating layer of the surface layer. As the plating layer, the plating layer exemplified in the item of the surface conductive film can be used, and the layer having a low density and gas barrier property and selectively forming a noble metal layer such as gold in the opening portion is preferably used. An electroless plating layer formed of nickel or tin or the like (especially an electroless plating layer formed of nickel).

鍍敷層(尤其是無電鍍敷層)之厚度(平均厚度)例如為0.1~5μm，較佳為0.2~3μm，進而較佳為0.3~2μm(尤其是0.5~1.5μm)。若鍍敷層之厚度過厚，則通氣性下降，若過薄，則導電通孔部之銅向表面之貴金屬膜擴散，造成表面之貴金屬之抗氧化性或焊接性等功能下降。 The thickness (average thickness) of the plating layer (especially the electroless plating layer) is, for example, 0.1 to 5 μm, preferably 0.2 to 3 μm, more preferably 0.3 to 2 μm (particularly 0.5 to 1.5 μm). When the thickness of the plating layer is too thick, the air permeability is lowered. When the thickness is too small, the copper of the conductive via portion diffuses toward the noble metal film on the surface, and the function of oxidation resistance or solderability of the noble metal on the surface is lowered.

保護膜整體之厚度(平均厚度)例如為0.05~5μm，較佳為0.1~3μm，進而較佳為0.15~2μm(尤其是0.2~1.5μm)左右。若保護膜之厚度過厚，則通氣性下降，若過薄，則抗氧化性等保護功能下降。 The thickness (average thickness) of the entire protective film is, for example, 0.05 to 5 μm, preferably 0.1 to 3 μm, and more preferably 0.15 to 2 μm (particularly 0.2 to 1.5 μm). When the thickness of the protective film is too thick, the air permeability is lowered, and if it is too thin, the protective function such as oxidation resistance is lowered.

就使揮發性物質之透過性提昇之方面而言，保護膜整體之厚度(平均厚度)相對於表面導電膜之厚度(平均厚度)可為1/2以下，例如為1/3以下(例如1/100~1/3)，較佳為1/4以下(例如1/50~1/4)，進而較佳為1/5以下(例如1/10~1/5)左右。 The thickness (average thickness) of the entire protective film relative to the thickness (average thickness) of the surface conductive film may be 1/2 or less, for example, 1/3 or less (for example, 1) in terms of improving the permeability of the volatile material. /100~1/3) is preferably 1/4 or less (for example, 1/50 to 1/4), and more preferably 1/5 or less (for example, 1/10 to 1/5).

[孔填充基板之製造方法] [Method of Manufacturing Hole Filled Substrate]

本發明之孔填充基板可藉由如下之上述孔填充基板之製造方法而獲得，該製造方法包括：導電通孔部形成步驟，其係於絕緣性基板之孔部填充導電性填充材；及表面導電膜形成步驟，其係於絕緣性基板之第一主面上以使上述導電通孔部之第一主面側之表面之一部分露出之方式形成表面導電膜。 The hole-filled substrate of the present invention can be obtained by the following method for manufacturing a hole-filled substrate, the method comprising: a conductive via portion forming step of filling a conductive filler in a hole portion of the insulating substrate; and a surface The conductive film forming step is formed on the first main surface of the insulating substrate to expose a surface of the first main surface side of the conductive via portion to form a surface conductive film.

(導電通孔部形成步驟) (conductive via hole forming step)

於導電通孔部形成步驟中，作為導電性填充材，如上所述較佳為導電性膏之焙燒物，焙燒前之導電性膏中除含導電性金屬及無機黏合劑(視需要之金屬氧化物)以外亦可含有有機黏合劑或分散介質等。 In the conductive via portion forming step, as the conductive filler, the calcined material of the conductive paste is preferably as described above, and the conductive paste before baking contains conductive metal and inorganic binder (option of metal oxide). An organic binder or a dispersion medium may be contained in addition to the substance.

焙燒前之導電性金屬通常為粒狀，平均粒徑例如為0.01~50μm，較佳為0.1~20μm，進而較佳為0.2~10μm左右。若粒徑過小，則操作性下降，若過大，則變得難以對孔部緊密填充。再者，亦可如專利文獻3中記載般組合粒徑不同之粒子。 The conductive metal before firing is usually in the form of particles, and the average particle diameter is, for example, 0.01 to 50 μm, preferably 0.1 to 20 μm, and more preferably about 0.2 to 10 μm. When the particle diameter is too small, workability is lowered, and if it is too large, it becomes difficult to closely fill the pore portion. Further, particles having different particle diameters may be combined as described in Patent Document 3.

焙燒前之無機黏合劑通常亦為粒狀，平均粒徑例如為0.1~10μm，較佳為0.5~8μm，進而較佳為1~5μm左右。 The inorganic binder before calcination is usually also granular, and the average particle diameter is, for example, 0.1 to 10 μm, preferably 0.5 to 8 μm, and more preferably about 1 to 5 μm.

作為有機黏合劑，例如可列舉：熱塑性樹脂(烯烴系樹脂、乙烯系樹脂、丙烯酸系樹脂、苯乙烯系樹脂、聚醚系樹脂、聚酯系樹脂、聚醯胺系樹脂、纖維素衍生物等)、熱硬化性樹脂(熱硬化性丙烯酸系 樹脂、環氧樹脂、酚系樹脂、不飽和聚酯系樹脂、聚胺基甲酸酯系樹脂等)等。該等有機黏合劑可單獨使用或組合兩種以上使用。該等有機黏合劑中，通用丙烯酸系樹脂(聚甲基丙烯酸甲酯、聚甲基丙烯酸丁酯等)、纖維素衍生物(硝基纖維素、乙基纖維素、丁基纖維素、乙酸纖維素等)、聚醚類(聚甲醛等)、聚乙烯類(聚丁二烯、聚異戊二烯等)等，就熱分解性等方面而言，較佳為聚(甲基)丙烯酸甲酯或聚(甲基)丙烯酸丁酯等聚(甲基)丙烯酸C_1-10烷基酯。 Examples of the organic binder include a thermoplastic resin (olefin resin, vinyl resin, acrylic resin, styrene resin, polyether resin, polyester resin, polyamine resin, cellulose derivative, etc.). ), a thermosetting resin (a thermosetting acrylic resin, an epoxy resin, a phenol resin, an unsaturated polyester resin, a polyurethane resin, etc.). These organic binders may be used singly or in combination of two or more. Among these organic binders, general-purpose acrylic resins (polymethyl methacrylate, polybutyl methacrylate, etc.), cellulose derivatives (nitrocellulose, ethyl cellulose, butyl cellulose, acetate fiber) Or the like, a polyether (polyoxymethylene), a polyethylene (polybutadiene, polyisoprene, etc.), etc., in terms of thermal decomposition property, etc., preferably poly(meth)acrylic acid Poly(meth)acrylic acid C _1-10 alkyl ester such as ester or polybutyl (meth)acrylate.

有機黏合劑之比率相對於導電性金屬100質量份例如為0.1~20質量份，較佳為0.5~15質量份，進而較佳為1~10質量份左右。 The ratio of the organic binder is, for example, 0.1 to 20 parts by mass, preferably 0.5 to 15 parts by mass, and more preferably about 1 to 10 parts by mass, per 100 parts by mass of the conductive metal.

作為分散介質，例如可列舉：芳香族烴(對二甲苯等)、酯類(乳酸乙酯等)、酮類(異佛爾酮等)、醯胺類(二甲基甲醯胺等)、脂肪族醇(辛醇、癸醇、二丙酮醇等)、溶纖素類(甲基溶纖素、乙基溶纖素等)、乙酸溶纖素類(乙酸乙基溶纖素、乙酸丁基溶纖素等)、卡必醇類(卡必醇、甲基卡必醇、乙基卡必醇等)、卡必醇乙酸酯類(乙基卡必醇乙酸酯、丁基卡必醇乙酸酯)、脂肪族多元醇類(乙二醇、二乙二醇、二丙二醇、丁二醇、三乙二醇、甘油等)、脂環族醇類[例如環己醇等環烷醇類；松脂醇、二氫松脂醇等萜烯醇類(單萜烯醇等)等]、芳香族醇類(間甲酚等)、芳香族羧酸酯類(鄰苯二甲酸二丁酯、鄰苯二甲酸二辛酯等)、含氮雜環化合物(二甲基咪唑、二甲基咪唑啶酮等)等。該等分散介質可單獨使用或組合兩種以上使用。該等分散介質中，就膏之流動性或填充性等方面而言，較佳為松脂醇等脂環族醇。 Examples of the dispersion medium include aromatic hydrocarbons (p-xylene or the like), esters (such as ethyl lactate), ketones (isophorone), and guanamines (dimethylformamide, etc.). Aliphatic alcohols (octanol, decyl alcohol, diacetone alcohol, etc.), cellosolve (methyl cellosolve, ethyl cellosolve, etc.), cellulolytic acetate (ethyl cellosolve acetate, butyl acetate) Fibrin, etc., carbitol (carbitol, methyl carbitol, ethyl carbitol, etc.), carbitol acetate (ethyl carbitol acetate, butyl carbitol Acid esters, aliphatic polyols (ethylene glycol, diethylene glycol, dipropylene glycol, butanediol, triethylene glycol, glycerin, etc.), alicyclic alcohols [such as cycloalkanols such as cyclohexanol ; terpene alcohols such as rosinol and dihydroterpineol (monoterpene alcohol, etc.), aromatic alcohols (m-cresol, etc.), aromatic carboxylic acid esters (dibutyl phthalate, neighbors) Dioctyl phthalate or the like), a nitrogen-containing heterocyclic compound (dimethylimidazole, dimethylimidazolidinone, etc.), and the like. These dispersion media may be used singly or in combination of two or more. Among these dispersion media, an alicyclic alcohol such as rosinol is preferred in terms of fluidity or filling property of the paste.

分散介質之比率相對於導電性金屬100質量份例如為1~20質量份，較佳為3~15質量份，進而較佳為5~10質量份左右。 The ratio of the dispersion medium is, for example, 1 to 20 parts by mass, preferably 3 to 15 parts by mass, and more preferably about 5 to 10 parts by mass, per 100 parts by mass of the conductive metal.

導電性膏於孔部中之填充方法例如可列舉：網版印刷法、噴墨印刷法、凹版印刷法(例如凹版印刷法等)、平版印刷法、凹版平版印刷法、軟版印刷法等印刷方法、輥壓入法、壓輥(squeegee)壓入法、 加壓壓入法等直接壓入法等。該等方法之中，較佳為網版印刷法等。 Examples of the method of filling the conductive paste in the hole portion include printing by a screen printing method, an inkjet printing method, a gravure printing method (for example, a gravure printing method), a lithography method, a gravure lithography method, and a soft printing method. Method, roll press method, squeegee press method, Direct press-in method such as press-injection method. Among these methods, a screen printing method or the like is preferred.

填充後可進行自然乾燥，亦可進行加熱乾燥。加熱溫度可根據溶劑之種類而選擇，例如為80~300℃，較佳為100~250℃，進而較佳為120~200℃左右。加熱時間例如為1~30分鐘，較佳為3~25分鐘，進而較佳為5~20分鐘左右。 After filling, it can be naturally dried or dried by heating. The heating temperature can be selected depending on the kind of the solvent, and is, for example, 80 to 300 ° C, preferably 100 to 250 ° C, and more preferably about 120 to 200 ° C. The heating time is, for example, 1 to 30 minutes, preferably 3 to 25 minutes, and more preferably about 5 to 20 minutes.

焙燒溫度只要為導電性膏中之金屬粉之燒結溫度以上即可。焙燒溫度例如可為500℃以上，例如為500~1500℃，較佳為600~1200℃，進而較佳為700~1000℃左右。焙燒時間例如為10分鐘~3小時，較佳為20分鐘~3小時，進而較佳為30分鐘~2小時左右。再者，於導電性金屬粉並非銀、金等貴金屬之情形時，焙燒通常於惰性氣體(例如氮氣、氬氣、氦氣等)環境中進行，亦可如專利文獻3所記載般與在空氣中之加熱進行組合。 The baking temperature may be at least the sintering temperature of the metal powder in the conductive paste. The baking temperature may be, for example, 500 ° C or higher, for example, 500 to 1500 ° C, preferably 600 to 1200 ° C, and more preferably 700 to 1000 ° C or so. The calcination time is, for example, 10 minutes to 3 hours, preferably 20 minutes to 3 hours, and more preferably 30 minutes to 2 hours. In the case where the conductive metal powder is not a noble metal such as silver or gold, the calcination is usually carried out in an atmosphere of an inert gas (for example, nitrogen, argon, helium, or the like), and may be as described in Patent Document 3 with air. The heating in the combination is carried out.

(整面步驟) (full step)

於本發明中，為了於表面導電膜形成步驟前將絕緣性基板之表面調整為上述表面粗糙度Ra而使表面導電膜之密接性提昇，並且提高表面導電膜之尺寸精度，而亦可設置將導電通孔部形成步驟中所形成之導電通孔部及絕緣性基板之表面調整為平滑的整面步驟。 In the present invention, in order to adjust the surface of the insulating substrate to the surface roughness Ra before the surface conductive film forming step, the adhesion of the surface conductive film is improved, and the dimensional accuracy of the surface conductive film is improved, and The conductive via portion formed in the conductive via portion forming step and the surface of the insulating substrate are adjusted to have a smooth entire surface step.

作為將表面調整為平滑之方法，可利用慣用之研磨方法，例如精研研磨、拋光研磨、圓筒研磨、平面研磨、CMP(Chemical Mechanical Polishing，化學機械研磨)研磨、藉由砂輪之研磨、手動拋光機(handpolisher)等，就可進行精密研磨之方面而言，較佳為精研研磨。 As a method of adjusting the surface to smoothness, a conventional polishing method such as lapping, buffing, cylindrical grinding, surface grinding, CMP (Chemical Mechanical Polishing) grinding, grinding by a grinding wheel, manual A hand polisher or the like is preferably a lapping mill for the purpose of precision grinding.

(表面導電膜形成步驟) (surface conductive film forming step)

於表面導電膜形成步驟中，以使上述導電通孔部之第一主面側之表面之一部分露出之方式於絕緣性基板之第一主面上形成表面導電膜。 In the surface conductive film forming step, a surface conductive film is formed on the first main surface of the insulating substrate such that one surface of the first main surface side of the conductive via portion is exposed.

作為表面導電膜之形成方法，可根據表面導電膜之種類而適當選擇，例如於形成包含電鍍層之表面導電膜作為表面導電膜之情形時，首先，藉由濺鍍法、蒸鍍法、化學氣相成長法、浸漬或塗佈法等形成作為鍍敷用基底層之較薄之導電性金屬層。 The method of forming the surface conductive film can be appropriately selected depending on the type of the surface conductive film, for example, when a surface conductive film containing a plating layer is formed as a surface conductive film, first, by sputtering, evaporation, or chemistry A thin conductive metal layer as a base layer for plating is formed by a vapor phase growth method, a dipping or a coating method.

為了形成具有所需圖案之表面導電膜，而於鍍敷用基底層上藉由慣用之方法形成光阻膜。詳細而言，於表面設置有鍍敷用基底層之絕緣性基板上(基底層上)利用旋轉塗佈等慣用之方法塗佈光硬化性鍍敷阻劑後，使用具有目標圖案之負型之曝光用光罩照射紫外線等而使鍍敷阻劑硬化形成光阻膜，其後藉由使用溶劑進行清洗之方法等而去除未硬化之鍍敷阻劑。作為光硬化性鍍敷阻劑，可利用慣用之光硬化性樹脂，例如光硬化性聚酯系樹脂、光硬化性丙烯酸系樹脂、光硬化性環氧(甲基)丙烯酸酯樹脂、光硬化性(甲基)丙烯酸胺基甲酸酯樹脂等。光阻膜之厚度例如為1~20μm，較佳為2~15μm，進而較佳為3~10μm左右。 In order to form a surface conductive film having a desired pattern, a photoresist film is formed on the base layer for plating by a conventional method. Specifically, the photocurable plating resist is applied to an insulating substrate (on the underlayer) having a plating underlayer provided on the surface thereof by a conventional method such as spin coating, and then a negative type having a target pattern is used. The exposure mask is irradiated with ultraviolet rays or the like to cure the plating resist to form a photoresist film, and then the uncured plating resist is removed by a method of cleaning with a solvent or the like. As the photocurable plating resist, a conventional photocurable resin such as a photocurable polyester resin, a photocurable acrylic resin, a photocurable epoxy (meth)acrylate resin, and photocurability can be used. (Meth)acrylic acid urethane resin or the like. The thickness of the photoresist film is, for example, 1 to 20 μm, preferably 2 to 15 μm, and more preferably about 3 to 10 μm.

進而，藉由於形成有負型光阻膜之基板上利用電鍍形成鍍敷膜，而不使鍍敷膜於存在光阻膜之區域析出，因此，可於未形成光阻膜之區域形成具有所需圖案之鍍敷膜。作為電鍍之方法，並無特別限定，只要根據鍍敷種類，於先前之鍍敷化學品製造商之推薦條件下進行即可。例如於鍍銅之情形時，於硫酸銅溶液中使基板為陰極，使銅板為陽極，通入直流，將陽極之銅電解而製成金屬銅離子，使之通過電解液中，附著於陰極即基板之表面。 Further, since the plating film is formed by plating on the substrate on which the negative resist film is formed, the plating film is not deposited in the region where the photoresist film is present, so that the region where the photoresist film is not formed can be formed. A plating film is required for the pattern. The method of electroplating is not particularly limited, and may be carried out under the recommended conditions of the previous plating chemical manufacturer depending on the type of plating. For example, in the case of copper plating, the substrate is made into a cathode in a copper sulfate solution, the copper plate is an anode, a direct current is passed, and the copper of the anode is electrolyzed to form a metal copper ion, which is passed through the electrolyte and adhered to the cathode. The surface of the substrate.

亦可代替電鍍而藉由無電鍍敷形成鍍敷膜。作為無電鍍敷之方法，並無特別限定，只要根據鍍敷種類，於慣用之條件下進行即可。 It is also possible to form a plating film by electroless plating instead of electroplating. The method of electroless plating is not particularly limited, and may be carried out under customary conditions depending on the type of plating.

形成鍍敷膜後，亦可藉由鹼性溶液等去除光阻膜，其後進而利用濕式蝕刻或乾式蝕刻等蝕刻去除因去除光阻膜而露出之鍍敷用基底層。 After the plating film is formed, the photoresist film may be removed by an alkaline solution or the like, and then the plating underlayer exposed by removing the photoresist film may be removed by etching such as wet etching or dry etching.

(保護膜形成步驟) (Protective film forming step)

於本發明中，亦可進行於導電通孔部之露出區域之表面形成保護膜之保護膜形成步驟。保護膜形成步驟可為表面導電膜形成步驟之前一步驟，亦可為後續步驟。關於保護膜，於保護膜形成步驟為表面導電膜形成步驟之前一步驟之情形時，於未形成表面導電膜之導電通孔部之第一主面側之表面預先形成保護膜，於保護膜形成步驟為表面導電膜形成步驟之後續步驟之情形時，其形成於形成有表面導電膜之導電通孔部之露出區域之表面。進而，於形成複數層保護膜情形時，可同時形成複數層，亦可於前一步驟或後續步驟中形成，亦可將前一步驟與後續步驟進行組合。例如於將前一步驟與後續步驟進行組合而形成由無電鍍敷層與貴金屬層之積層體所形成之保護膜之情形時，亦可於未形成表面導電膜之導電通孔部表面形成無電鍍敷層後，形成表面導電膜，進而於導電通孔部之露出區域之表面形成貴金屬層。 In the present invention, a protective film forming step of forming a protective film on the surface of the exposed region of the conductive via portion may be performed. The protective film forming step may be a step before the surface conductive film forming step, or may be a subsequent step. Regarding the protective film, when the protective film forming step is a step before the surface conductive film forming step, a protective film is formed in advance on the surface of the first main surface side of the conductive via portion where the surface conductive film is not formed, and is formed on the protective film. When the step is the subsequent step of the surface conductive film forming step, it is formed on the surface of the exposed region of the conductive via portion on which the surface conductive film is formed. Further, in the case of forming a plurality of protective films, a plurality of layers may be simultaneously formed, or may be formed in the previous step or the subsequent step, or the previous step and the subsequent step may be combined. For example, when the first step and the subsequent step are combined to form a protective film formed of a laminate of the electroless plating layer and the noble metal layer, electroless plating may be formed on the surface of the conductive via portion where the surface conductive film is not formed. After the coating, a surface conductive film is formed, and a noble metal layer is formed on the surface of the exposed region of the conductive via portion.

作為形成保護膜之方法，可利用慣用之方法，例如鍍敷法、蒸鍍法、濺鍍法、溶液(油墨)塗佈法等。作為鍍敷法，可利用表面導電膜形成步驟之項中例示之鍍敷膜之形成方法，於無電鍍敷法之情形時，亦可於導電通孔部之露出區域之表面形成無電鍍敷層後，利用置換鍍敷法形成較薄之貴金屬層(閃熔鍍敷層)。作為蒸鍍法及濺鍍法，可利用慣用之方法，作為溶液塗佈法，亦可藉由將金屬奈米粒子(例如金奈米粒子)油墨利用分注器塗佈於導電通孔部之露出區域，其後於150~300℃左右之溫度下進行焙燒而形成金屬膜。 As a method of forming the protective film, a conventional method such as a plating method, a vapor deposition method, a sputtering method, a solution (ink) coating method, or the like can be used. As the plating method, a method of forming a plating film exemplified in the step of forming a surface conductive film can be used, and in the case of the electroless plating method, an electroless plating layer can be formed on the surface of the exposed region of the conductive via portion. Thereafter, a thin noble metal layer (flash plating layer) is formed by displacement plating. As a vapor deposition method and a sputtering method, a conventional method can be used as a solution coating method, and a metal nanoparticle (for example, a gold nanoparticle) ink can be applied to a conductive via portion by a dispenser. The exposed region is then fired at a temperature of about 150 to 300 ° C to form a metal film.

[實施例] [Examples]

以下，基於實施例更詳細地說明本發明，但本發明並不受該等實施例之限定。再者，於以下之例中，將評價試驗之測定方法示於以下。 Hereinafter, the present invention will be described in more detail based on examples, but the present invention is not limited by the examples. In the following examples, the measurement methods of the evaluation test are shown below.

[耐熱試驗] [heat resistance test]

將乾燥後之基板於350℃之加熱板上加熱5分鐘。藉由顯微鏡觀察加熱後之基板，確認有無膨脹、破裂、黑點、變色。 The dried substrate was heated on a hot plate at 350 ° C for 5 minutes. The heated substrate was observed under a microscope to confirm the presence or absence of swelling, cracking, black spots, and discoloration.

[熱衝擊試驗] [thermal shock test]

將試驗片放置於氣槽式熱衝擊試驗裝置之試樣室中，通入冷卻空氣而使試樣室之溫度為-55℃並放置40分鐘，其後更換成高溫空氣使試樣室之溫度為155℃並保持40分鐘，藉此設為1個循環，於一定循環數之試驗後取出試樣，藉由4端子法測定填充部導體之電阻值。 The test piece is placed in the sample chamber of the gas trough type thermal shock test device, and the temperature of the sample chamber is set to -55 ° C for 40 minutes by passing cooling air, and then replaced with high temperature air to make the temperature of the sample chamber The temperature was maintained at 155 ° C for 40 minutes, and the sample was taken out after a certain number of cycles, and the resistance value of the filled portion conductor was measured by a four-terminal method.

[高溫加速壽命(HAST)試驗] [High Temperature Accelerated Life (HAST) Test]

將試驗片放置於高度加速壽命試驗裝置中，於125℃、相對濕度85%之環境下放置特定時間後，藉由4端子法測定填充部導體之電阻值。 The test piece was placed in a highly accelerated life test apparatus, and after standing for a certain period of time at 125 ° C and a relative humidity of 85%, the resistance value of the filled portion conductor was measured by a 4-terminal method.

[高溫放置試驗] [High temperature placement test]

將試驗片放置於送風乾燥機中，於125℃下放置特定時間後，藉由4端子法測定填充部導體之電阻值。 The test piece was placed in a blower dryer, and after standing at 125 ° C for a specific period of time, the resistance value of the filled portion conductor was measured by a 4-terminal method.

[鍍敷膜之厚度] [Thickness of plating film]

藉由螢光X射線膜厚計測定5處之平均厚度。 The average thickness at 5 points was measured by a fluorescent X-ray film thickness meter.

實施例1 Example 1

如以下所示，利用記載有各步驟之概略剖面圖之圖3所示之方法製作具有經圖案化之表面導電膜的孔填充基板。 As shown below, a hole-filled substrate having a patterned surface conductive film was produced by the method shown in FIG. 3 in which the schematic cross-sectional views of the respective steps are described.

(孔填充基板之製作) (Production of hole-filled substrate)

使用通孔填充用銅導體膏12(利用專利文獻3之實施例1中記載之方法製備之膏)並藉由網版印刷對具有多個孔徑為0.3mm之貫通孔之2吋×2吋×厚0.635mm之99.5%之氧化鋁基板11填充貫通孔，利用120℃之送風乾燥機乾燥20分鐘。將經填充之基板於900℃之氮氣環境中焙燒60分鐘，而製作銅導體孔填充基板(圖3(a))。藉由精研研磨將製作之孔填充基板調整為厚度0.4mm、表面粗糙度Ra未達0.02μm(圖 3(b))。藉由精研研磨，可於焙燒後將具有微細凹凸之導電通孔部(銅膏填充部)調整成與基板表面同一平面(導電通孔部之表面與絕緣性基板表面之階差(凹凸量)為±2μm以下)，並且獲得基板表面適於形成微細圖案之高表面平滑性(Ra<0.02μm)。導電通孔部之多孔或空隙部之平均孔徑為5μm，最大孔徑為15μm，空隙率為38%。 A copper conductor paste 12 for via filling (a paste prepared by the method described in Example 1 of Patent Document 3) is used and has a plurality of apertures by screen printing The alumina substrate 11 of 2 mm × 2 吋 × 0.635 mm of a 0.3 mm through hole was filled with a through hole, and dried by a blow dryer at 120 ° C for 20 minutes. The filled substrate was baked in a nitrogen atmosphere at 900 ° C for 60 minutes to prepare a copper conductor hole-filled substrate (Fig. 3 (a)). The hole-filled substrate produced by the lapping was adjusted to have a thickness of 0.4 mm and a surface roughness Ra of less than 0.02 μm (Fig. 3(b)). By polishing grinding, the conductive via portion (copper paste filling portion) having fine concavities and convexities can be adjusted to be flush with the surface of the substrate (the surface of the conductive via portion and the surface of the insulating substrate) It is ±2 μm or less), and high surface smoothness (Ra<0.02 μm) suitable for forming a fine pattern on the surface of the substrate is obtained. The porous or void portion of the conductive via portion has an average pore diameter of 5 μm, a maximum pore diameter of 15 μm, and a void ratio of 38%.

(電鍍用基底導電膜之形成) (Formation of a base conductive film for electroplating)

藉由濺鍍法於研磨後之基板之整個兩面依序積層膜厚100nm之Ti膜、膜厚150nm之Pd膜，而形成金屬膜13(圖3(c))。 A Ti film having a thickness of 100 nm and a Pd film having a thickness of 150 nm were sequentially deposited on the entire surface of the polished substrate by sputtering to form a metal film 13 (Fig. 3(c)).

(電鍍用圖案之形成) (Formation of plating pattern)

利用旋轉塗佈於基板之兩面塗佈負型鍍敷阻劑14(膜厚5μm)後(圖3(d))，使用曝光用光罩15對未形成鍍敷膜之部分之光阻膜進行曝光，使之進行硬化反應(圖3(e))。該未形成鍍敷膜之部分係電極、配線圖案間之絕緣部除外而於填充通孔表面之中心部具有直徑100μm之圓形開口部。曝光後藉由鹼性溶液去除未曝光之部分之光阻膜，而僅於未形成鍍敷膜之區域形成光阻膜14a(圖3f))。 After the negative plating resist 14 (film thickness: 5 μm) is applied to both surfaces of the substrate by spin coating (Fig. 3 (d)), the photoresist film for the portion where the plating film is not formed is subjected to the exposure mask 15 Exposure is carried out to effect a hardening reaction (Fig. 3(e)). The portion of the non-plated film and the insulating portion between the wiring patterns were excluded, and a circular opening having a diameter of 100 μm was formed at the center portion of the surface of the filled via. After the exposure, the unexposed portion of the photoresist film is removed by the alkaline solution, and the photoresist film 14a is formed only in the region where the plating film is not formed (FIG. 3f)).

(藉由電鍍之導電膜之形成) (by the formation of electroplated conductive film)

將基板藉由電鍍(鍍敷液：氰型鍍Au液，Au濃度6g/L，液溫60~80℃)於兩面形成厚度5μm之Au膜16(圖3(g))。未於存在光阻膜之區域析出鍍敷膜，因此於電極間之絕緣部及填充通孔表面之中心部之直徑100μm區域無鍍敷膜。 The Au film 16 having a thickness of 5 μm was formed on both surfaces by plating (plating liquid: cyan plating Au liquid, Au concentration 6 g/L, liquid temperature 60 to 80 ° C) (Fig. 3 (g)). Since the plating film was not deposited in the region where the photoresist film was present, there was no plating film in the region of 100 μm in diameter between the insulating portion of the electrode and the center portion of the surface of the filled via.

(鍍敷阻劑之去除) (Removal of plating resist)

利用鹼性溶液去除光阻膜14a並進行清洗，而獲得於填充通孔表面之中心部具有開口之孔填充基板(圖3(h))。 The photoresist film 14a is removed by an alkaline solution and cleaned, and a hole-filled substrate having an opening at the center portion of the surface of the filled via hole is obtained (FIG. 3(h)).

(濺鍍膜之去除) (removal of the sputter film)

去除光阻膜後，作為電鍍之導電層之濺鍍膜露出，藉由乾式蝕刻去除露出之濺鍍膜，而形成包含具有開口部17之濺鍍膜13a與Au膜 (鍍敷膜)16之積層構造的表面導電膜(圖3(i))。 After the photoresist film is removed, the sputtering film as the electroplated conductive layer is exposed, and the exposed sputtering film is removed by dry etching to form the sputtering film 13a and the Au film including the opening portion 17. (Coated film) The surface conductive film of the laminated structure of 16 (Fig. 3 (i)).

比較例1 Comparative example 1

於電鍍用圖案之形成中，使用於填充通孔表面之中心部不具有直徑100μm之圓形開口部之光罩作為曝光用光罩，除此以外，以與實施例1相同之方式製作孔填充基板。所製作之具有表面導電膜之孔填充基板具有除填充通孔表面之導電膜無開口部以外與實施例1相同之圖案。 In the formation of the pattern for electroplating, a photomask having a circular opening having a diameter of 100 μm at the center portion of the surface of the through-hole was used as an exposure mask, and hole filling was performed in the same manner as in Example 1. Substrate. The hole-filled substrate having the surface conductive film produced had the same pattern as that of Example 1 except that the conductive film filling the surface of the via hole had no opening.

實施例2 Example 2

於電鍍用圖案之形成中，使用以使填充通孔表面之中心部與開口部之中心部一致之方式形成有350μm×100μm之長方形開口部的光罩作為曝光用光罩，除此以外，以與實施例1相同之方式製作圖4所示之孔填充基板。 In the formation of the pattern for electroplating, a mask having a rectangular opening of 350 μm × 100 μm is formed so that the center portion of the surface of the filled via is aligned with the central portion of the opening, and the mask is used as an exposure mask. The hole-filled substrate shown in Fig. 4 was produced in the same manner as in the first embodiment.

實施例3 Example 3

於電鍍用圖案之形成中，使用以使填充通孔表面之中心部與開口部之中心部不一致之方式形成有350μm×100μm之長方形開口部的光罩作為曝光用光罩，除此以外，以與實施例1相同之方式製作圖5所示之孔填充基板。 In the formation of the pattern for electroplating, a mask having a rectangular opening of 350 μm × 100 μm is formed so that the central portion of the surface of the filled via does not coincide with the central portion of the opening, and the mask is used as an exposure mask. The hole-filled substrate shown in Fig. 5 was produced in the same manner as in the first embodiment.

再者，於圖4及圖5中附有與圖1相同之符號。 In addition, the same reference numerals as in FIG. 1 are attached to FIGS. 4 and 5.

實施例4 Example 4

(具有經圖案化之表面導電膜之孔填充基板之製作) (Production of a hole-filled substrate having a patterned surface conductive film)

以與實施例1相同之方式獲得於開口部露出了導電通孔部之銅的圖3(i)之孔填充基板。 In the same manner as in the first embodiment, the hole-filled substrate of Fig. 3(i) in which the copper of the conductive via portion was exposed in the opening portion was obtained.

(保護膜之形成) (formation of protective film)

繼而，將所得之孔填充基板浸漬於溫度40℃之酸性清潔劑(上村工業股份有限公司製造之「ACL-007」)180秒後，於濃度為100g/L之硫酸水溶液中浸漬60秒進行表面處理而去除氧化物。繼而，為了於露 出了導電通孔部之銅表面附著作為用以使無電解鍍鎳析出之觸媒的鈀，而將孔填充基板浸漬於鈀活化劑(上村工業股份有限公司製造之「MSR-28」)，其後進而於80℃之無電解鍍鎳液(上村工業股份有限公司製造之「NPR-4」)中浸漬5分鐘，而形成厚度1μm之鍍Ni膜。進而，如圖6中所示概略剖面般，藉由置換鍍金而將厚度0.05μm之鍍金膜19形成於鍍Ni膜18之表面，而獲得開口部經保護膜積層之孔填充基板。 Then, the obtained hole-filled substrate was immersed in an acidic detergent ("ACL-007" manufactured by Uemura Kogyo Co., Ltd.) at a temperature of 40 ° C for 180 seconds, and then immersed in a sulfuric acid aqueous solution having a concentration of 100 g/L for 60 seconds to carry out surface immersion. Treatment to remove oxides. Then, in order to reveal The copper surface of the conductive via portion is attached to palladium which is a catalyst for depositing electroless nickel plating, and the hole-filled substrate is immersed in a palladium activator ("MSR-28" manufactured by Uemura Kogyo Co., Ltd.). Thereafter, it was further immersed in an electroless nickel plating solution ("NPR-4" manufactured by Uemura Kogyo Co., Ltd.) at 80 ° C for 5 minutes to form a Ni plating film having a thickness of 1 μm. Further, as shown in the schematic cross section of Fig. 6, a gold plating film 19 having a thickness of 0.05 μm is formed on the surface of the Ni plating film 18 by displacement gold plating, and a substrate in which the opening portion is laminated by the protective film is obtained.

實施例5 Example 5

如以下所示，利用記載有主要步驟之概略剖面圖之圖7所示之方法製作具有經圖案化之表面導電膜的孔填充基板。 As shown below, a hole-filled substrate having a patterned surface conductive film was produced by the method shown in FIG. 7 in which a schematic cross-sectional view of the main steps is described.

(孔填充基板之製作) (Production of hole-filled substrate)

以與實施例1相同之方式獲得圖3(b)之經表面研磨之銅導體孔填充基板。 The surface-polished copper conductor hole-filled substrate of Fig. 3(b) was obtained in the same manner as in the first embodiment.

(導電通孔部之無電鍍敷處理) (Electroless plating treatment of conductive vias)

將所得之銅導體孔填充基板浸漬於溫度40℃之酸性清潔劑(上村工業股份有限公司製造之「ACL-007」)中180秒後，於濃度為100g/L之硫酸水溶液中浸漬60秒進行表面處理而去除氧化物。繼而，為了於露出了導電通孔部之銅表面附著作為用以使無電解鍍鎳析出之觸媒的鈀，而將銅導體孔填充基板浸漬於鈀活化劑(上村工業股份有限公司製造之「MSR-28」)，其後進而於80℃之無電解鍍鎳液(上村工業股份有限公司製造之「NPR-4」)中浸漬10分鐘，而於填充通孔之表面形成厚度1μm之鍍Ni膜18a(圖7(a))。 The obtained copper conductor hole-filled substrate was immersed in an acidic detergent ("ACL-007" manufactured by Uemura Kogyo Co., Ltd.) at a temperature of 40 ° C for 180 seconds, and then immersed in a sulfuric acid aqueous solution having a concentration of 100 g/L for 60 seconds. Surface treatment removes oxides. Then, in order to expose the copper surface of the conductive via portion to the palladium for the catalyst for depositing electroless nickel plating, the copper conductor hole-filled substrate is immersed in a palladium activator (manufactured by Uemura Kogyo Co., Ltd.) MSR-28") was further immersed in an electroless nickel plating solution ("NPR-4" manufactured by Uemura Kogyo Co., Ltd.) at 80 ° C for 10 minutes, and a Ni plating layer having a thickness of 1 μm was formed on the surface of the filled via hole. Film 18a (Fig. 7(a)).

(表面導電圖案之形成) (formation of surface conductive patterns)

針對經無電鍍敷處理之孔填充基板，作為表面導電圖案形成步驟，以與實施例1相同之方式實施電鍍用基底導電膜之形成、電鍍用圖案之形成、藉由電鍍之導電膜之形成、鍍敷阻劑之去除、濺鍍膜之 去除為止的步驟，而獲得具有開口部17之孔填充基板(圖7(b))。於該基板之開口部17，於導電通孔部之表面形成有鍍Ni膜18a。 In the same manner as in the first embodiment, the formation of the base conductive film for electroplating, the formation of a pattern for electroplating, the formation of a conductive film by electroplating, and the formation of a conductive film by electroplating are carried out in the same manner as in the first embodiment. Plating resist removal, sputter film The steps up to the removal are performed to obtain a hole-filled substrate having the opening portion 17 (Fig. 7(b)). A Ni plating film 18a is formed on the surface of the conductive via portion in the opening portion 17 of the substrate.

(導電通孔部表面之置換鍍金) (displacement gold plating on the surface of the conductive via)

將於開口部露出了鍍Ni膜之基板浸漬於濃度為100g/L之硫酸水溶液中60秒進行表面處理而去除氧化物後，藉由置換鍍金將厚度0.03μm之鍍金膜19形成於開口部之鍍Ni膜表面(圖7(c))。 The substrate on which the Ni plating film was exposed in the opening was immersed in a sulfuric acid aqueous solution having a concentration of 100 g/L for 60 seconds to be surface-treated to remove oxides, and then a gold plating film 19 having a thickness of 0.03 μm was formed in the opening portion by displacement gold plating. The surface of the Ni film is plated (Fig. 7(c)).

再者，於圖6及圖7中附有與圖3相同之符號。 In addition, the same reference numerals as in FIG. 3 are attached to FIGS. 6 and 7.

對實施例1~5及比較例1中獲得之孔填充基板進行350℃下之耐熱試驗。表面導電膜具有開口部之實施例1~5之所有基板均良好。於在導電通孔部之露出區域設置有保護膜之實施例4及5中可獲得與無保護膜之實施例1~3相同之效果。然而，表面導電膜無開口部之比較例1之基板於填充孔部之約一半之表面產生黑點、變色、鼓出或破裂。 The hole-filled substrates obtained in Examples 1 to 5 and Comparative Example 1 were subjected to a heat resistance test at 350 °C. All of the substrates of Examples 1 to 5 in which the surface conductive film had an opening portion were good. In Examples 4 and 5 in which the protective film was provided in the exposed region of the conductive via portion, the same effects as those of Examples 1 to 3 without the protective film were obtained. However, the substrate of Comparative Example 1 having no opening portion of the surface conductive film caused black spots, discoloration, bulging or cracking on the surface of about half of the filling hole portion.

又，將實施例1~5(有開口)之基板進行熱衝擊試驗、HAST試驗、高溫放置試驗之結果示於圖8~10。再者，比較例於加熱試驗中產生鼓出等，因此無法投入至該等可靠性試驗中。根據圖8~10之結果表明，於高溫放置試驗及HAST試驗中所有基板均維持非常穩定之電阻值。於環境更嚴酷之熱衝擊試驗中，可見某程度之電阻值之上升，變化量於同類試驗中較少，顯示出較高之可靠性。又，於露出區域之表面設置有保護膜之實施例4及5與填充銅導體(填充通孔部)於開口部直接露出之實施例1~3之結果幾乎無差異。即，即便於開口部填充銅導體直接露出，填充銅導體之氧化亦微小，不會對基板之電氣特性造成影響。 Further, the results of the thermal shock test, the HAST test, and the high-temperature placement test of the substrates of Examples 1 to 5 (with openings) are shown in Figs. 8 to 10. Further, in the comparative example, bulging or the like was generated in the heating test, and therefore it was not possible to invest in such reliability tests. The results of Figures 8-10 show that all substrates maintain a very stable resistance value in the high temperature placement test and the HAST test. In the more severe thermal shock test of the environment, it can be seen that the resistance value of a certain degree rises, and the amount of change is less in the similar test, showing higher reliability. Further, in Examples 1 and 3 in which the protective film was provided on the surface of the exposed region and the filled copper conductor (filled through-hole portion) was directly exposed in the opening portion, there was almost no difference. That is, even if the opening-filled copper conductor is directly exposed, the oxidation of the filled copper conductor is small, and the electrical characteristics of the substrate are not affected.

再者，於開口部露出銅之實施例1~3之基板於試驗後露出之銅變色為黑褐色。實施例4及5之基板於露出區域之表面形成有保護膜，因此無變色。 Further, in the substrates of Examples 1 to 3 in which copper was exposed at the opening, the copper which was exposed after the test was discolored to a dark brown color. The substrates of Examples 4 and 5 were formed with a protective film on the surface of the exposed region, so that no discoloration occurred.

又，詳細且參照特定之實施態樣說明了本發明，但業者明白於 不脫離本發明之精神與範圍下可加以各種修正或變更。 Further, the present invention has been described in detail with reference to specific embodiments, but the Various modifications or changes can be made without departing from the spirit and scope of the invention.

本申請案係基於2013年5月27日提出申請之日本專利申請案2013-111025及2014年1月30日提出申請之日本專利申請案2014-015282者，其內容係以參照之方式併入本文中。 The present application is based on Japanese Patent Application No. 2013-111025, filed on May 27, 2013, and the entire contents of in.

[產業上之可利用性] [Industrial availability]

本發明之孔填充基板可利用於電路基板、電子零件、半導體封裝之基板等。 The hole-filled substrate of the present invention can be used for a circuit board, an electronic component, a substrate of a semiconductor package, or the like.

1‧‧‧孔填充基板 1‧‧‧ hole filled substrate

2‧‧‧絕緣性基板 2‧‧‧Insulating substrate

3‧‧‧導電通孔部 3‧‧‧Electrical through hole

4‧‧‧表面導電膜 4‧‧‧Surface conductive film

4a‧‧‧開口部 4a‧‧‧ openings

Claims (17)

一種孔填充基板，其係包含於第一主面上具有孔部之絕緣性基板、由填充於上述孔部之導電性填充材所形成之導電通孔部、及形成於上述絕緣性基板之第一主面上之包含上述導電通孔部之區域之表面導電膜者，且上述表面導電膜係由使上述導電通孔部之第一主面側之表面之一部分露出之構造所形成。 A hole-filled substrate comprising an insulating substrate having a hole portion on a first main surface, a conductive via portion formed of a conductive filler filled in the hole portion, and a first surface formed on the insulating substrate A surface conductive film including a region of the conductive via portion on a main surface, wherein the surface conductive film is formed by partially exposing one surface of the first main surface side of the conductive via portion. 如請求項1之孔填充基板，其中上述孔部為貫通孔。 The hole of claim 1, wherein the hole portion is a through hole. 如請求項1之孔填充基板，其中上述表面導電膜包含鍍敷層。 The hole of claim 1, wherein the surface conductive film comprises a plating layer. 如請求項1之孔填充基板，其中於上述導電通孔部之露出區域之表面積層有對揮發性物質之透過性較上述表面導電膜高之保護膜。 The hole filling substrate according to claim 1, wherein the surface layer of the exposed region of the conductive via portion has a protective film having a higher permeability to a volatile substance than the surface conductive film. 如請求項4之孔填充基板，其中上述保護膜之平均厚度為上述表面導電膜之平均厚度之1/3以下。 The hole filling substrate according to claim 4, wherein the protective film has an average thickness of 1/3 or less of an average thickness of the surface conductive film. 如請求項4之孔填充基板，其中上述保護膜之表面係由選自鈀、鉑、銀及金中之至少1種貴金屬形成。 The hole according to claim 4, wherein the surface of the protective film is formed of at least one noble metal selected from the group consisting of palladium, platinum, silver, and gold. 如請求項4之孔填充基板，其中上述保護膜包含利用無電鍍敷形成之無電鍍敷層。 The hole of claim 4, wherein the protective film comprises an electroless plating layer formed by electroless plating. 如請求項1之孔填充基板，其中上述導電通孔部之第一主面側之表面係以50%以下之面積比率露出。 The hole filling substrate according to claim 1, wherein a surface of the first main surface side of the conductive via portion is exposed at an area ratio of 50% or less. 如請求項1之孔填充基板，其中上述表面導電膜於上述導電通孔部之第一主面側之表面之大致中央區域具有開口部，並且上述導電通孔部以5~20%之面積比率露出。 The hole-filling substrate of claim 1, wherein the surface conductive film has an opening portion in a substantially central portion of a surface of the first main surface side of the conductive via portion, and the conductive via portion has an area ratio of 5 to 20%. Exposed. 如請求項9之孔填充基板，其中上述孔部之與第一主面方向平行 之剖面形狀為大致圓形，並且上述表面導電膜之上述開口部之形狀為大致圓形。 The hole of claim 9, wherein the hole portion is parallel to the first main surface The cross-sectional shape is substantially circular, and the shape of the opening portion of the surface conductive film is substantially circular. 如請求項1之孔填充基板，其中上述絕緣性基板之表面粗糙度Ra為0.1μm以下。 The hole-filled substrate according to claim 1, wherein the insulating substrate has a surface roughness Ra of 0.1 μm or less. 如請求項1之孔填充基板，其中上述導電性填充材為導電性膏之焙燒物。 The hole filling substrate according to claim 1, wherein the conductive filler is a baked product of a conductive paste. 如請求項12之孔填充基板，其中上述導電性膏包含有機黏合劑。 The hole of claim 12, wherein the conductive paste comprises an organic binder. 一種如請求項1至13中任一項之孔填充基板之製造方法，其包括：導電通孔部形成步驟，其係於絕緣性基板之孔部填充導電性填充材而形成導電通孔部；及表面導電膜形成步驟，其係於上述絕緣性基板之第一主面上以使上述導電通孔部之第一主面側之表面之一部分露出之方式形成表面導電膜。 The method for manufacturing a hole-filled substrate according to any one of claims 1 to 13, comprising: a conductive via portion forming step of forming a conductive via portion by filling a conductive filler in a hole portion of the insulating substrate; And a surface conductive film forming step of forming a surface conductive film so that one of the surfaces of the first main surface side of the conductive via portion is partially exposed on the first main surface of the insulating substrate. 如請求項14之製造方法，其進而包括整面步驟，其係將上述導電通孔部形成步驟中所形成之導電通孔部之第一主面側的表面及絕緣性基板之第一主面側之表面調整為平滑。 The manufacturing method of claim 14, further comprising a whole surface step of forming a surface of the first main surface side of the conductive via portion formed in the conductive via portion forming step and a first main surface of the insulating substrate The surface of the side is adjusted to be smooth. 如請求項14之製造方法，其進而包括保護膜形成步驟，其係於上述導電通孔部之第一主面側之表面之露出區域之表面形成保護膜。 The manufacturing method of claim 14, further comprising a protective film forming step of forming a protective film on a surface of the exposed region of the surface of the first main surface side of the conductive via portion. 一種抑制表面導電膜之膨脹或剝離之方法，其係於包含具有孔部之絕緣性基板、由填充於上述孔部之導電性填充材所形成之導電通孔部、及形成於上述絕緣性基板之第一主面上之包含上述導電通孔部之區域之表面導電膜的孔填充基板中，由使上述 導電通孔部之第一主面側之表面之一部分露出之構造形成上述表面導電膜，藉此抑制過熱時上述表面導電膜之膨脹或剝離。 A method for suppressing expansion or peeling of a surface conductive film, comprising: an insulating substrate having a hole portion; a conductive via portion formed of a conductive filler filled in the hole portion; and an insulating substrate formed on the insulating substrate In the hole-filled substrate on the first main surface of the surface conductive film including the region of the conductive via portion, The surface conductive film is partially formed by partially exposing one surface of the first main surface side of the conductive via portion, thereby suppressing expansion or peeling of the surface conductive film during overheating.