TW201349404A - 半導體裝置及其製造方法 - Google Patents
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Abstract
本發明提供一種半導體裝置,包含:一第一封裝構件與一第二封裝構件,上述第二封裝構件是在上述第一封裝構件的下方,並連接於上述第一封裝構件。一封膠材料是位於上述第一封裝構件的下方並模封上述第一封裝構件與上述第二封裝構件,其中上述封膠材料與上述第一封裝構件形成一介面。一隔離區是具有一第一隔離區邊緣,其中上述第一隔離區邊緣接觸上述第一封裝構件的一第一封裝構件邊緣與上述封膠材料的一第一封膠材料邊緣,上述隔離區具有低於上述介面的一底部。
Description
本發明主要是關於一種半導體裝置及其製造方法,特別是關於一種具有隔離環結構之半導體裝置封裝體及其製造方法。
在積體電路的封裝技術中,是將裝置晶片連接於封裝構件上,上述封裝構件例如為一封裝基板帶的封裝基板中。上述封裝基板包含金屬連接線,上述金屬連接線是用來在個別的封裝基板的相反側之間傳遞電性訊號。可使用覆晶(flip chip)連接技術將上述晶片連接在一封裝基板帶上,然後施以回銲(reflow)將軟銲球熔化而使上述晶片與封裝基板相互連接。
將上述裝置晶片連接至上述封裝基板帶上之後,將一封膠組合物形成於上述裝置晶片與上述封裝基板帶上。然後,將上述封裝基板帶切開而成為複數個封裝體。雖然封膠組合物一般可抵抗水汽,但水汽仍會穿透至產物之封裝體內。
本發明的一實施例是提供一種半導體裝置,包含一第一封裝構件、一第二封裝構件、一封膠材料以及一隔離區。上述第二封裝構件是在上述第一封裝構件的下方,並連接於上述第一封裝構件。上述封膠材料是位於上述第一封裝構件
的下方並模封上述第一封裝構件與上述第二封裝構件,其中上述封膠材料與上述第一封裝構件形成一介面。上述隔離區是具有一第一隔離區邊緣,其中上述第一隔離區邊緣接觸上述第一封裝構件的一第一封裝構件邊緣與上述封膠材料的一第一封膠材料邊緣,上述隔離區具有低於上述介面的一底部。
在上述之半導體裝置中,較好為:上述第一封裝構件、上述第二封裝構件與上述封膠材料是形成一封裝體,其中上述隔離區的一第二隔離區邊緣與上述封膠材料的一第二封膠材料邊緣是形成上述封裝體的一封裝體邊緣。
在上述之半導體裝置中,上述隔離區較好是形成環繞上述第一封裝構件的一環狀物。
在上述之半導體裝置中,上述隔離區較好是具有接觸上述第一封裝構件的四個邊緣的四個內緣。
在上述之半導體裝置中,較好為:上述第一封裝構件是一層積基板,上述封膠材料包含一封膠組合物(molding compound)。
在上述之半導體裝置中,上述隔離區較好是包含一寬部以及一窄部。上述寬部較好是從上述第一封裝構件的一上表面延伸至上述封膠材料內,其中上述隔離區的底部較好是上述寬部的底部。上述窄部是窄於上述寬部,其中上述窄部較好是從上述寬部的底部進一步延伸至上述封膠材料內。
在上述之半導體裝置中,上述隔離區較好是包含一銲阻。
本發明的另一實施例是提供一種半導體裝置,包
含一封裝基板、一裝置晶片、一封膠組合物以及一聚合物。上述裝置晶片是在上述封裝基板的下方,並連接於上述封裝基板。上述封膠組合物是位於上述封裝基板的下方並模封上述封裝基板與上述裝置晶片上述聚合物是環繞並接觸上述封裝基板的邊緣,其中上述聚合物是從上述封裝基板的上表面延伸至低於上述封膠組合物的上表面的水平。
在上述之半導體裝置中,上述聚合物與上述封膠組合物較好是包含不同的材料。
在上述之半導體裝置中,較好為:上述聚合物的密度高於上述封膠組合物的密度。
在上述之半導體裝置中,較好為:上述聚合物是以液態的形式施加,然後從液態將其熟化成為固態。
在上述之半導體裝置中,較好為:上述聚合物具有外緣,其相對於接觸上述封裝基板之上述聚合物的內緣,其中上述聚合物的外緣是與上述封膠組合物的邊緣對準。
在上述之半導體裝置中,較好為:上述聚合物具有一寬部以及一窄部;上述寬部是從上述封裝基板的一上表面延伸至低於上述封膠組合物的上表面的水平;上述一窄部是窄於上述寬部,其中上述窄部從上述寬部的底部延伸至上述封膠組合物內。
在上述之半導體裝置中,上述聚合物較好是包含一銲阻。
本發明的又另一實施例是提供一種半導體裝置的製造方法。在上述方法中,首先將一第一封裝構件連接於一第
二封裝構件。然後,將一封膠材料模封上述第一封裝構件與上述第二封裝構件。接下來,形成穿透上述第一封裝構件的一溝槽,其中上述溝槽延伸至上述封膠材料內。下一步,將一隔離材料填入上述溝槽內,以形成一隔離區。最後,切穿上述隔離區與上述封膠材料以形成一封裝體,其中上述封裝體具有上述隔離區的一部分。
在上述之半導體裝置的製造方法中,較好為:上述第一封裝構件包含一封裝基板,上述封裝基板是包含於一封裝基板帶中,上述半導體裝置的製造方法更包含:將複數個第一封裝構件連接至上述封裝基板帶的複數個封裝基板上;在上述封裝基板帶中形成複數個溝槽,其中上述溝槽形成一格柵(grid),上述隔離材料是填入上述溝槽內,以形成複數個隔離區;以及切開上述封裝基板帶與上述隔離材料,成為複數個封裝體。
在上述之半導體裝置的製造方法中,較好為:在上述封裝體中,上述隔離區形成一環狀物,上述環狀物環繞上述第一封裝構件並環繞上述第一封裝構件與上述第二封裝構件之間的一介面。
在上述之半導體裝置的製造方法中,較好為:形成該溝槽的步驟更包含:執行一第一開槽步驟以形成該溝槽的一寬部,其中該寬部從該第一封裝構件的一上表面延伸至該封膠材料內;以及執行一第二開槽步驟以形成一窄部,該窄部從該寬部的底部延伸至該封膠材料內,其中該窄部窄於該寬部。
在上述之半導體裝置的製造方法中,較好為:填
入該隔離材料的步驟包含:將液態的該隔離材料施加於該溝槽內;以及將該隔離材料熟化。
在上述之半導體裝置的製造方法中,較好為:在切穿該隔離區與該封膠材料的過程中,該隔離區具有複數個殘留部,上述殘留部是在該切穿的步驟形成的一切口(kerf)的的對立側。
20‧‧‧封裝構件(封裝基板帶)
22‧‧‧封裝基板
23‧‧‧介電膜
24‧‧‧接合物
26‧‧‧接合物
28‧‧‧金屬導線
30‧‧‧介層窗
32‧‧‧封裝構件
34‧‧‧電性接合物
35‧‧‧聚合物
35A‧‧‧邊緣
36‧‧‧溝槽
36'‧‧‧寬部
36"‧‧‧窄部
38‧‧‧隔離區
38'‧‧‧寬部
38"‧‧‧窄部
38'''‧‧‧附加寬部
38A‧‧‧內緣
38B‧‧‧外緣
39‧‧‧切口線
40‧‧‧封裝體
42‧‧‧介面
44‧‧‧路徑
45‧‧‧路徑
46‧‧‧路徑
D1‧‧‧深度
D2‧‧‧深度
T1‧‧‧厚度
T2‧‧‧厚度
W1‧‧‧寬度
第1圖至第5B圖為一系列的俯視圖與剖面圖,顯示某些例示實施例的封裝體的形成之中間步驟,其中:第1圖是一俯視圖,顯示某些實施例之封裝構件;第2A圖是一俯視圖,顯示在本發明較佳實施例中,將複數個封裝構件連接於第1圖的封裝基板上;第2B圖是一剖面圖,顯示沿著第2A圖中的線段2B-2B的剖面結構;第3A圖是一俯視圖,顯示在本發明較佳實施例中,複數個溝槽形成於封裝基板之間,並使封裝基板彼此分離;第3B圖是一剖面圖,顯示沿著第3A圖中的線段3B-3B的剖面結構;第4A圖為一俯視圖,顯示在本發明較佳實施例中,形成複數個隔離區後的結構;第4B圖是一剖面圖,顯示沿著第4A圖中的線段4B-4B的剖面結構;第5A圖及第5B圖是分別顯示本發明較佳實施例之封裝體
的俯視圖及剖面圖;第6圖為一剖面圖,顯示替代性的例示實施例的封裝體之形成;第7圖為一剖面圖,顯示替代性的例示實施例的封裝體之形成;以及第8圖為一剖面圖,顯示替代性的例示實施例的封裝體之形成。
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳細說明如下:在各種例示的實施例中,提供封裝體及其形成方法。形成上述封裝體的中間步驟是繪示於圖式中。以下會討論到各種實施例,在各圖式中所示各實施例中,同類的元件符號是用來代表同類的元件。
第1圖是顯示一封裝構件20的俯視圖。在某些實施例中,封裝構件20是一封裝基板帶,因此在後文中稱之為封裝基板帶20,但是封裝構件20亦可以是其他形式的封裝構件例如為一中介晶圓(interposer wafer)、一裝置晶圓等等。在封裝構件20是一封裝基板帶的實施例中,封裝基板帶20是包含複數個封裝基板22,其中這些封裝基板22是彼此相同。在某些實施例中,封裝基板22是在圖式中的X與Y方向之一或二者平均分布,而且可具有陣列式的佈局。
封裝基板22可以是層積基板(laminate
substrates)、或可以是增層積板(build-up substrates),層積基板包含經由層積而黏在一起的複數個介電膜23(示於第2B圖)。介電膜23可包含混合玻璃纖維及/或樹脂的複合材料。複數個金屬導線(trace)28與介層窗(via)30(第2B圖)是形成於層積介電膜23中。又如第2B圖所示,複數個接合物24是形成於封裝基板22的一表面上,並經由金屬導線28連接於在個別封裝基板22的相反面上的複數個接合物26。在某些實施例中,接合物24是金屬導線,其是用來形成凸塊導線直連(bump on trace;BOT)之連接;在替代性的實施例中,接合物24是金屬墊、金屬柱、包含金屬物與軟銲帽蓋的複合接合物、或是其類似物。
第2A圖是一俯視圖,顯示將複數個封裝構件32連接於第1圖的封裝基板22上。第2B圖是一剖面圖,顯示沿著第2A圖中的線段2B-2B的剖面結構。在某些實施例中,封裝構件32是晶片(例如包含複數個電晶體的裝置晶片)、封裝體、或類似物。請參考第2B圖,可經由軟銲連接來作連接,其中封裝構件32的複數個電性接合物34是軟銲球。在某些例示的實施例中,上述連接是凸塊導線直連之連接。
仍是如第2B圖所示,將封裝構件32連接於封裝基板22上之後,施加聚合物35將封裝構件32與封裝基板22予以模封。在某些實施例中,聚合物35是一封膠組合物(molding compound)、一模封底膠(molding underfill)、一環氧樹脂(epoxy)或類似物,可將一底膠(未繪示)施加到封裝構件32與封裝基板22之間的間隙內。亦可不施加上述底膠,使用一模封底膠來取代,除了模封封裝構件32之外,還將上述模封底膠置於上述間
隙中。
請參考第3A與3B圖,在封裝基板帶20上執行一開槽步驟,以形成複數個溝槽36。可使用一刀具、一雷射光束或類似工具來進行上述開槽步驟。請參考第3A圖,為一俯視圖,顯示複數個溝槽36形成於封裝基板22之間,並使封裝基板22彼此分離,其中溝槽36可形成一格柵(grid)。第3B圖是一剖面圖,顯示沿著第3A圖中的線段3B-3B的剖面結構。如第3B圖所示,溝槽36是穿透封裝基板帶20,延伸至聚合物35內,並止於聚合物35的中間部位。於是,溝槽36的深度D1至少大於封裝基板帶20的厚度T1。此外,溝槽36之位於聚合物35內的深度D2,可大於聚合物35的厚度T2的約百分之二十,且可以是厚度T2的約百分之二十至約百分之八十。另外,溝槽36的寬度W1可為約1,000 μm至約5,000 μm。
將一隔離材料填入溝槽36,然後將此隔離材料熟化(固化)而形成複數個隔離區38。執行上述步驟後的結構示於第4A與4B圖。第4A圖為一俯視圖,顯示形成複數個隔離區38後的結構。第4B圖是一剖面圖,顯示沿著第4A圖中的線段4B-4B的剖面結構。隔離區38的上表面可稍高於、等高於或低於封裝基板22的上表面。將上述隔離材料填入溝槽36時,上述隔離材料可以是一液體或一膠狀物,其黏度夠低而足以填入聚合物35(第5B圖)的微孔洞(未繪示)內。隔離區38可以是一聚合物、一樹脂或上述的類似物。在一例示的實施例中,隔離區38的隔離材料是一銲阻(solder resist)例如包含醇酸樹脂(Alkyd resin)、丙烯酸酯環氧樹脂(acrylated epoxy resin)、甲基丙烯酸
酯環氧樹脂(methacrylated epoxy resin)或上述的類似物。在熟化之後,在某些實施例中,隔離區38的孔隙率低於熟化後的聚合物35的孔隙率。例如隔離區38的空隙率比上聚合物35的孔隙率低於約3%。在某些實施例中,隔離區38的空隙率約可為0至3%,而聚合物35的孔隙率可能大於3%。上述隔離材料的施加,可經由例如模板印刷(stencil printing)來進行。
接下來,仍如第4B圖所示,執行一晶片切割步驟,已將第4A與4B圖所示結構切割成複數個封裝體40。切口線39是位在隔離區38的對立邊緣38A,在晶片切割步驟之後,在切口線39的對立邊有隔離區38的殘留的部分。第5A圖及第5B圖是分別顯示封裝體40的俯視圖及剖面圖。如第5A圖所示,隔離區38是位於封裝體40的周邊區域。請瞭解雖然隔離區38可以使用多種形態來表現,如第5A圖所示,隔離區38可以是同一個連續環狀物的一部分。隔離區38的內緣38A是與封裝基板22的邊緣接觸。
請參考第5B圖,隔離區38的外緣38B亦作為封裝體40的邊緣。外緣38B是對準於聚合物35的邊緣35A。隔離區38的內緣38A是與外緣38B為相反側,並與封裝基板22及聚合物35都有接觸。此外,內緣38A是接觸聚合物35與封裝基板22之間的介面42接觸。
在某些實施例中,隔離區38是形成一環狀物,其環繞並接觸介面42。介面42可能是弱點,而使水汽與有害的化學氣體可能會通過此處。例如,水汽的傳遞可能從外界的空氣通過介面42而到達內部構件例如電性接合物24。已瞭解水汽穿
透的阻力會隨著其傳遞路徑的變長而增加,於是如第5B圖所示,假設若未形成隔離區38,水汽可能從外界空氣經由路徑45而傳遞到電性接合物24。當形成了隔離區38,水汽可從外界空氣經由路徑44、46而傳遞到電性接合物24,而路徑44、46比路徑45還長。既然路徑44、46比路徑45還長,則使所形成的封裝體40增加了對水汽與有害的化學氣體穿透的抵抗力,而優於未形成隔離區38的結構。其結果,既然電性接合物受到來自水汽與有害的化學物質的危害的程度較低,就減少了在相鄰的電性接合物24之間發生短路的風險。例如,短路可能會因為在相鄰的電性接合物24之間形成樹枝狀結構而發生,而這些會造成不良影響的樹枝狀結構還會因為電性接合物24的金屬離子的氧化、被氧化的金屬離子沿著介面42遷移、以及遷移的金屬離子的還原而形成。
第6與7圖為一系列之剖面圖,顯示替代性的例示實施例的封裝體40之形成。在第6圖中,溝槽36具有寬部36'與窄部36",窄部36"窄於寬部36'。在溝槽36的形成中,先形成寬部36',其中寬部36'可從封裝基板22的上表面延伸到聚合物35內。既然如第3A圖所示,溝槽36形成柵格,且寬部溝槽36'是溝槽36的一部分,因此寬部36'可形成一柵格。接下來,形成複數個窄部36",其從寬部36'的底部延伸而更深入聚合物35。接下來如第7圖所示,將隔離材料填入溝槽36以形成隔離區38,而使隔離區38亦包含寬部與窄部。然後,執行一晶片切割步驟,以將封裝基板帶20、隔離區38以及聚合物35而成為複數個封裝體40。上述切割步驟的個別的切口線39是繪示於第7圖。
第8圖為一剖面圖,顯示另一個替代性的例示實施例的封裝體40之形成。在本實施例中,隔離區38包含寬部38'、窄部38"、以及附加寬部38'''。在隔離區38的溝槽的形成中,用以形成寬部38'與窄部38"的溝槽可在切割封裝基板帶20之前形成,而用以形成附加寬部38'''的溝槽則可在切割封裝基板帶20之後形成。隔離材料的填充可在晶片切割步驟之後進行。
本發明的一實施例是提供一種半導體裝置,包含一第一封裝構件、一第二封裝構件、一封膠材料以及一隔離區。上述第二封裝構件是在上述第一封裝構件的下方,並連接於上述第一封裝構件。上述封膠材料是位於上述第一封裝構件的下方並模封上述第一封裝構件與上述第二封裝構件,其中上述封膠材料與上述第一封裝構件形成一介面。上述隔離區是具有一第一隔離區邊緣,其中上述第一隔離區邊緣接觸上述第一封裝構件的一第一封裝構件邊緣與上述封膠材料的一第一封膠材料邊緣,上述隔離區具有低於上述介面的一底部。
本發明的另一實施例是提供一種半導體裝置,包含一封裝基板、一裝置晶片、一封膠組合物以及一聚合物。上述裝置晶片是在上述封裝基板的下方,並連接於上述封裝基板。上述封膠組合物是位於上述封裝基板的下方並模封上述封裝基板與上述裝置晶片上述聚合物是環繞並接觸上述封裝基板的邊緣,其中上述聚合物是從上述封裝基板的上表面延伸至低於上述封膠組合物的上表面的水平。
本發明的又另一實施例是提供一種半導體裝置的製造方法。在上述方法中,首先將一第一封裝構件連接於一第
二封裝構件。然後,將一封膠材料模封上述第一封裝構件與上述第二封裝構件。接下來,形成穿透上述第一封裝構件的一溝槽,其中上述溝槽延伸至上述封膠材料內。下一步,將一隔離材料填入上述溝槽內,以形成一隔離區。最後,切穿上述隔離區與上述封膠材料以形成一封裝體,其中上述封裝體具有上述隔離區的一部分。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
22‧‧‧封裝基板
24‧‧‧接合物
32‧‧‧封裝構件
35‧‧‧聚合物
35A‧‧‧邊緣
38‧‧‧隔離區
38A‧‧‧內緣
38B‧‧‧外緣
40‧‧‧封裝體
42‧‧‧介面
44‧‧‧路徑
45‧‧‧路徑
46‧‧‧路徑
Claims (10)
- 一種半導體裝置,包含:一第一封裝構件;一第二封裝構件,在該第一封裝構件的下方,並連接於該第一封裝構件;一封膠材料,位於該第一封裝構件的下方並模封該第一封裝構件與該第二封裝構件,其中該封膠材料與該第一封裝構件形成一介面;以及一隔離區,具有一第一隔離區邊緣,其中該第一隔離區邊緣接觸該第一封裝構件的一第一封裝構件邊緣與該封膠材料的一第一封膠材料邊緣,該隔離區具有低於該介面的一底部。
- 如申請專利範圍第1項所述之半導體裝置,其中該隔離區形成環繞該第一封裝構件的一環狀物。
- 如申請專利範圍第1項所述之半導體裝置,其中該隔離區包含:一寬部,從該第一封裝構件的一上表面延伸至該封膠材料內,其中該隔離區的底部是該寬部的底部;以及一窄部,窄於該寬部,其中該窄部從該寬部的底部進一步延伸至該封膠材料內。
- 一種半導體裝置,包含:一封裝基板;一裝置晶片,在該封裝基板的下方,並連接於該封裝基板;一封膠組合物,位於該封裝基板的下方並模封該封裝基板 與該裝置晶片;以及一聚合物,環繞並接觸該封裝基板的邊緣,其中該聚合物是從該封裝基板的上表面延伸至低於該封膠組合物的上表面的水平。
- 如申請專利範圍第4項所述之半導體裝置,其中該聚合物具有外緣,其相對於接觸該封裝基板之該聚合物的內緣,其中該聚合物的外緣是與該封膠組合物的邊緣對準。
- 如申請專利範圍第5項所述之半導體裝置,其中該聚合物具有:一寬部,從該封裝基板的一上表面延伸至低於該封膠組合物的上表面的水平;以及一窄部,窄於該寬部,其中該窄部從該寬部的底部延伸至該封膠組合物內。
- 一種半導體裝置的製造方法,包含:將一第一封裝構件連接於一第二封裝構件;將一封膠材料模封該第一封裝構件與該第二封裝構件;形成穿透該第一封裝構件的一溝槽,其中該溝槽延伸至該封膠材料內;將一隔離材料填入該溝槽內,以形成一隔離區;以及切穿該隔離區與該封膠材料以形成一封裝體,其中該封裝體具有該隔離區的一部分。
- 如申請專利範圍第7項所述之半導體裝置的製造方法,其中該第一封裝構件包含一封裝基板,該封裝基板是包含於一封裝基板帶中,該半導體裝置的製造方法更包含: 將複數個第一封裝構件連接至該封裝基板帶的複數個封裝基板上;在該封裝基板帶中形成複數個溝槽,其中該些溝槽形成一格柵(grid),該隔離材料是填入該些溝槽內,以形成複數個隔離區;以及切開該封裝基板帶與該隔離材料,成為複數個封裝體。
- 如申請專利範圍第7項所述之半導體裝置的製造方法,其中在該封裝體中,該隔離區形成一環狀物,該環狀物環繞該第一封裝構件並環繞該第一封裝構件與該第二封裝構件之間的一介面。
- 如申請專利範圍第7項所述之半導體裝置的製造方法,其中形成該溝槽的步驟更包含:執行一第一開槽步驟以形成該溝槽的一寬部,其中該寬部從該第一封裝構件的一上表面延伸至該封膠材料內;以及執行一第二開槽步驟以形成一窄部,該窄部從該寬部的底部延伸至該封膠材料內,其中該窄部窄於該寬部。
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US8710681B2 (en) | 2014-04-29 |
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US20150262882A1 (en) | 2015-09-17 |
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US9548245B2 (en) | 2017-01-17 |
US20130320572A1 (en) | 2013-12-05 |
US20170103933A1 (en) | 2017-04-13 |
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US20140179062A1 (en) | 2014-06-26 |
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