SE518155C2 - Digital faslåst slinga - Google Patents

Digital faslåst slinga

Info

Publication number
SE518155C2
SE518155C2 SE9600726A SE9600726A SE518155C2 SE 518155 C2 SE518155 C2 SE 518155C2 SE 9600726 A SE9600726 A SE 9600726A SE 9600726 A SE9600726 A SE 9600726A SE 518155 C2 SE518155 C2 SE 518155C2
Authority
SE
Sweden
Prior art keywords
output
input
clock
signal
receive
Prior art date
Application number
SE9600726A
Other languages
English (en)
Swedish (sv)
Other versions
SE9600726D0 (sv
SE9600726L (sv
Inventor
Maverick Martin Killian
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of SE9600726D0 publication Critical patent/SE9600726D0/xx
Publication of SE9600726L publication Critical patent/SE9600726L/
Publication of SE518155C2 publication Critical patent/SE518155C2/sv

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
SE9600726A 1994-06-30 1996-02-27 Digital faslåst slinga SE518155C2 (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/269,245 US5502751A (en) 1994-06-30 1994-06-30 Digital phase locked loop
PCT/US1995/006047 WO1996001005A1 (en) 1994-06-30 1995-05-15 Digital phase locked loop

Publications (3)

Publication Number Publication Date
SE9600726D0 SE9600726D0 (sv) 1996-02-27
SE9600726L SE9600726L (sv) 1996-04-30
SE518155C2 true SE518155C2 (sv) 2002-09-03

Family

ID=23026436

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9600726A SE518155C2 (sv) 1994-06-30 1996-02-27 Digital faslåst slinga

Country Status (7)

Country Link
US (1) US5502751A (ko)
JP (1) JP3151829B2 (ko)
KR (1) KR100222360B1 (ko)
CN (1) CN1059523C (ko)
GB (1) GB2296397B (ko)
SE (1) SE518155C2 (ko)
WO (1) WO1996001005A1 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6076096A (en) * 1998-01-13 2000-06-13 Motorola Inc. Binary rate multiplier
US6415008B1 (en) 1998-12-15 2002-07-02 BéCHADE ROLAND ALBERT Digital signal multiplier
KR100432422B1 (ko) * 1998-12-18 2004-09-10 서창전기통신 주식회사 단일위상동기루프구조를갖는무선주파수송수신모듈제어방법
US6609781B2 (en) 2000-12-13 2003-08-26 Lexmark International, Inc. Printer system with encoder filtering arrangement and method for high frequency error reduction
US7697027B2 (en) 2001-07-31 2010-04-13 Donnelly Corporation Vehicular video system
CN102360191B (zh) * 2011-08-30 2013-07-03 北京交通大学 滚轮式双轴光电编码器数据处理仪
KR102566909B1 (ko) * 2021-12-08 2023-08-16 주식회사 셀코스 자외선 경화 장치

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4688094A (en) * 1984-09-28 1987-08-18 Kabushiki Kaisha Toshiba Reference signal reproduction apparatus
US4964117A (en) * 1988-10-04 1990-10-16 Vtc Incorporated Timing synchronizing circuit for baseband data signals
JPH02124637A (ja) * 1988-11-02 1990-05-11 Nec Corp 同期検出回路
US5278874A (en) * 1992-09-02 1994-01-11 Motorola, Inc. Phase lock loop frequency correction circuit

Also Published As

Publication number Publication date
SE9600726D0 (sv) 1996-02-27
GB2296397B (en) 1999-01-06
GB2296397A (en) 1996-06-26
GB9603602D0 (en) 1996-04-17
KR100222360B1 (ko) 1999-10-01
JPH09502594A (ja) 1997-03-11
SE9600726L (sv) 1996-04-30
US5502751A (en) 1996-03-26
KR960705397A (ko) 1996-10-09
CN1059523C (zh) 2000-12-13
JP3151829B2 (ja) 2001-04-03
WO1996001005A1 (en) 1996-01-11
CN1130000A (zh) 1996-08-28

Similar Documents

Publication Publication Date Title
US7046060B1 (en) Method and apparatus compensating for frequency drift in a delay locked loop
US5646564A (en) Phase-locked delay loop for clock correction
US6297702B1 (en) Phase lock loop system and method
US4791386A (en) Digital phase-locked loop with random walk filter
JPH05244145A (ja) 可変タイミング信号発生回路
SE518155C2 (sv) Digital faslåst slinga
US5572554A (en) Synchronizer and method therefor
US5058106A (en) Flywheel circuit
JP2798918B2 (ja) パルス幅変調回路
KR960012470B1 (ko) 프로그램 가능한 타임아웃 타이머
JPH07326963A (ja) デジタルｐｌｌ回路
JP2679481B2 (ja) 自走式同期回路
SU1246083A1 (ru) Управл емый генератор импульсов
SU1034162A1 (ru) Устройство дл формировани серий импульсов
KR100336753B1 (ko) 상태 클럭 발생기
GB2240241A (en) Data transmission systems
JPH10257040A (ja) 位相設定回路
JP2526705B2 (ja) フレ―ム同期保護装置
JPH04369940A (ja) 同期回路
JPH05111166A (ja) 交流電源装置の位相差検出回路
WO2007083443A1 (ja) スキュー補正装置
JPH1185717A (ja) 同期割込み方法
JPH0286234A (ja) フレーム同期回路
JPS63316521A (ja) 周波数誤差検出回路
JPS6367775B2 (ko)

Legal Events

Date Code Title Description
NUG Patent has lapsed