NL7605549A - METHOD OF MAKING A NARROW OPENING IN A SURFACE OF A MATERIAL. - Google Patents

METHOD OF MAKING A NARROW OPENING IN A SURFACE OF A MATERIAL.

Info

Publication number
NL7605549A
NL7605549A NL7605549A NL7605549A NL7605549A NL 7605549 A NL7605549 A NL 7605549A NL 7605549 A NL7605549 A NL 7605549A NL 7605549 A NL7605549 A NL 7605549A NL 7605549 A NL7605549 A NL 7605549A
Authority
NL
Netherlands
Prior art keywords
making
narrow opening
narrow
opening
Prior art date
Application number
NL7605549A
Other languages
Dutch (nl)
Original Assignee
Fairchild Camera Instr Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/619,735 external-priority patent/US4063992A/en
Application filed by Fairchild Camera Instr Co filed Critical Fairchild Camera Instr Co
Publication of NL7605549A publication Critical patent/NL7605549A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76833Buried channel CCD
    • H01L29/7685Three-Phase CCD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823406Combination of charge coupled devices, i.e. CCD, or BBD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76833Buried channel CCD
    • H01L29/76841Two-Phase CCD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
NL7605549A 1975-05-27 1976-05-24 METHOD OF MAKING A NARROW OPENING IN A SURFACE OF A MATERIAL. NL7605549A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58138975A 1975-05-27 1975-05-27
US05/619,735 US4063992A (en) 1975-05-27 1975-10-06 Edge etch method for producing narrow openings to the surface of materials

Publications (1)

Publication Number Publication Date
NL7605549A true NL7605549A (en) 1976-11-30

Family

ID=27078310

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7605549A NL7605549A (en) 1975-05-27 1976-05-24 METHOD OF MAKING A NARROW OPENING IN A SURFACE OF A MATERIAL.

Country Status (6)

Country Link
JP (1) JPS51145274A (en)
CA (1) CA1076934A (en)
DE (1) DE2622790A1 (en)
FR (1) FR2312856A1 (en)
GB (1) GB1543845A (en)
NL (1) NL7605549A (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS544570A (en) * 1977-06-13 1979-01-13 Nec Corp Production of semiconductor devices
JPS5533064A (en) * 1978-08-29 1980-03-08 Chiyou Lsi Gijutsu Kenkyu Kumiai Method of manufacturing semiconductor device
FR2454698A1 (en) * 1979-04-20 1980-11-14 Radiotechnique Compelec METHOD FOR PRODUCING INTEGRATED CIRCUITS USING A MULTILAYER MASK AND DEVICES OBTAINED BY THIS METHOD
DE2939488A1 (en) * 1979-09-28 1981-04-16 Siemens AG, 1000 Berlin und 8000 München METHOD FOR PRODUCING INTEGRATED SEMICONDUCTOR CIRCUITS, IN PARTICULAR CCD CIRCUITS, WITH SELF-ADJUSTED, NON-OVERLAPPING POLY-SILICON ELECTRODES
DE2939456A1 (en) * 1979-09-28 1981-04-16 Siemens AG, 1000 Berlin und 8000 München METHOD FOR PRODUCING INTEGRATED SEMICONDUCTOR CIRCUITS, IN PARTICULAR CCD CIRCUITS, WITH SELF-ADJUSTED, NON-OVERLAPPING POLY-SILICON ELECTRODES
US4318759A (en) * 1980-07-21 1982-03-09 Data General Corporation Retro-etch process for integrated circuits
JPS581878A (en) * 1981-06-26 1983-01-07 Fujitsu Ltd Production of bubble memory device
US5126811A (en) * 1990-01-29 1992-06-30 Mitsubishi Denki Kabushiki Kaisha Charge transfer device with electrode structure of high transfer efficiency
US6965165B2 (en) 1998-12-21 2005-11-15 Mou-Shiung Lin Top layers of metal for high performance IC's

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7005296A (en) * 1969-04-15 1970-10-19
JPS4874178A (en) * 1971-12-29 1973-10-05
MX3855E (en) * 1975-03-21 1981-08-20 Western Electric Co IMPROVEMENTS IN THE METHOD FOR MANUFACTURING TRANSISTOR STRUCTURES

Also Published As

Publication number Publication date
CA1076934A (en) 1980-05-06
DE2622790A1 (en) 1976-12-09
FR2312856A1 (en) 1976-12-24
AU1437576A (en) 1977-12-01
GB1543845A (en) 1979-04-11
JPS51145274A (en) 1976-12-14
JPS5711505B2 (en) 1982-03-04
FR2312856B1 (en) 1982-11-05

Similar Documents

Publication Publication Date Title
NL176144B (en) FORMED PRODUCT WITH A CATIONOUS CHARACTER AND METHODS FOR MANUFACTURING THAT.
NL7602717A (en) METHODS FOR THE PREPARATION AND APPLICATION OF A BIOLOGICAL MATERIAL.
NL7602560A (en) METHOD OF FORMING A RING-SHAPED GROOVE IN A THERMOPLASTIC PIPE.
NL172169C (en) METHOD FOR FIRE-PROOF MAKING A MATERIAL
NL7604935A (en) PLATE MATERIAL AND METHOD FOR MANUFACTURING THEREOF.
NL172788B (en) SAMPLE MATERIAL AND METHOD FOR DETERMINING OR DETERMINING A PARTICULAR COMPONENT OF A SAMPLE.
NL7612913A (en) METHOD AND DEVICE FOR MANUFACTURING A DISC WITH INTEGRAL SHIPS.
NL7608300A (en) METHOD AND DEVICE FOR APPLYING A PATTERN ON A MATERIAL.
NL7602566A (en) METHOD OF FORMING A PATTERN IN A LAYER.
NL7605617A (en) BREEDING BLOCK AND A METHOD FOR MANUFACTURING THEREOF.
NL7605927A (en) DESIGN AND METHOD FOR TREATING A SURFACE.
NL7902338A (en) METHOD FOR FORMING A VALVE AND THEREFORE FORMED VALVE.
NL177832C (en) METHOD FOR STICKING TEXTILE MATERIALS
NL7604021A (en) METHOD FOR DETERMINING THROMBOSIS AND PRETROMBOSIS.
NL7601483A (en) METHOD OF PREPARING A DETERGENT ADDITION AND A DETERGENT.
NL7612438A (en) PROCEDURE FOR MANUFACTURING A HOLDER AND A DEVICE FOR APPLYING THIS PROCEDURE.
NL7601485A (en) METHOD FOR PREPARING A DETERGENT AMPLIFIER AND A DETERGENT.
NL7605549A (en) METHOD OF MAKING A NARROW OPENING IN A SURFACE OF A MATERIAL.
NL183820C (en) PROCESS FOR PREPARING A FIRE-RESISTANT MIX AND FORMED ARTICLE
NL7613127A (en) METHOD OF PREPARING A TITANY AND ARTICLES MANUFACTURED FROM IT.
NL7611408A (en) METHOD AND DEVICE FOR APPLYING A DECORATION OR DECORATION ON A MOLDED OBJECT.
NL7614177A (en) METHOD FOR FORMING A TUNNEL AND APPLIED TUNNEL FORMING MACHINE.
NL7711011A (en) METHOD OF PREPARING A MAGNETIC MATERIAL.
NL7512888A (en) METHOD OF MANUFACTURING A PLASTIC-COATED CEMENT PRODUCT.
NL7513111A (en) METHOD AND DEVICE FOR THE CONTINUOUS MANUFACTURING OF A FOAMSTRING.

Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
BV The patent application has lapsed