KR980005667A - 반도체 소자의 폴리사이드층 형성 방법 - Google Patents

반도체 소자의 폴리사이드층 형성 방법 Download PDF

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Publication number
KR980005667A
KR980005667A KR1019960022799A KR19960022799A KR980005667A KR 980005667 A KR980005667 A KR 980005667A KR 1019960022799 A KR1019960022799 A KR 1019960022799A KR 19960022799 A KR19960022799 A KR 19960022799A KR 980005667 A KR980005667 A KR 980005667A
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South Korea
Prior art keywords
semiconductor device
layer
polyside
forming
impurity concentration
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KR1019960022799A
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English (en)
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KR100250744B1 (ko
Inventor
정성희
김정태
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김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960022799A priority Critical patent/KR100250744B1/ko
Priority to GB9712517A priority patent/GB2314456B/en
Priority to US08/876,733 priority patent/US5976961A/en
Priority to JP9162198A priority patent/JP2828438B2/ja
Priority to DE19726308A priority patent/DE19726308B4/de
Publication of KR980005667A publication Critical patent/KR980005667A/ko
Application granted granted Critical
Publication of KR100250744B1 publication Critical patent/KR100250744B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 폴리사이드층 형성 방법에 관한 것으로, 도프 폴리실리콘(Doped Poly-sSi)에 함유된 불순물 이온의 확산으로 인한 전기적 특성 저하를 방지하기 위하여 도프 폴리실리콘층을 다층으로 형성하되, 중간층의 불순물 농도를 낮게 한다. 그러므로 후속 열처리 공정시 불순물 농도가 가장 낮은 중간층의 상하부에 형성된 도프 폴리실리콘층으로부터 불순물 농도가 낮은 상기 중간층으로 불순물 이온의 확산이 발생되므로 불순물 이온의 확산으로 인한 접합부의 깊이 변화 및 텅스텐 실리사이드의 저항 값 증가가 방지된다. 따라서 소자의 수율 및 전기적 특성이 향상될 수 있는 반도체 소자의 폴리사이드층 형성 방법에 관한 것이다.

Description

반도체 소자의 폴리사이드층 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4a 내지 제4c도는 본 발명에 따른 반도체 소자의 폴리사이드층 형성 방법을 설명하기 위한 소자의 단면도.

Claims (4)

  1. 반도체 소자의 폴리사이드층 형성 방법에 있어서 절연층이 형성된 실리콘 기판상에 제1 내지 제3도프 폴리실리콘층을 순차적으로 형성하는 단계와, 상기 단계로부터 상기 제3도프 폴리실리콘층상에 텅스텐 실리사이드를 증착하는 단계로 이루어지는 특징으로 하는 반도체 소자의 폴리사이드충 형성 방법.
  2. 제1항에 있어서, 상기 제2도프 폴리실리콘층의 불순물 농도는 상기 제1 및 제3도프 폴리실리콘층의 불순물 농도보다 낮은 것을 특징으로 하는 반도체 소자의폴리사이드층 형성 방법.
  3. 제2항에 있어서, 상기 불순물은 인(P)인 것을 특징으로 하는 반도체 소자의 폴리사이드층 형성 방법.
  4. 제1항에 있어서, 상기 텅스텐 실리사이드는 인-시투 방식으로 증착되는 것을 특징으로 하는 반도체 소자의 폴리사이드층 형성 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960022799A 1996-06-21 1996-06-21 반도체 소자의 폴리사이드층 형성 방법 KR100250744B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019960022799A KR100250744B1 (ko) 1996-06-21 1996-06-21 반도체 소자의 폴리사이드층 형성 방법
GB9712517A GB2314456B (en) 1996-06-21 1997-06-16 Method of forming a polycide layer in a semiconductor device
US08/876,733 US5976961A (en) 1996-06-21 1997-06-16 Method of forming a polycide layer in a semiconductor device
JP9162198A JP2828438B2 (ja) 1996-06-21 1997-06-19 半導体素子のポリサイド層形成方法
DE19726308A DE19726308B4 (de) 1996-06-21 1997-06-20 Verfahren zur Bildung einer Polycidschicht bei einem Halbleiterbauelement sowie Halbleiterbauelement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960022799A KR100250744B1 (ko) 1996-06-21 1996-06-21 반도체 소자의 폴리사이드층 형성 방법

Publications (2)

Publication Number Publication Date
KR980005667A true KR980005667A (ko) 1998-03-30
KR100250744B1 KR100250744B1 (ko) 2000-05-01

Family

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KR1019960022799A KR100250744B1 (ko) 1996-06-21 1996-06-21 반도체 소자의 폴리사이드층 형성 방법

Country Status (5)

Country Link
US (1) US5976961A (ko)
JP (1) JP2828438B2 (ko)
KR (1) KR100250744B1 (ko)
DE (1) DE19726308B4 (ko)
GB (1) GB2314456B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100376810B1 (ko) * 1998-09-23 2003-06-12 유나이티드 마이크로일렉트로닉스 코퍼레이션 배리어막을갖는반도체소자및그제조방법

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10125617A (ja) * 1996-10-21 1998-05-15 Nec Corp 半導体装置の製造方法
US6025264A (en) * 1998-02-09 2000-02-15 United Microelectronics Corp. Fabricating method of a barrier layer
TW387137B (en) * 1998-04-27 2000-04-11 Mosel Vitelic Inc Method for controlling dopant diffusion in plug doped
US6067680A (en) * 1998-04-29 2000-05-30 Micron Technology, Inc. Semiconductor processing method of forming a conductively doped semiconductive material plug within a contact opening
TW434866B (en) * 1999-08-13 2001-05-16 Taiwan Semiconductor Mfg Manufacturing method for contact plug
US6670682B1 (en) * 2002-08-29 2003-12-30 Micron Technology, Inc. Multilayered doped conductor

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US5190886A (en) * 1984-12-11 1993-03-02 Seiko Epson Corporation Semiconductor device and method of production
US5112435A (en) * 1985-10-11 1992-05-12 Applied Materials, Inc. Materials and methods for etching silicides, polycrystalline silicon and polycides
GB8710359D0 (en) * 1987-05-01 1987-06-03 Inmos Ltd Semiconductor element
JPH0680638B2 (ja) * 1990-07-05 1994-10-12 株式会社東芝 半導体装置の製造方法
DE69125215T2 (de) * 1990-07-16 1997-08-28 Applied Materials Inc Verfahren zur Abscheidung einer hochdotierten Polysiliciumschicht auf eine stufenförmige Halbleiterwaferfläche, welches verbesserte Stufenbeschichtung liefert
KR920015622A (ko) * 1991-01-31 1992-08-27 원본미기재 집적 회로의 제조방법
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JP3128323B2 (ja) * 1992-04-13 2001-01-29 株式会社東芝 半導体集積回路装置およびその製造方法
JP3395263B2 (ja) * 1992-07-31 2003-04-07 セイコーエプソン株式会社 半導体装置およびその製造方法
JP2978736B2 (ja) * 1994-06-21 1999-11-15 日本電気株式会社 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100376810B1 (ko) * 1998-09-23 2003-06-12 유나이티드 마이크로일렉트로닉스 코퍼레이션 배리어막을갖는반도체소자및그제조방법

Also Published As

Publication number Publication date
GB9712517D0 (en) 1997-08-20
JP2828438B2 (ja) 1998-11-25
US5976961A (en) 1999-11-02
DE19726308A1 (de) 1998-01-02
GB2314456A (en) 1997-12-24
JPH1092764A (ja) 1998-04-10
DE19726308B4 (de) 2006-02-23
GB2314456B (en) 2001-03-28
KR100250744B1 (ko) 2000-05-01

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