KR970705089A - 쌍방향 다른 직렬 데이터 전송 모드로 동작 가능한 직렬 인터페이스(Serial Interface Capable of Operating in two Different Serial Data Transfer Modes) - Google Patents

쌍방향 다른 직렬 데이터 전송 모드로 동작 가능한 직렬 인터페이스(Serial Interface Capable of Operating in two Different Serial Data Transfer Modes)

Info

Publication number
KR970705089A
KR970705089A KR1019970700555A KR19970700555A KR970705089A KR 970705089 A KR970705089 A KR 970705089A KR 1019970700555 A KR1019970700555 A KR 1019970700555A KR 19970700555 A KR19970700555 A KR 19970700555A KR 970705089 A KR970705089 A KR 970705089A
Authority
KR
South Korea
Prior art keywords
operating
data transfer
interface capable
transfer modes
serial data
Prior art date
Application number
KR1019970700555A
Other languages
English (en)
Other versions
KR100387980B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR970705089A publication Critical patent/KR970705089A/ko
Application granted granted Critical
Publication of KR100387980B1 publication Critical patent/KR100387980B1/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G06F13/4077—Precharging or discharging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
KR1019970700555A 1995-05-26 1996-05-24 서로다른두직렬데이터전송모드로동작가능한직렬인터페이스 KR100387980B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/451,965 US5696994A (en) 1995-05-26 1995-05-26 Serial interface having control circuits for enabling or disabling N-channel or P-channel transistors to allow for operation in two different transfer modes
US08/451,965 1995-05-26

Publications (2)

Publication Number Publication Date
KR970705089A true KR970705089A (ko) 1997-09-06
KR100387980B1 KR100387980B1 (ko) 2004-03-30

Family

ID=23794447

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970700555A KR100387980B1 (ko) 1995-05-26 1996-05-24 서로다른두직렬데이터전송모드로동작가능한직렬인터페이스

Country Status (5)

Country Link
US (1) US5696994A (ko)
EP (1) EP0772833B1 (ko)
KR (1) KR100387980B1 (ko)
DE (1) DE69634529T2 (ko)
WO (1) WO1996037851A1 (ko)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3134819B2 (ja) * 1997-06-04 2001-02-13 ソニー株式会社 データ処理装置
KR0184136B1 (ko) * 1996-06-03 1999-05-15 구자홍 범용 마이컴을 이용한 아이 스퀘어 씨 통신 장치
US5878234A (en) * 1996-09-10 1999-03-02 Sierra Wireless, Inc. Low power serial protocol translator for use in multi-circuit board electronic systems
US5925135A (en) * 1996-09-26 1999-07-20 Intel Corporation Clock rate compensation for a low frequency slave device
US6412023B1 (en) 1998-05-21 2002-06-25 Sony Corporation System for communicating status via first signal line in a period of time in which control signal via second line is not transmitted
US6167480A (en) * 1997-06-25 2000-12-26 Advanced Micro Devices, Inc. Information packet reception indicator for reducing the utilization of a host system processor unit
US6002882A (en) * 1997-11-03 1999-12-14 Analog Devices, Inc. Bidirectional communication port for digital signal processor
US6577157B1 (en) * 1997-11-14 2003-06-10 Altera Corporation Fully programmable I/O pin with memory
US6340898B1 (en) * 1997-12-18 2002-01-22 Advanced Micro Devices, Inc. Method and system for switching between a totem-pole drive mode and an open-drain drive mode
US6754209B1 (en) * 1998-08-28 2004-06-22 Intel Corporation Method and apparatus for transmitting and receiving network protocol compliant signal packets over a platform bus
US6339806B1 (en) * 1999-03-23 2002-01-15 International Business Machines Corporation Primary bus to secondary bus multiplexing for I2C and other serial buses
US6940868B1 (en) 1999-04-20 2005-09-06 Abb Inc. Digital serial communications hub
US6597197B1 (en) * 1999-08-27 2003-07-22 Intel Corporation I2C repeater with voltage translation
US6799233B1 (en) * 2001-06-29 2004-09-28 Koninklijke Philips Electronics N.V. Generalized I2C slave transmitter/receiver state machine
US20030053573A1 (en) * 2001-09-20 2003-03-20 John Bree Microcontroller having a transmission-bus-interface
US7391788B2 (en) * 2002-11-01 2008-06-24 Broadcom Corporation Method and system for a three conductor transceiver bus
WO2005083577A2 (en) * 2004-02-18 2005-09-09 Koninklijke Philips Electronics N. V. Integrated circuit with two different bus control units
CN100459612C (zh) * 2004-12-31 2009-02-04 北京中星微电子有限公司 一种通讯传输控制装置及实现通讯协议控制的方法
KR100833179B1 (ko) * 2006-02-15 2008-05-28 삼성전자주식회사 클러스터드 전압 스케일링을 위한 레벨 컨버팅 플립플롭 및펄스 발생기
US7868660B2 (en) * 2006-04-20 2011-01-11 Atmel Corporation Serial communications bus with active pullup
WO2008103827A1 (en) 2007-02-22 2008-08-28 Welldoc Communications, Inc. System and method for providing treatment recommendations based on models
US8291143B1 (en) * 2009-02-11 2012-10-16 Brocade Communication Systems, Inc. Single line communication
JP5447227B2 (ja) * 2010-06-29 2014-03-19 セイコーエプソン株式会社 回路装置及びシステム
FR2969451B1 (fr) 2010-12-17 2013-01-11 St Microelectronics Rousset Procede et dispositif de communication entre un maitre et plusieurs esclaves suivant un protocole de communication serie, en particulier du type a drain ouvert
JP5723435B2 (ja) * 2013-09-24 2015-05-27 エフシーアイ インク マルチ―チップシステム及びそのレジスタ設定方法
US10783250B2 (en) 2014-07-24 2020-09-22 Nuvoton Technology Corporation Secured master-mediated transactions between slave devices using bus monitoring
US10095891B2 (en) 2015-06-08 2018-10-09 Nuvoton Technology Corporation Secure access to peripheral devices over a bus
US10691807B2 (en) 2015-06-08 2020-06-23 Nuvoton Technology Corporation Secure system boot monitor
JP7031961B2 (ja) 2017-08-04 2022-03-08 ソニーセミコンダクタソリューションズ株式会社 通信装置、通信方法、プログラム、および、通信システム
JP6953226B2 (ja) * 2017-08-04 2021-10-27 ソニーセミコンダクタソリューションズ株式会社 通信装置、通信方法、プログラム、および、通信システム
KR102450296B1 (ko) * 2017-12-26 2022-10-04 삼성전자주식회사 동기식 및 비동기식 혼합 방식의 디지털 인터페이스를 포함하는 장치, 이를 포함하는 디지털 처리 시스템, 및 이들에 의해 수행되는 디지털 처리 방법
US11436315B2 (en) 2019-08-15 2022-09-06 Nuvoton Technology Corporation Forced self authentication
US11520940B2 (en) 2020-06-21 2022-12-06 Nuvoton Technology Corporation Secured communication by monitoring bus transactions using selectively delayed clock signal

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3952253A (en) * 1974-11-21 1976-04-20 The United States Of America As Represented By The United States Energy Research And Development Administration Method and means for generating a synchronizing pulse from a repetitive wave of varying frequency
DE2608265C2 (de) * 1976-02-28 1978-04-27 Deutsche Itt Industries Gmbh, 7800 Freiburg Mehrphasen-MOS-Schaltung zur Impulsdaueränderung
JPS6025929B2 (ja) * 1978-01-25 1985-06-21 ソニー株式会社 Ｐｗｍ変調回路
US4330751A (en) * 1979-12-03 1982-05-18 Norlin Industries, Inc. Programmable frequency and duty cycle tone signal generator
US4490631A (en) * 1982-08-30 1984-12-25 National Semiconductor Corporation Totem pole/open collector selectable output circuit
JPH0761004B2 (ja) * 1987-10-31 1995-06-28 富士電機株式会社 クロック発生回路
US4870665A (en) * 1988-08-04 1989-09-26 Gte Government Systems Corporation Digital pulse generator having a programmable pulse width and a pulse repetition interval
US5204953A (en) * 1989-08-04 1993-04-20 Intel Corporation One clock address pipelining in segmentation unit
FR2654278B1 (fr) * 1989-11-08 1992-01-10 Alcatel Business Systems Etage de sortie sur un lien serie synchrone, en particulier pour carte d'interface numerique equipant un central telephonique, et central telephonique equipe de telles cartes d'interface.
JPH03213010A (ja) * 1990-01-18 1991-09-18 Sharp Corp クロック発生器
US5259006A (en) * 1990-04-18 1993-11-02 Quickturn Systems, Incorporated Method for substantially eliminating hold time violations in implementing high speed logic circuits or the like
US5065042A (en) * 1990-08-01 1991-11-12 Vlsi Technology, Inc. Self-configuring clock interface circuit
US5189319A (en) * 1991-10-10 1993-02-23 Intel Corporation Power reducing buffer/latch circuit
US5254888A (en) * 1992-03-27 1993-10-19 Picopower Technology Inc. Switchable clock circuit for microprocessors to thereby save power
US5404473A (en) * 1994-03-01 1995-04-04 Intel Corporation Apparatus and method for handling string operations in a pipelined processor

Also Published As

Publication number Publication date
DE69634529D1 (de) 2005-05-04
DE69634529T2 (de) 2006-03-23
EP0772833B1 (en) 2005-03-30
KR100387980B1 (ko) 2004-03-30
US5696994A (en) 1997-12-09
WO1996037851A1 (en) 1996-11-28
EP0772833A1 (en) 1997-05-14

Similar Documents

Publication Publication Date Title
KR970705089A (ko) 쌍방향 다른 직렬 데이터 전송 모드로 동작 가능한 직렬 인터페이스(Serial Interface Capable of Operating in two Different Serial Data Transfer Modes)
DE69806740D1 (de) Datenübertragungssystem und bestandteile dafür
DE69502190D1 (de) Datenübertragungsverbinder
FI98028B (fi) Datasovitin
AU5240198A (en) Controlled transfer of information in computer networks
DE69834391D1 (de) Datentransferverfahren
FI99066B (fi) Tiedonsiirtomenetelmä
DE69621209D1 (de) Direkte Massendatenübertragung
DE69518199D1 (de) Sicheres Datenübertragungsverfahren
DE69523984D1 (de) Datenübertragungssystem
DE69534095D1 (de) Datenübertragungssystem
DE69627404D1 (de) Datenübertragungsgerät
ATA199095A (de) Datenübertragungsverfahren
DE69527291T2 (de) Schnelles datenübertragungssystem
IL95446A0 (en) Enhanced vmebus protocol utilizing pseudo-synchronous handshaking and block mode data transfer
DE59611224D1 (de) Datenübertragungssystem
DE69725232D1 (de) Datenübertragungsgerät
DE69601645T2 (de) Datenübermittelungsdienste
BR9601695A (pt) Disposição de interface e método de transferência de dados
DE69527245D1 (de) Datenübertragungsgerät
DE69523553T2 (de) Figuren-datenübertragungssystem
GB2298097B (en) Data transfer circuit
DE69806184T2 (de) Übertragung von videodaten
IL118345A0 (en) Data register
ATA77298A (de) Datenübertragungs-auslassbausatz

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20130531

Year of fee payment: 11

FPAY Annual fee payment

Payment date: 20140529

Year of fee payment: 12

EXPY Expiration of term