KR970076021A - 박막 트랜지스터 소자 어레이 - Google Patents

박막 트랜지스터 소자 어레이 Download PDF

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KR970076021A
KR970076021A KR1019970021652A KR19970021652A KR970076021A KR 970076021 A KR970076021 A KR 970076021A KR 1019970021652 A KR1019970021652 A KR 1019970021652A KR 19970021652 A KR19970021652 A KR 19970021652A KR 970076021 A KR970076021 A KR 970076021A
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thin film
film transistor
drain
transistor element
gate
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다꾸야 가또
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가네꼬 히사시
닛뽕덴끼 가부시끼가이샤
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Abstract

박막 트랜지스터 소자는 매트릭스형으로 기판상에 배열된다. 이 박막 트랜지스터 소자는 소오스 전극, 드레인 전극, 반도체 층과 게이트 절연막의 고립층 및, 게이트 전극을 포함한다. 드레인 선과 게이트 선은 기판상에 제공되며, 드레인 전극과 게이트 전극에 각각 접속된다. 드레인 선과 게이트 선의 교차부 각각은 반도체 층과 게이트 절연막의 다른 고립층을 갖는다. 각 드레인 선은 게이트 선과 같은 재료로 만들어진 고립된 도전성막을 갖는다. 이 도전성 막은 각 드레인 선과 접촉하도록 형성되어 그 드레인 선을 전기적으로 지지하게 된다.
화소 전극은 기판상에 제공된다. 각 화소 전극은 인접한 게이트 선과 중첩되는 부분을 가지며, 반도체와 게이트 절연막의 다른 고립층을 갖는 보조 캐패시터는 상기 중첩부에 형성된다. 반도체 층을 포함하는 고립층이 아일랜드형으로 제공되기 때문에, 이와 같은 박막 트랜지스터 소자 어레이에서 박막 트랜지스터 소자들 사이에 누설전류가 흐르지 않는다.

Description

박막 트랜지스터 소자 어레이
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4a도는 본 발명의 제1실시예의 평면도, 제4b도는 제4a도에서 선 A-A을 따라 취한 단면도, 제4c도는 제4a도에서 선 B-B을 따라 취한 단면도.

Claims (13)

  1. 다수의 행과 열로 이루어진 매트릭스 형태로 기판 위에 배열되는 박막 트랜지스터 소자로서, 각각의 트랜지스터 소자는, 소오스 전극, 드레인 전극, 제1반도체 층과 제1게이트 절연막으로 된 제1적층 및, 이 제1적층위에 형성되는 게이트 전극을 포함하며, 상기 제1적층은 아일랜드형으로 제공되는 다수의 박막 트랜지스터 소자와, 상기 기판 위에 제공되며, 상기 관련된 한 열에 배치되는 박막 트랜지스터 소자 각각의 상기 드레인 전극에 연결되는 다수의 드레인 선과, 상기 기판 위에 제공되며, 상기 관련된 한 행에 배치되는 박막 트랜지스터 소자 각각의 상기 게이트 전극에 연결되는 다수의 게이트 선과, 각각 아일랜드형으로 제공되는 스페이서로서, 각각의 스페이서는 상기 게이트 선과 드레인 선의 관련 교차부에 제공되어 각 게이트 선을 드레인 선으로부터 절연시키고, 또한 제2반도체 층과 제2게이트 절연막으로 된 제2적층을 포함하는 다수의 스페이서, 그리고 상기 게이트 선과 동일한 재료로 만들어지며, 관련된 드레인 선과 접촉하도록 형성되는 다수의 고립된 도전성막을 포함하는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  2. 다수의 행과 열로 이루어진 매트릭스 형태로 기판 위에 배열되는 박막 트랜지스터 소자로서, 각각의 트랜지스터 소자는, 소오스 전극, 드레인 전극, 제1반도체 층과 제1게이트 절연막으로 된 제1적층 및, 이 제1적층 위에 형성되는 게이트 전극을 포함하여, 상기 제1적층은 아일랜드형으로 제공되는 다수의 박막 트랜지스터 소자와, 상기 기판 위에 제공되며, 상기 관련된 한 열에 배치되는 박막 트랜지스터 소자 각각의 상기 드레인 전극에 연결되는 다수의 드레인 선과, 상기 기판 위에 제공되며, 상기 관련된 한 행에 배치되는 박막 트랜지스터 소자 각각의 상기 게이트 전극에 연결되는 다수의 게이트 선과, 각각 아일랜드형으로 제공되는 스페이서로서, 각각의 스페이서는 상기 게이트 선과 드레인 선의 관련 교차부에 제공되어 각 게이트 선을 드레인 선으로부터 절연시키고, 또한 제2반도체 층과 제2게이트 절연막으로 된 제2적층을 포함하는 다수의 스페이서, 상기 기판 위에 제공되어 소오스 전극에 전기적으로 접속되며, 상기 인접 게이트 선과의 중첩부를 갖는 다수의 화소전극, 그리고 상기 중첩부에 각각 형성되며, 제3반도체 층과 제3게이트 절연막으로 된 제3적층을 포함하고, 제3적층은 아일랜드형으로 제공되는 다수의 보조 캐패시터를 포함하는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  3. 제2항에 있어서, 상기 게이트 선과 동일한 재료로 만들어지며, 관련된 드레인 선과 접촉하도록 형성되는 다수의 고립된 도전성 막을 더 포함하는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  4. 제1항에 있어서, 상기 기판은 액정 디스플레이 장치용이며, 게이트 선과 드레인 선은 상기 액정 디스플레이 장치의 수직 드라이버 수평 드라이버에 각각 접속되는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  5. 제1항에 있어서, 상기 기판은 투광성인 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  6. 제1항에 있어서, n+형 반도체 막을 더 포함하며, 이 n+형 반도체 막은 상기 제1반도체 층의 하측면 일부에 제공되는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  7. 제2항에 있어서, n+형 반도체 막을 더 포함하며, 이 n+형 반도체 막은 상기 제1반도체 층과 각 화소 전극 사이에 형성되는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  8. 제1항에 있어서, 상기 제1반도체 층의 하측면 전체에서 n+형 반도체 막을 더 포함하는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  9. 제1항에 있어서, 상기 제1반도체 층은 아모퍼스 실리콘 막을 되어 있으며, 또한 그의 하측면 일부에 인이 확산되는 영역을 갖는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  10. 제2항에 있어서, 상기 화소 전극은 투명한 도전성 재료로 만들어지는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  11. 제2항에 있어서, 상기 화소 전극은 ITO로 만들어지는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  12. 제1항에 있어서, 상기 드레인 선은 투명한 도전성 재료로 만들어지는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
  13. 제1항에 있어서, 상기 드레인 선은 ITO로 만들어지는 것을 특징으로 하는 박막 트랜지스터 소자 어레이.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019970021652A 1996-05-30 1997-05-29 박막 트랜지스터 소자 어레이 KR970076021A (ko)

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JP13715396A JPH09318975A (ja) 1996-05-30 1996-05-30 薄膜電界効果型トランジスタ素子アレイおよびその製造 方法
JP96-137153 1996-05-30

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JP4067819B2 (ja) * 2000-12-21 2008-03-26 株式会社半導体エネルギー研究所 発光装置
SG111923A1 (en) 2000-12-21 2005-06-29 Semiconductor Energy Lab Light emitting device and method of manufacturing the same
JP2006303449A (ja) * 2005-04-21 2006-11-02 Samsung Sdi Co Ltd アクティブマトリックス回路基板、この製造方法及びこれを備えたアクティブマトリックスディスプレイ装置
KR100647690B1 (ko) 2005-04-22 2006-11-23 삼성에스디아이 주식회사 박막 트랜지스터 및 이를 구비한 평판 디스플레이 장치
TWI289360B (en) * 2005-10-24 2007-11-01 Chunghwa Picture Tubes Ltd Thin film transistor array substrate and manufacturing method thereof
JP5111867B2 (ja) * 2007-01-16 2013-01-09 株式会社ジャパンディスプレイイースト 表示装置
JP5305190B2 (ja) * 2007-06-21 2013-10-02 株式会社ジャパンディスプレイ 液晶表示装置
DE102009007947B4 (de) * 2009-02-06 2014-08-14 Universität Stuttgart Verfahren zur Herstellung eines Aktiv-Matrix-OLED-Displays
CN101819961B (zh) * 2009-02-27 2015-04-29 北京京东方光电科技有限公司 液晶显示器的阵列基板、信号线及其制造方法
US20100224878A1 (en) 2009-03-05 2010-09-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN107219702A (zh) * 2017-07-20 2017-09-29 深圳市华星光电技术有限公司 一种阵列基板及其制造方法、液晶显示装置

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JPH09318975A (ja) 1997-12-12
US5952675A (en) 1999-09-14
TW343324B (en) 1998-10-21

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