KR970053186A - Interconnection method using stud bump - Google Patents

Interconnection method using stud bump Download PDF

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Publication number
KR970053186A
KR970053186A KR1019950065908A KR19950065908A KR970053186A KR 970053186 A KR970053186 A KR 970053186A KR 1019950065908 A KR1019950065908 A KR 1019950065908A KR 19950065908 A KR19950065908 A KR 19950065908A KR 970053186 A KR970053186 A KR 970053186A
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KR
South Korea
Prior art keywords
semiconductor chip
wire
bonding
manufacturing
stud bumps
Prior art date
Application number
KR1019950065908A
Other languages
Korean (ko)
Inventor
장동현
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950065908A priority Critical patent/KR970053186A/en
Publication of KR970053186A publication Critical patent/KR970053186A/en

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Abstract

멀티칩 패키지의 제조 방법에 있어서, 모 기판의 솔더 스터드 범프들에 각각 대응하여 접합될 반도체 칩의 금(Au) 스터드 패드들이 진공증착법,프린팅법 또는 전해도금법과 같은 복잡한 공정 대신에 와이어 본딩 공정에 의해 볼 형태로 형성되어 멀티칩 패키지의 제조 공정이 단순한고 원가가 절감되는 효과가 있다.In the method of manufacturing a multichip package, gold (Au) stud pads of a semiconductor chip to be bonded to correspond to solder stud bumps of a parent substrate are subjected to a wire bonding process instead of a complicated process such as vacuum deposition, printing or electroplating. It is formed in the form of a ball is a simple manufacturing process of the multi-chip package has the effect of reducing the cost.

Description

스터드 범프를 이용한 인터콘넥션 방법Interconnection method using stud bump

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 의한 개략도.1 is a schematic view according to the present invention.

Claims (2)

본딩 패드를 갖는 반도체 칩과, 그 반도체 칩의 본딩 패드들에 해당하는 본딩 패드를 갖는 모 기판을 각각 형성하는 단게와, 와이어 본딩 공정을 이용하여 그 반도체 칩의 본딩 패드들상에 볼(ball)형태의 도전성 스터드 범프(stud bump)들을 각각 형성하는 단게와 그 모 기판의 본딩 패드들상에 솔더 스터드 범프들을 각 형성하는 단계와, 그 반도체 칩의 도전성 스터드 패드들에 그 모 기판의 솔더 스터드 범프들을 대응하여 접합하는 단계를 갖는 멀티칩 패키지의 제조 방법에 있어서, 그 반도체 칩의 도전성 스터드 범프들의 와이어 공정에 의해 형성되는 것을 특징으로 하는 멀티칩 패키지의 제조 방법.A step of forming a semiconductor chip having a bonding pad, a parent substrate having bonding pads corresponding to the bonding pads of the semiconductor chip, and a ball on the bonding pads of the semiconductor chip using a wire bonding process. Forming solder stud bumps on the bonding pads of the mother substrate and forming solder stud bumps of the respective shapes, and solder stud bumps of the mother substrate on the conductive stud pads of the semiconductor chip. A method of manufacturing a multichip package having a step of correspondingly joining them, the method of manufacturing a multichip package, characterized in that it is formed by a wire process of conductive stud bumps of the semiconductor chip. 제1항에 있어서, 상기 와이어 본딩 공정에 의해 상기 반도체 칩의 본딩 패드상에 와이어를 그 와이어의 볼(ball)부와 그 이외의 부분이 서로 분리되도록 절단하여 그 반도체 칩의 본딩 패드상에 상기 볼 형태의 스터드 패드를 형성하는 것을 특징으로 하는 멀티칩 패키지의 제조 방법.2. The wire according to claim 1, wherein the wire is cut on the bonding pad of the semiconductor chip by the wire bonding process so that the ball portion and the other portions of the wire are separated from each other. A method for manufacturing a multichip package, comprising forming a stud pad in the form of a ball. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950065908A 1995-12-29 1995-12-29 Interconnection method using stud bump KR970053186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950065908A KR970053186A (en) 1995-12-29 1995-12-29 Interconnection method using stud bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950065908A KR970053186A (en) 1995-12-29 1995-12-29 Interconnection method using stud bump

Publications (1)

Publication Number Publication Date
KR970053186A true KR970053186A (en) 1997-07-29

Family

ID=66622706

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950065908A KR970053186A (en) 1995-12-29 1995-12-29 Interconnection method using stud bump

Country Status (1)

Country Link
KR (1) KR970053186A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100716869B1 (en) * 2000-12-27 2007-05-09 앰코 테크놀로지 코리아 주식회사 Conductive bump structure of semiconductor chip and its forming method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100716869B1 (en) * 2000-12-27 2007-05-09 앰코 테크놀로지 코리아 주식회사 Conductive bump structure of semiconductor chip and its forming method

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