KR970003719A - 반도체소자의 제조방법 - Google Patents
반도체소자의 제조방법 Download PDFInfo
- Publication number
- KR970003719A KR970003719A KR1019950018866A KR19950018866A KR970003719A KR 970003719 A KR970003719 A KR 970003719A KR 1019950018866 A KR1019950018866 A KR 1019950018866A KR 19950018866 A KR19950018866 A KR 19950018866A KR 970003719 A KR970003719 A KR 970003719A
- Authority
- KR
- South Korea
- Prior art keywords
- tungsten silicide
- oxide film
- film
- silicide film
- forming
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract 3
- 239000004065 semiconductor Substances 0.000 title claims abstract 3
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims abstract 7
- 229910021342 tungsten silicide Inorganic materials 0.000 claims abstract 7
- 238000000034 method Methods 0.000 claims abstract 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract 3
- 239000001301 oxygen Substances 0.000 claims abstract 3
- 229910052760 oxygen Inorganic materials 0.000 claims abstract 3
- 238000000151 deposition Methods 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229920005591 polysilicon Polymers 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910021417 amorphous silicon Inorganic materials 0.000 claims 1
- 239000007789 gas Substances 0.000 claims 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 abstract 2
- 229910052721 tungsten Inorganic materials 0.000 abstract 2
- 239000010937 tungsten Substances 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000002245 particle Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
본 발명은 반도체소자 제조방법에 관한 것으로, 텅스텐 폴리사이드로 구비된 게이트 전극을 형성할 때 텅스텐 폴리사이드로부터 게이트 산화막으로 플로린(F)이 확산되는 것을 억제 하기 위하여 텅스텐 실리사이드막을 2중층으로 형성하고, 산소 분위기에서 상부의 텅스텐 실리사이드막의 작은 입자 표면에 산화막을 형성하는 동시에 주위에 있는 플로린이 산화막속에 포함되도록 하여 그로 인하여 후속의 고온 공정에서 상부의 텅스텐 실리사이드막에 포함된 플로린이 하부의 게이트산화막으로 확산되는 것을 억제할 수가 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 제3도는 본 발명의 실시예에 의한 폴리사이드 구조를 갖는 게이트전극을 형성하는 단계를 도시한 단면도.
Claims (2)
- 반도체소자의 제조방법에 있어서, 실리콘기판에 게이트 산화막을 형성하고, 그 상부에 도포된 폴리실리콘막을 증착하는 단계와, 상기 폴리실리콘막 상부에 WF6, SiH4의 개스와 440~480℃의 온도에서 LPCVD 방법으로 텅스텐 실리사이드막을 증착하여 700~800Å 두께의 비정질구조의 하부 텅스텐 실리사이드막과 600~800Å두께의 작은 조각을 갖는 비정질구조의 상부 텅스텐 실리사이드막을 형성하는 단계와, 고온의 산소 분위기에서 결정화시켜서 상기의 상부 텅스텐 실리사이드막에 있는 작은 조각의 비정질실리콘층이 표면에 플로린이 포함된 얇은 산화막을 형성하는 단계를 포함하는 반도체소자 제조방법.
- 제1항에 있어서, 상기 산소분위기에 산화막을 형성하는 공정은 700~900℃의온도에서 실시하는 것을 특징으로 하는 반도체소자 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950018866A KR0161735B1 (ko) | 1995-06-30 | 1995-06-30 | 반도체 소자의 제조방법 |
US08/669,916 US5837600A (en) | 1995-06-30 | 1996-06-25 | Method for fabricating a semiconductor device |
TW085107676A TW314642B (ko) | 1995-06-30 | 1996-06-26 | |
JP8171231A JPH0922884A (ja) | 1995-06-30 | 1996-07-01 | 半導体素子の製造方法 |
DE19626386A DE19626386A1 (de) | 1995-06-30 | 1996-07-01 | Verfahren zur Herstellung eines Halbleiterelements |
CN96106922A CN1050222C (zh) | 1995-06-30 | 1996-07-01 | 制造半导体器件的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950018866A KR0161735B1 (ko) | 1995-06-30 | 1995-06-30 | 반도체 소자의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970003719A true KR970003719A (ko) | 1997-01-28 |
KR0161735B1 KR0161735B1 (ko) | 1999-02-01 |
Family
ID=19419288
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950018866A KR0161735B1 (ko) | 1995-06-30 | 1995-06-30 | 반도체 소자의 제조방법 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5837600A (ko) |
JP (1) | JPH0922884A (ko) |
KR (1) | KR0161735B1 (ko) |
CN (1) | CN1050222C (ko) |
DE (1) | DE19626386A1 (ko) |
TW (1) | TW314642B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100500935B1 (ko) * | 1998-10-01 | 2005-10-14 | 주식회사 하이닉스반도체 | 물리기상증착법으로 형성된 텅스텐막을 확산방지막으로서 이용하는 반도체 소자 제조 방법 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000150416A (ja) * | 1998-09-01 | 2000-05-30 | Tokyo Electron Ltd | タングステンシリサイド膜及びその成膜方法 |
KR100505409B1 (ko) * | 1999-11-04 | 2005-08-05 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 형성방법 |
US6642119B1 (en) | 2002-08-08 | 2003-11-04 | Advanced Micro Devices, Inc. | Silicide MOSFET architecture and method of manufacture |
KR100745604B1 (ko) * | 2006-07-03 | 2007-08-02 | 삼성전자주식회사 | 반도체 소자 및 그 형성 방법 |
CN111593325A (zh) * | 2020-07-01 | 2020-08-28 | 西安微电子技术研究所 | 一种低压化学气相淀积法淀积两层钨硅的方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6292448A (ja) * | 1985-10-18 | 1987-04-27 | Nec Corp | 半導体集積回路装置の製造方法 |
US4684542A (en) * | 1986-08-11 | 1987-08-04 | International Business Machines Corporation | Low pressure chemical vapor deposition of tungsten silicide |
JPH0616556B2 (ja) * | 1987-04-14 | 1994-03-02 | 株式会社東芝 | 半導体装置 |
US4935380A (en) * | 1987-08-04 | 1990-06-19 | Mitsubishi Denki Kabushiki Kaisha | Method for manufacturing semiconductor device |
US4833099A (en) * | 1988-01-07 | 1989-05-23 | Intel Corporation | Tungsten-silicide reoxidation process including annealing in pure nitrogen and subsequent oxidation in oxygen |
JPH02113532A (ja) * | 1988-10-21 | 1990-04-25 | Matsushita Electron Corp | 半導体装置 |
US5541131A (en) * | 1991-02-01 | 1996-07-30 | Taiwan Semiconductor Manufacturing Co. | Peeling free metal silicide films using ion implantation |
JP3248222B2 (ja) * | 1991-06-18 | 2002-01-21 | ソニー株式会社 | ドライエッチング方法 |
JP2723396B2 (ja) * | 1991-09-19 | 1998-03-09 | シャープ株式会社 | 不揮発性メモリ装置の製造方法 |
US5278096A (en) * | 1991-12-23 | 1994-01-11 | At&T Bell Laboratories | Transistor fabrication method |
US5231056A (en) * | 1992-01-15 | 1993-07-27 | Micron Technology, Inc. | Tungsten silicide (WSix) deposition process for semiconductor manufacture |
JPH05267300A (ja) * | 1992-03-19 | 1993-10-15 | Sony Corp | 半導体装置 |
JP2599560B2 (ja) * | 1992-09-30 | 1997-04-09 | インターナショナル・ビジネス・マシーンズ・コーポレイション | ケイ化タングステン膜形成方法 |
JPH06232391A (ja) * | 1992-12-11 | 1994-08-19 | Kawasaki Steel Corp | 半導体装置及びその製造方法 |
JPH06283612A (ja) * | 1993-03-26 | 1994-10-07 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
US5350698A (en) * | 1993-05-03 | 1994-09-27 | United Microelectronics Corporation | Multilayer polysilicon gate self-align process for VLSI CMOS device |
US5441904A (en) * | 1993-11-16 | 1995-08-15 | Hyundai Electronics Industries, Co., Ltd. | Method for forming a two-layered polysilicon gate electrode in a semiconductor device using grain boundaries |
JPH07312353A (ja) * | 1994-05-17 | 1995-11-28 | Fuji Electric Co Ltd | 半導体装置の製造方法 |
-
1995
- 1995-06-30 KR KR1019950018866A patent/KR0161735B1/ko not_active IP Right Cessation
-
1996
- 1996-06-25 US US08/669,916 patent/US5837600A/en not_active Expired - Lifetime
- 1996-06-26 TW TW085107676A patent/TW314642B/zh not_active IP Right Cessation
- 1996-07-01 DE DE19626386A patent/DE19626386A1/de not_active Ceased
- 1996-07-01 JP JP8171231A patent/JPH0922884A/ja active Pending
- 1996-07-01 CN CN96106922A patent/CN1050222C/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100500935B1 (ko) * | 1998-10-01 | 2005-10-14 | 주식회사 하이닉스반도체 | 물리기상증착법으로 형성된 텅스텐막을 확산방지막으로서 이용하는 반도체 소자 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US5837600A (en) | 1998-11-17 |
KR0161735B1 (ko) | 1999-02-01 |
CN1148261A (zh) | 1997-04-23 |
JPH0922884A (ja) | 1997-01-21 |
DE19626386A1 (de) | 1997-01-02 |
CN1050222C (zh) | 2000-03-08 |
TW314642B (ko) | 1997-09-01 |
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