KR960030384A - 열응력을 흡수하기 위한 중앙 슬릿 패턴과 주변 슬릿 패턴을 갖는 터브상에 장착된 반도체 장치 - Google Patents
열응력을 흡수하기 위한 중앙 슬릿 패턴과 주변 슬릿 패턴을 갖는 터브상에 장착된 반도체 장치 Download PDFInfo
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Abstract
본 발명은 열응력을 흡수하기 위한 중앙 슬릿 패턴과 주변 슬릿 패턴을 갖는 터브상에 장착된 반도체 장치에 관한 것으로서, 반도체 칩(10)을 장착하기 위한 리드-프레임(11)의 터브(11a)에 다수의 슬릿(11i/11n,11j/11o,11k/11p,11m/11q)이 형성되어, 반도체 칩으로 커버되지 않은 터브의 주변 소영역들(11ha/11hh/11ha)의 길이를 거의 균등하게 하는 방식으로 배열됨으로써, 터브(11a), 반도체 칩(10) 및 이 반도체 칩을 밀봉하는 플라스틱 패키지 사이의 열팽창 계수의 차이로 인한 수축 및 신장을 효과적으로 흡수한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 반도체 장치를 나타내는 사시도.
Claims (8)
- 전기회로를 갖는 반도체 칩(10;20); 터브(11a;21a)를 포함하는 지지수단(11;21)으로서, 상기 터브는, 주변연부들(21f/21g/21h/21i)에 의해 한정되어 상기 반도체 칩(10;20)을 장착하는 주면, 상기 터브(11a;21a)의 주면과 배면으로 개방되어 상기 주면을 중앙영역(11g;21j) 및 주변영역(11h;21k)으로 분할하도록 상기 터브(11a;21a)에 형성되어, 상기 반도체 칩(10;20)이 상기 중앙영역(11g;21j) 및 상기 주변영역(10h;21k)의 내부 주변 소영역을 점유하는 제1슬릿 패턴(11c/11d/11e/11f;21f/21g/21h/21i), 및 상기 주변연부로부터 내측으로 돌출하는 슬릿 군을 가지는 지지수단(11;21); 그리고 상기 반도체 칩(10;20)을 오물로부터 보호하도록 상기 터브(10a;20a)상에 장착된 상기 반도체 칩(10;20) 둘레에 제공된 밀봉 수단(12;22)을 구비하는 반도체 장치에 있어서, 상기 슬릿 군은 상기 주변연부(21f-21i)와 각각 관련된 다수의 슬릿소군(11i/11n,11j/11o,11k/11p,11m/11q;21ma/21mb,21na/21nb,21oa/21ob,21pa/21pb)을 포함하고, 상기 다수의 슬릿 소군(11i/11n,11j/11o,11k/11p,11m/11q;21ma/21mb,21na/21nb,21oa/21ob,21pa/21pb)은 상기 주변연부중 관련 연부로부터 상기 외부 주변 소영역을 통해 상기 내부 주변 소영역으로 내측으로 돌출하여 상기 주변연부들중 관련연부를 따라 상기 외부 주변 소영역의 부분을 다수의 부분(11hg/11hh/11ha)으로 분할하는 다수의 슬릿을 각각 가지며, 상기 제1슬릿 패턴(11c-11f; 21f-21i)과 상기 다수의 슬릿 소군(11i/11n,11j/11o,11k/11p,11m/11q;21ma/21mb,21na/21nb,21oa/21ob,21pa/21pb)은 서로 대향하는 두개의 상기 주변연부(21f/21g 또는 21h/21i) 사이의 직선 방향으로의 힘 및 상기 주면상의 대각선 방향으로의 힘을 2회이상 차단하는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 다수의 부분(11hg/11hh/11ha)은 상기 주변연부들중 상기 관련연부의 방향으로 길이가 거의 동일한 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 다수의 슬릿 소군(11i/11n,11j/11o,11k/11p,11m/11q;21ma/21mb,21na/21nb,21oa/21ob,21pa/21pb) 각각에는 두개의 슬릿이 포함되어 상기 외부 주변 소영역의 상기 부분을 3개의 부분(11hg/11hh/11ha)으로 분할하는 것을 특징으로 하는 반도체 장치.
- 제3항에 있어서, 상기3개의 부분(11hg/11hh/11ha)은 상기 주변연부들중 상기 관련연부의 방향으로 길이가 거의 동일한 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 제1슬릿 패턴은 상기 주변연부들중 하나에 평행한 제1슬릿(11f), 이 제1슬릿에 평행하게 떨어져서 어긋나있는 제2슬릿(11e), 상기 제1 및 제2슬릿(11f/1e)에 수직한 제3슬릿(11d) 및 이 제3슬릿(11d)에 평행하게 떨어져서 어긋나 있는 제4슬릿(11c)을 가짐으로써 상기 중앙영역(11g)을 장방형의 형상으로 만들고, 상기 제1 내지 제4슬릿은 상기 주변영역으로 돌출하는 각자의 부분을 가지며, 상기 다수의 슬릿 소군(11i/11n)중 하나의 상기 다수의 슬릿을 상기 각자의 부분에 평행하게 신장하여 상기 다수의 부분들중 하나(11hg)를 상기 다수의 부분들중 다른 하나(hh)에 접속하는 크랭크형 부분을 형성하는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 주면 및 상기 배면으로 개방되어 상기 주변영역에 형성된 제2슬릿 패턴(21q-21t)을 더 포함함으로써, 상기 제1슬릿 패턴(21f-21i), 상기 제2슬릿 패턴(21q-21t) 및 상기 다수의 슬릿 소군(21ma/21mb,21na/21nb,21oa/21ob,21pa/21pb)은 상기 직선 방향으로서의 상기 힘 및 상기 주면상의 대각선 방향으로의 상기 함을 2회이상 차단하는 것을 특징으로 하는 반도체 장치.
- 제6항에 있어서, 두쌍의 슬릿(21f/21g 및 21h/21i)이 상기 제1슬릿 패턴을 구성하여 상기 중앙영역(21j)을 장방형 형상으로 만들고, 4개의 십자형 슬릿들(21q-21t)이 상기 중앙영역(21j)의 네모서리 외부에 마련되어 상기 제2슬릿 패턴을 형성하는 것을 특징으로 하는 반도체장치.
- 제7항에 있어서, 각각의 상기 십자형 슬릿(21q)은 상기 주변연부들중 한 연부(21f)에 수직한 제1슬릿(21u) 및 이 제1슬릿(21u)과 교차하여 상기 주변연부들중 상기 한 연부(21f)에 평행하게 신장하는 제2슬릿(21v)을 가지며, 상기 다수의 슬릿(21ma/21mb)중 하나는 상기 제1슬릿(21u)에 평행하게 상기 주변연부들중 상기 한 연부(21f)로부터 상기 제2슬릿(21v)쪽으로 돌출하여 상기 다수의 부분들중 인접하는 부분들을 서로 접속하는 크랭크형 부분(21w)을 형성하는 것을 특징으로 하는 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP95-9822 | 1995-01-25 | ||
JP7009822A JP2611748B2 (ja) | 1995-01-25 | 1995-01-25 | 樹脂封止型半導体装置 |
Publications (2)
Publication Number | Publication Date |
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KR960030384A true KR960030384A (ko) | 1996-08-17 |
KR100217159B1 KR100217159B1 (ko) | 1999-09-01 |
Family
ID=11730837
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019960001621A KR100217159B1 (ko) | 1995-01-25 | 1996-01-25 | 열응력을 흡수하기 위한 중앙 슬릿 패턴과 주변 슬릿 패턴을 갖는 터브상에 장착된 반도체 장치 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5712507A (ko) |
EP (1) | EP0724294A3 (ko) |
JP (1) | JP2611748B2 (ko) |
KR (1) | KR100217159B1 (ko) |
TW (1) | TW297934B (ko) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0878605A (ja) * | 1994-09-01 | 1996-03-22 | Hitachi Ltd | リードフレームおよびそれを用いた半導体集積回路装置 |
KR100231086B1 (ko) * | 1996-09-06 | 1999-11-15 | 윤종용 | 관통 슬릿이 형성된 다이패드를 포함하는 반도체 칩 패키지 |
JP3012816B2 (ja) * | 1996-10-22 | 2000-02-28 | 松下電子工業株式会社 | 樹脂封止型半導体装置およびその製造方法 |
JP3034814B2 (ja) * | 1997-02-27 | 2000-04-17 | 沖電気工業株式会社 | リードフレーム構造及び半導体装置の製造方法 |
US6239480B1 (en) * | 1998-07-06 | 2001-05-29 | Clear Logic, Inc. | Modified lead frame for improved parallelism of a die to package |
JP2000058735A (ja) * | 1998-08-07 | 2000-02-25 | Hitachi Ltd | リードフレーム、半導体装置及び半導体装置の製造方法 |
JP3051376B2 (ja) * | 1998-08-24 | 2000-06-12 | 松下電子工業株式会社 | リードフレーム及びその製造方法並びにリードフレームを用いた半導体装置 |
JP3839178B2 (ja) * | 1999-01-29 | 2006-11-01 | 株式会社ルネサステクノロジ | 半導体装置 |
US6204553B1 (en) * | 1999-08-10 | 2001-03-20 | Walsin Advanced Electronics Ltd. | Lead frame structure |
GB0008919D0 (en) * | 2000-04-11 | 2000-05-31 | British Aerospace | Solid phase welding |
DE10034826A1 (de) * | 2000-07-18 | 2002-01-31 | Bosch Gmbh Robert | Baugruppe mit einem strukturierten Tärgerelement und einem mit diesem wirkverbundenen Substrat |
EP1352425A2 (en) | 2000-08-17 | 2003-10-15 | Authentec Inc. | Integrated circuit package including opening exposing portion of an ic |
US7049166B2 (en) * | 2000-08-17 | 2006-05-23 | Authentec, Inc. | Methods and apparatus for making integrated circuit package including opening exposing portion of the IC |
TW488042B (en) * | 2000-11-30 | 2002-05-21 | Siliconware Precision Industries Co Ltd | Quad flat non-leaded package and its leadframe |
US20020070436A1 (en) * | 2000-12-11 | 2002-06-13 | Hui Chong Chin | Die pad for integrated circuits |
US7034382B2 (en) * | 2001-04-16 | 2006-04-25 | M/A-Com, Inc. | Leadframe-based chip scale package |
EP1387146A3 (en) * | 2002-07-29 | 2006-05-31 | Yamaha Corporation | Manufacturing method for magnetic sensor and lead frame therefor |
TWI245429B (en) * | 2003-12-23 | 2005-12-11 | Siliconware Precision Industries Co Ltd | Photosensitive semiconductor device, method for fabricating the same and lead frame thereof |
US20060076654A1 (en) * | 2004-10-05 | 2006-04-13 | Yamaha Corporation | Lead frame and physical amount sensor |
JP5149854B2 (ja) | 2009-03-31 | 2013-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5954013B2 (ja) * | 2012-07-18 | 2016-07-20 | 日亜化学工業株式会社 | 半導体素子実装部材及び半導体装置 |
JP6081903B2 (ja) * | 2013-11-29 | 2017-02-15 | サンケン電気株式会社 | 半導体装置 |
US11393774B2 (en) * | 2019-08-21 | 2022-07-19 | Stmicroelectronics, Inc. | Semiconductor device having cavities at an interface of an encapsulant and a die pad or leads |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS554983A (en) * | 1978-06-27 | 1980-01-14 | Nec Kyushu Ltd | Lead frame for semiconductor device |
JPS57133655A (en) * | 1981-02-10 | 1982-08-18 | Pioneer Electronic Corp | Lead frame |
US4918511A (en) * | 1985-02-01 | 1990-04-17 | Advanced Micro Devices, Inc. | Thermal expansion compensated metal lead frame for integrated circuit package |
JPS6366958A (ja) * | 1986-09-08 | 1988-03-25 | Furukawa Electric Co Ltd:The | 半導体用リ−ドフレ−ムとその製造法 |
JPH01227462A (ja) * | 1988-03-08 | 1989-09-11 | Matsushita Electron Corp | リードフレーム |
JP2602076B2 (ja) * | 1988-09-08 | 1997-04-23 | 三菱電機株式会社 | 半導体装置用リードフレーム |
JPH04139864A (ja) * | 1990-10-01 | 1992-05-13 | Seiko Epson Corp | 半導体装置 |
JPH05114688A (ja) * | 1991-10-23 | 1993-05-07 | Hitachi Ltd | 半導体装置およびその製造方法並びにそれに使用されるリードフレーム |
JPH06132442A (ja) * | 1992-10-19 | 1994-05-13 | Hitachi Ltd | 半導体装置およびその製造方法 |
JPH0823068A (ja) * | 1994-07-07 | 1996-01-23 | Hitachi Ltd | リードフレームおよびそれを用いて構成された半導体装置 |
-
1995
- 1995-01-25 JP JP7009822A patent/JP2611748B2/ja not_active Expired - Fee Related
-
1996
- 1996-01-22 US US08/589,784 patent/US5712507A/en not_active Expired - Lifetime
- 1996-01-24 EP EP96100977A patent/EP0724294A3/en not_active Withdrawn
- 1996-01-25 KR KR1019960001621A patent/KR100217159B1/ko not_active IP Right Cessation
- 1996-01-26 TW TW085100948A patent/TW297934B/zh active
Also Published As
Publication number | Publication date |
---|---|
JPH08204106A (ja) | 1996-08-09 |
TW297934B (ko) | 1997-02-11 |
EP0724294A2 (en) | 1996-07-31 |
JP2611748B2 (ja) | 1997-05-21 |
KR100217159B1 (ko) | 1999-09-01 |
EP0724294A3 (en) | 1998-09-02 |
US5712507A (en) | 1998-01-27 |
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