KR960015869A - 반도체 칩과 일체화된 반도체 패키지 및 그 제조방법 - Google Patents
반도체 칩과 일체화된 반도체 패키지 및 그 제조방법 Download PDFInfo
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- KR960015869A KR960015869A KR1019950033642A KR19950033642A KR960015869A KR 960015869 A KR960015869 A KR 960015869A KR 1019950033642 A KR1019950033642 A KR 1019950033642A KR 19950033642 A KR19950033642 A KR 19950033642A KR 960015869 A KR960015869 A KR 960015869A
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
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- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
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- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23904294 | 1994-10-03 | ||
JP22182795 | 1995-08-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR960015869A true KR960015869A (ko) | 1996-05-22 |
Family
ID=26524531
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950033642A KR960015869A (ko) | 1994-10-03 | 1995-10-02 | 반도체 칩과 일체화된 반도체 패키지 및 그 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5892273A (ko) |
EP (1) | EP0706208B1 (ko) |
KR (1) | KR960015869A (ko) |
DE (1) | DE69527017T2 (ko) |
Families Citing this family (61)
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KR100459968B1 (ko) | 1996-10-17 | 2005-04-28 | 세이코 엡슨 가부시키가이샤 | 반도체장치및그제조방법,회로기판및필름캐리어테이프 |
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JP4159631B2 (ja) * | 1997-06-23 | 2008-10-01 | シチズンホールディングス株式会社 | 半導体パッケージの製造方法 |
JP3173439B2 (ja) * | 1997-10-14 | 2001-06-04 | 松下電器産業株式会社 | セラミック多層基板及びその製造方法 |
JP3497722B2 (ja) * | 1998-02-27 | 2004-02-16 | 富士通株式会社 | 半導体装置及びその製造方法及びその搬送トレイ |
US6642136B1 (en) | 2001-09-17 | 2003-11-04 | Megic Corporation | Method of making a low fabrication cost, high performance, high reliability chip scale package |
JP4239310B2 (ja) * | 1998-09-01 | 2009-03-18 | ソニー株式会社 | 半導体装置の製造方法 |
US7405149B1 (en) * | 1998-12-21 | 2008-07-29 | Megica Corporation | Post passivation method for semiconductor chip or wafer |
US6965165B2 (en) * | 1998-12-21 | 2005-11-15 | Mou-Shiung Lin | Top layers of metal for high performance IC's |
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JP3577421B2 (ja) * | 1999-01-25 | 2004-10-13 | 新光電気工業株式会社 | 半導体装置用パッケージ |
US6326701B1 (en) * | 1999-02-24 | 2001-12-04 | Sanyo Electric Co., Ltd. | Chip size package and manufacturing method thereof |
JP4024958B2 (ja) | 1999-03-15 | 2007-12-19 | 株式会社ルネサステクノロジ | 半導体装置および半導体実装構造体 |
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US6181569B1 (en) * | 1999-06-07 | 2001-01-30 | Kishore K. Chakravorty | Low cost chip size package and method of fabricating the same |
JP3455762B2 (ja) | 1999-11-11 | 2003-10-14 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
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KR100699552B1 (ko) | 2000-02-10 | 2007-03-26 | 인터내쇼널 렉티파이어 코포레이션 | 단일면 상에 돌출 접촉부를 갖는 수직 전도성의 플립칩디바이스 |
US6603191B2 (en) | 2000-05-18 | 2003-08-05 | Casio Computer Co., Ltd. | Semiconductor device and method of manufacturing the same |
US7271489B2 (en) * | 2003-10-15 | 2007-09-18 | Megica Corporation | Post passivation interconnection schemes on top of the IC chips |
WO2002052646A1 (en) * | 2000-12-22 | 2002-07-04 | Koninklijke Philips Electronics N.V. | Integrated circuit device |
US6815324B2 (en) * | 2001-02-15 | 2004-11-09 | Megic Corporation | Reliable metal bumps on top of I/O pads after removal of test probe marks |
TWI313507B (en) * | 2002-10-25 | 2009-08-11 | Megica Corporatio | Method for assembling chips |
US7902679B2 (en) * | 2001-03-05 | 2011-03-08 | Megica Corporation | Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump |
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JP2003188313A (ja) * | 2001-12-20 | 2003-07-04 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
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TWI245402B (en) * | 2002-01-07 | 2005-12-11 | Megic Corp | Rod soldering structure and manufacturing process thereof |
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US7394161B2 (en) * | 2003-12-08 | 2008-07-01 | Megica Corporation | Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto |
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US7465654B2 (en) * | 2004-07-09 | 2008-12-16 | Megica Corporation | Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures |
US8067837B2 (en) | 2004-09-20 | 2011-11-29 | Megica Corporation | Metallization structure over passivation layer for IC chip |
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US8294279B2 (en) * | 2005-01-25 | 2012-10-23 | Megica Corporation | Chip package with dam bar restricting flow of underfill |
US7473999B2 (en) * | 2005-09-23 | 2009-01-06 | Megica Corporation | Semiconductor chip and process for forming the same |
TW200717743A (en) * | 2005-10-03 | 2007-05-01 | Rohm Co Ltd | Semiconductor device |
DE102006003931B3 (de) * | 2006-01-26 | 2007-08-02 | Infineon Technologies Ag | Halbleiterbauteil mit oberflächenmontierbaren Außenkontakten und Verfahren zur Herstellung desselben |
US8836146B2 (en) * | 2006-03-02 | 2014-09-16 | Qualcomm Incorporated | Chip package and method for fabricating the same |
US7768075B2 (en) * | 2006-04-06 | 2010-08-03 | Fairchild Semiconductor Corporation | Semiconductor die packages using thin dies and metal substrates |
US8022552B2 (en) | 2006-06-27 | 2011-09-20 | Megica Corporation | Integrated circuit and method for fabricating the same |
TWI370515B (en) | 2006-09-29 | 2012-08-11 | Megica Corp | Circuit component |
US8193636B2 (en) * | 2007-03-13 | 2012-06-05 | Megica Corporation | Chip assembly with interconnection by metal bump |
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US4107726A (en) * | 1977-01-03 | 1978-08-15 | Raytheon Company | Multilayer interconnected structure for semiconductor integrated circuit |
JPS6461934A (en) * | 1987-09-02 | 1989-03-08 | Nippon Denso Co | Semiconductor device and manufacture thereof |
US5220199A (en) * | 1988-09-13 | 1993-06-15 | Hitachi, Ltd. | Semiconductor integrated circuit device in which a semiconductor chip is mounted with solder bumps for mounting to a wiring substrate |
US5250468A (en) * | 1990-02-05 | 1993-10-05 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing semiconductor device including interlaying insulating film |
JPH05160292A (ja) * | 1991-06-06 | 1993-06-25 | Toshiba Corp | 多層パッケージ |
US5360988A (en) * | 1991-06-27 | 1994-11-01 | Hitachi, Ltd. | Semiconductor integrated circuit device and methods for production thereof |
JPH0574776A (ja) * | 1991-09-13 | 1993-03-26 | Hitachi Ltd | 半導体装置の実装構造 |
JP2796919B2 (ja) * | 1992-05-11 | 1998-09-10 | インターナショナル・ビジネス・マシーンズ・コーポレーション | メタライゼーション複合体および半導体デバイス |
US5581122A (en) * | 1994-10-25 | 1996-12-03 | Industrial Technology Research Institute | Packaging assembly with consolidated common voltage connections for integrated circuits |
-
1995
- 1995-10-02 KR KR1019950033642A patent/KR960015869A/ko not_active Application Discontinuation
- 1995-10-02 EP EP95115550A patent/EP0706208B1/en not_active Expired - Lifetime
- 1995-10-02 US US08/537,396 patent/US5892273A/en not_active Expired - Lifetime
- 1995-10-02 DE DE69527017T patent/DE69527017T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0706208A3 (en) | 1998-01-14 |
EP0706208A2 (en) | 1996-04-10 |
DE69527017T2 (de) | 2003-01-02 |
US5892273A (en) | 1999-04-06 |
DE69527017D1 (de) | 2002-07-18 |
EP0706208B1 (en) | 2002-06-12 |
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