KR960012474A - 다양한 종류의 mosfet를 갖는 반도체 장치 제조방법 - Google Patents

다양한 종류의 mosfet를 갖는 반도체 장치 제조방법 Download PDF

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Publication number
KR960012474A
KR960012474A KR1019950029567A KR19950029567A KR960012474A KR 960012474 A KR960012474 A KR 960012474A KR 1019950029567 A KR1019950029567 A KR 1019950029567A KR 19950029567 A KR19950029567 A KR 19950029567A KR 960012474 A KR960012474 A KR 960012474A
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KR
South Korea
Prior art keywords
mosfet
manufacturing
semiconductor device
various kinds
kinds
Prior art date
Application number
KR1019950029567A
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English (en)
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KR100194008B1 (ko
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Publication date
Application filed filed Critical
Publication of KR960012474A publication Critical patent/KR960012474A/ko
Application granted granted Critical
Publication of KR100194008B1 publication Critical patent/KR100194008B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
KR1019950029567A 1994-09-14 1995-09-11 다양한 종류의 mosfet를 갖는 반도체 장치 제조방법 KR100194008B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6244921A JP2600621B2 (ja) 1994-09-14 1994-09-14 半導体装置の製造方法
JP94-244921 1994-09-14

Publications (2)

Publication Number Publication Date
KR960012474A true KR960012474A (ko) 1996-04-20
KR100194008B1 KR100194008B1 (ko) 1999-06-15

Family

ID=17125961

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950029567A KR100194008B1 (ko) 1994-09-14 1995-09-11 다양한 종류의 mosfet를 갖는 반도체 장치 제조방법

Country Status (4)

Country Link
US (1) US5898006A (ko)
JP (1) JP2600621B2 (ko)
KR (1) KR100194008B1 (ko)
CN (1) CN1052573C (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3144330B2 (ja) * 1996-12-26 2001-03-12 日本電気株式会社 半導体装置
DE69636738D1 (de) * 1996-12-27 2007-01-11 St Microelectronics Srl Kontaktstruktur für elektronische EPROM oder flash EPROM Halbleiterschaltungen und ihr Herstellungsverfahren
US6258671B1 (en) 1997-05-13 2001-07-10 Micron Technology, Inc. Methods of providing spacers over conductive line sidewalls, methods of forming sidewall spacers over etched line sidewalls, and methods of forming conductive lines
US6180494B1 (en) 1999-03-11 2001-01-30 Micron Technology, Inc. Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines
KR100307531B1 (ko) 1999-08-09 2001-11-01 김영환 모스페트 소자와 이를 이용한 메모리셀 및 그 제조 방법
US6297102B1 (en) * 1999-10-01 2001-10-02 Taiwan Semiconductor Manufacturing Company Method of forming a surface implant region on a ROM cell using a PLDD implant
KR100344828B1 (ko) * 1999-11-25 2002-07-20 주식회사 하이닉스반도체 반도체 소자의 제조방법
KR100388221B1 (ko) * 2000-10-23 2003-06-19 주식회사 하이닉스반도체 반도체장치의 제조방법
US6773987B1 (en) * 2001-11-17 2004-08-10 Altera Corporation Method and apparatus for reducing charge loss in a nonvolatile memory cell
EP1742259A1 (en) * 2005-07-08 2007-01-10 STMicroelectronics S.r.l. Semiconductor power device with multiple drain structure and corresponding manufacturing process
US7652923B2 (en) * 2007-02-02 2010-01-26 Macronix International Co., Ltd. Semiconductor device and memory and method of operating thereof
JP5276282B2 (ja) * 2007-06-08 2013-08-28 ローム株式会社 半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930007195B1 (ko) * 1984-05-23 1993-07-31 가부시끼가이샤 히다찌세이사꾸쇼 반도체 장치와 그 제조 방법
JPH0797629B2 (ja) * 1986-01-22 1995-10-18 株式会社日立製作所 半導体集積回路装置
US4745083A (en) * 1986-11-19 1988-05-17 Sprague Electric Company Method of making a fast IGFET
US4775642A (en) * 1987-02-02 1988-10-04 Motorola, Inc. Modified source/drain implants in a double-poly non-volatile memory process
US4851361A (en) * 1988-02-04 1989-07-25 Atmel Corporation Fabrication process for EEPROMS with high voltage transistors
JPH0766946B2 (ja) * 1989-03-31 1995-07-19 株式会社東芝 半導体装置及びその製造方法
US5183773A (en) * 1989-04-13 1993-02-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device including such input protection transistor

Also Published As

Publication number Publication date
CN1052573C (zh) 2000-05-17
KR100194008B1 (ko) 1999-06-15
JPH0888288A (ja) 1996-04-02
US5898006A (en) 1999-04-27
JP2600621B2 (ja) 1997-04-16
CN1130806A (zh) 1996-09-11

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