KR950012775A - 좁은 밴드갭 특성을 갖는 탄소 도프 접합 실리콘 반도체 디바이스 및 그 형성 방법 - Google Patents

좁은 밴드갭 특성을 갖는 탄소 도프 접합 실리콘 반도체 디바이스 및 그 형성 방법 Download PDF

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KR950012775A
KR950012775A KR1019940024112A KR19940024112A KR950012775A KR 950012775 A KR950012775 A KR 950012775A KR 1019940024112 A KR1019940024112 A KR 1019940024112A KR 19940024112 A KR19940024112 A KR 19940024112A KR 950012775 A KR950012775 A KR 950012775A
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silicon
carbon
crystalline semiconductor
layer
semiconductor layers
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KR1019940024112A
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KR100296211B1 (ko
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제이. 캔델라리아 죤
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빈센트 비. 인그라시아
모토로라 인코포레이티드
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/161Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/161Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/931Silicon carbide semiconductor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

실리콘에 비해 좁은 밴드갭 특성을 갖는 Ⅳ-Ⅳ 반도체 디바이스(21,41) 및 그 형성방법을 제공한다. 0.5%와 1.1%사이의 치환 농도에서 탄소를 실리콘에 합체함으로써, 실리콘에 비해 좁은 밴드갭과 양호한 결정질을 갖는 반도체 디바이스(21,41)가 달성된다. 반도체 디바이스(21,41)는 좁은 밴드갭 영역을 이용하는 반도체 헤테로접합 디바이스에 적합하다.

Description

좁은 밴드갭 특성을 갖는 탄소 도프 접합 실리콘 반도체 디바이스 및 그 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 탄소 도프 접합 실리콘에서 탄소의 낮은 레벨에 대한 함수로써 밴드갭의 그래프,
제2도는 제1도의 밴드갭 데이타를 만드는데 사용되는 실시예의 확대도,
제3도는 본 발명에 따른 탄소 도프 접합 실리콘에 대한 전송 적외선 스펙트럼 그래프,
제4도는 본 발명의 실시예의 확대 단면도.

Claims (5)

  1. 좁은 밴드갭 특성을 갖는 탄소 도프접합 실리콘 반도체 디바이스(21,41)에 있어서, 실제로 실리콘으로 제조된 제1결정 반도체층(22,43)과, 좁은 밴드갭 특성을 제공하기 위한 도펀트 및 실제로 실리콘으로 제조된 제2결정 반도체층(23,44)을 구비하고, 밴드갭을 좁히는 도펀트는 반드시 탄소로 구성되고, 상기 제1결정 반도체층(22,43) 및 제2결정 반도체층(23,44)은 제1헤테로접합을 형성하고, 탄소는 1.1%이하의 치환 농도에서 제2결정 반도체층(23,44)에 존재하는 것을 특징으로 하는 탄소 도프접합 실리콘 반도체 디바이스.
  2. 반도체 헤테로접합 구조체(41)에 있어서, 실제로 실리콘으로 제조된 제1전도방식의 제1반도체층(43)과, 실리콘에 비해 좁은 밴드갭을 제공하기 위한 도펀트 및 실제로 실리콘으로 제조되면, 밴드갭을 좁히는 도펀트가 반드시 탄소로 구성되고 또한 탄소가 1.1%이하의 치환 농도에서 존재하는 제2전도 방식의 제2반도체층(44)과, 실제로 실리콘으로 제조된 제1전도 방식의 제3반도체층(51)을 구비하고, 상기 제2층(44)은 제1층(43)과 제3층(51)과의 사이에 있고, 상기 제1층(43)은 컬렉터 영역을 형성하고, 제2층(44)은 베이스 영역을 형성하고, 제3층(51)은 이미터 영역을 형성하는 것을 특징으로 하는 반도체 헤테로접합 구조체.
  3. 좁은 밴드갭 특성을 갖는 탄소 도프접합 실리콘 반도체 디바이스의 형성 방법에 있어서, 실제로 실리콘으로 제조되며 제1표면을 갖는 제1결정 반도체층(22,43)을 제공하는 단계와, 상기 제1표면에서 제2결정 반도체층(23,44)을 형성하는 단계를 구비하고, 상기 제2결정 반도체층(23,44)이 좁은 밴드갭 특성을 제공하기 위한 도펀트 및 실제로 실리콘으로 제조되어 있고, 좁은 밴드갭을 제공하는 도펀트가 반드시 탄소로 구성되고, 또한 탄소가 1.1%이하의 치환 농도에서 제2결정 반도체층(23,44)에 존재하는 것을 특징으로 하는 형성방법.
  4. 제3항에 있어서, 상기 제2결정 반도체층(23,44)의 형성 단계는, 제1표면에 실제로 실리콘으로 제조된 제2결정 반도체층(23,44)을 형성하는 단계와, 최고 7.0E15 atmos/㎠의 탄소 주입 선량에서 제2결정 반도체층(23,44)내에 탄소를 이온 주입하는 단계와, 탄소를 제2결정 반도체층(23,44)내에 치환가능하게 집적시키기 위하여 제2결정 반도체층(23,44)의 고상 에피택셜 재성장을 만들도록 불활성 분위기에서 제2결정 반도체층(23,44)을 어닐링하는 단계를 구비하는 것을 특징으로 하는 형성 방법.
  5. 제4항에 있어서, 탄소의 이온 주입 단계전에 얇은 산화물을 형성하는 단계와, 제2결정 반도체층의 어닐링이전에 1.0E15와 1.0E16 atmos/㎠사이의 탄소 주입 선량에서 제2결정 반도체층(23,44)내에 실리콘을 이온 주입하는 단계를 구비하는 것을 특징으로 하는 형성 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940024112A 1993-10-05 1994-09-26 좁은밴드갭특성을갖는탄소도프접합실리콘반도체디바이스및그형성방법 KR100296211B1 (ko)

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US08/131,541 US5360986A (en) 1993-10-05 1993-10-05 Carbon doped silicon semiconductor device having a narrowed bandgap characteristic and method
US131,541 1993-10-05

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JPH07161731A (ja) 1995-06-23
EP0646969A2 (en) 1995-04-05
EP0646969A3 (en) 1995-08-02
US5360986A (en) 1994-11-01
US5441901A (en) 1995-08-15
KR100296211B1 (ko) 2001-11-26

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