KR940016499A - Method of forming barrier metal layer of semiconductor device - Google Patents
Method of forming barrier metal layer of semiconductor device Download PDFInfo
- Publication number
- KR940016499A KR940016499A KR1019920027046A KR920027046A KR940016499A KR 940016499 A KR940016499 A KR 940016499A KR 1019920027046 A KR1019920027046 A KR 1019920027046A KR 920027046 A KR920027046 A KR 920027046A KR 940016499 A KR940016499 A KR 940016499A
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- KR
- South Korea
- Prior art keywords
- barrier metal
- metal layer
- layer
- depositing
- forming
- Prior art date
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Abstract
본 발명은 고집적 반도체소자의 제조공정중 서브 마이크를 콘택홀을 하층 실리콘기판 또는 도전층에 콘택하는 금속배선에 관한 것으로 기존의 스퍼터링 장비 안 혹은 밖에서 후처리되는 대신 배리어 금속증착시 산소가 포함되지 않은 배리어금속층과 포함된 층으로 2단계 증착함으로 해서 공정단순화를 통한 공정시간단축, 배리어금속내에 들어가는 산소량 및 산소가 포함된 배리어금속의 두께조절을 통해 충분한 배리어 효과를 얻을 수 있는 기술에 관한 것이다.The present invention relates to a metal wiring for contacting a sub microphone with a contact hole to a lower silicon substrate or a conductive layer during the manufacturing process of a highly integrated semiconductor device, and does not include oxygen during deposition of a barrier metal instead of being post-treated in or outside existing sputtering equipment. The present invention relates to a technology capable of obtaining a sufficient barrier effect by reducing the process time through process simplification, the amount of oxygen entering the barrier metal, and the thickness of the barrier metal containing oxygen by two-step deposition into the barrier metal layer and the included layer.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2A도는 본 발명에 따라 제1A도의 공정후 스터퍼링장치안에서 다른증착 챔버로 이동하여 산소가 포함된 배리어 금속층을 증착한 상태의 단면도, 제2B도 및 제2C도는 제2A도의 공정후 각각 알루미늄 합금층, 반사방지층을 그리고 티타늄층, 알루미늄 합금층, 반사방지층을 연속적으로 증착한 상태의 단면도.Figure 2A is a cross-sectional view of the deposition of a barrier metal layer containing oxygen by moving to another deposition chamber in the post-processing stuffing apparatus of FIG. Sectional view showing a layer, an antireflection layer, and a titanium layer, an aluminum alloy layer, and an antireflection layer successively deposited.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920027046A KR940016499A (en) | 1992-12-31 | 1992-12-31 | Method of forming barrier metal layer of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920027046A KR940016499A (en) | 1992-12-31 | 1992-12-31 | Method of forming barrier metal layer of semiconductor device |
Publications (1)
Publication Number | Publication Date |
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KR940016499A true KR940016499A (en) | 1994-07-23 |
Family
ID=67223882
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920027046A KR940016499A (en) | 1992-12-31 | 1992-12-31 | Method of forming barrier metal layer of semiconductor device |
Country Status (1)
Country | Link |
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KR (1) | KR940016499A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100401498B1 (en) * | 2001-01-11 | 2003-10-17 | 주식회사 하이닉스반도체 | Method of forming barrier layers in semiconductor devices |
KR100476702B1 (en) * | 2000-12-28 | 2005-03-16 | 주식회사 하이닉스반도체 | Method of forming a copper wiring in a semiconductor device |
-
1992
- 1992-12-31 KR KR1019920027046A patent/KR940016499A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100476702B1 (en) * | 2000-12-28 | 2005-03-16 | 주식회사 하이닉스반도체 | Method of forming a copper wiring in a semiconductor device |
KR100401498B1 (en) * | 2001-01-11 | 2003-10-17 | 주식회사 하이닉스반도체 | Method of forming barrier layers in semiconductor devices |
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