KR920018914A - Semiconductor package - Google Patents

Semiconductor package Download PDF

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Publication number
KR920018914A
KR920018914A KR1019910004606A KR910004606A KR920018914A KR 920018914 A KR920018914 A KR 920018914A KR 1019910004606 A KR1019910004606 A KR 1019910004606A KR 910004606 A KR910004606 A KR 910004606A KR 920018914 A KR920018914 A KR 920018914A
Authority
KR
South Korea
Prior art keywords
semiconductor package
semiconductor chip
heat sink
die pad
absorbing means
Prior art date
Application number
KR1019910004606A
Other languages
Korean (ko)
Inventor
이국상
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019910004606A priority Critical patent/KR920018914A/en
Priority to JP3218596A priority patent/JPH04320360A/en
Publication of KR920018914A publication Critical patent/KR920018914A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/38Cooling arrangements using the Peltier effect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

내용 없음No content

Description

반도체 패키지Semiconductor package

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도의 (가), (나) 및 제5도의 (가), (나)는 이 발명에 따른 반도체 패키지의 실시예를 나타낸 도면.4A, 5B and 5A, 5B show an embodiment of a semiconductor package according to the present invention.

Claims (5)

반도체 패키지(10)내에 2종의 금속으로 되는 히트싱크를 접촉시키고, 이들 사이에 전류가 흐르도록 한 흡열수단이 설치되어 반도체 칩(12)에서 발생되는 열이 흡열(흡수)되도록 함을 특징으로 하는 반도체패키지.A heat sink made of two kinds of metals is brought into contact with the semiconductor package 10, and heat absorbing means for allowing a current to flow therebetween is provided so that heat generated from the semiconductor chip 12 is absorbed (absorbed). Semiconductor package. 제1항에 있어서, 상기 흡열수단이, 반도체 칩(12)과 다이패드(13) 사이에 설치됨을 특징으로 하는 반도체 패키지.The semiconductor package according to claim 1, wherein the heat absorbing means is provided between the semiconductor chip (12) and the die pad (13). 제1항에 있어서, 상기 흡열수단이, 다이패드(13)에 탑재되는 반도체 칩(12)의 상면에 설치됨을 특징으로 하는 반도체 패키지.The semiconductor package according to claim 1, wherein the heat absorbing means is provided on an upper surface of the semiconductor chip (12) mounted on the die pad (13). 제1항에 있어서, 상기 흡열수단은, 반도체 칩(12)과 다이패드(13) 사이에 하나의 금속으로 되는 히트싱크(14)가 접합되고, 상기 반도체 칩(12)과 히드싱크(14)과 전류가 흐르도록 함을 특징으로 하는 반도체 패키지.The heat sink of claim 1, wherein a heat sink 14 made of a metal is bonded between the semiconductor chip 12 and the die pad 13, and the semiconductor chip 12 and the heat sink 14 are formed. A semiconductor package, characterized in that the over current flows. 제1항 또는 제4항에 있어서, 상기 흡열수단은, 다이패드(13)에 탑재되는 반도체 칩(12)의 상면에 하나의 금속으로 되는 히트싱크(14)가 접합됨을 특징으로 하는 반도체 패키지.The semiconductor package according to claim 1 or 4, wherein the heat absorbing means is formed by bonding a heat sink (14) made of one metal to an upper surface of the semiconductor chip (12) mounted on the die pad (13). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910004606A 1991-03-23 1991-03-23 Semiconductor package KR920018914A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019910004606A KR920018914A (en) 1991-03-23 1991-03-23 Semiconductor package
JP3218596A JPH04320360A (en) 1991-03-23 1991-08-29 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910004606A KR920018914A (en) 1991-03-23 1991-03-23 Semiconductor package

Publications (1)

Publication Number Publication Date
KR920018914A true KR920018914A (en) 1992-10-22

Family

ID=19312420

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910004606A KR920018914A (en) 1991-03-23 1991-03-23 Semiconductor package

Country Status (2)

Country Link
JP (1) JPH04320360A (en)
KR (1) KR920018914A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4211035B2 (en) * 2003-12-19 2009-01-21 富士通マイクロエレクトロニクス株式会社 Semiconductor device having temperature control function

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5513993A (en) * 1978-07-18 1980-01-31 Nec Corp Semiconductor device
JPS6084849A (en) * 1983-10-15 1985-05-14 Mitsubishi Electric Corp Semiconductor device
JPH01198056A (en) * 1988-02-03 1989-08-09 Mitsubishi Electric Corp Ic package

Also Published As

Publication number Publication date
JPH04320360A (en) 1992-11-11

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