KR920013942A - Code Generation and Data Multiplexing Methods - Google Patents

Code Generation and Data Multiplexing Methods Download PDF

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Publication number
KR920013942A
KR920013942A KR1019900021500A KR900021500A KR920013942A KR 920013942 A KR920013942 A KR 920013942A KR 1019900021500 A KR1019900021500 A KR 1019900021500A KR 900021500 A KR900021500 A KR 900021500A KR 920013942 A KR920013942 A KR 920013942A
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KR
South Korea
Prior art keywords
input
code
code generation
signal
generation process
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KR1019900021500A
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Korean (ko)
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KR930008434B1 (en
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민병민
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강진구
삼성전자 주식회사
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Priority to KR1019900021500A priority Critical patent/KR930008434B1/en
Publication of KR920013942A publication Critical patent/KR920013942A/en
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Publication of KR930008434B1 publication Critical patent/KR930008434B1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Picture Signal Circuits (AREA)

Abstract

내용 없음No content

Description

코드 발생 및 데이타 멀티플렉싱 방법Code Generation and Data Multiplexing Methods

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제5도는 본 발명의 일실시예의 회로도, 제6도는 본 발명이 적용된 일실시예의 회로도.5 is a circuit diagram of one embodiment of the present invention, Figure 6 is a circuit diagram of an embodiment to which the present invention is applied.

Claims (3)

두입력 신호의 서로 곱한 출력을 얻기 위한 코드발생 및 데이타 멀티플렉싱 방법에 있어서, 기준입력단으로 기준치를 입력하여 다수의 기준값들을 발생시키기 위한 기준발생 과정과, 상기 기준발생 과정으로 부터 발생된 기준값과 제1입력단으로 입력되는 입력신호를 비교하여 양자화 한후 이를 소정 비트로 코드화하여 출력하기 위한 코드발생 과정과, 상기 코드발생 과정에서 출력된 코드에 따라 제2입력단으로 입력되는 입력신호의 곱셈 인자를 선택하여 출력하기 위한 곱셉 셀렉팅 과정으로 이루어짐을 특징으로 하는 코드발생 및 데이타 멀티플렉싱 방법.A code generation and data multiplexing method for obtaining multiply outputs of two input signals, the method comprising: a reference generation process for generating a plurality of reference values by inputting a reference value to a reference input terminal, a reference value generated from the reference generation process, and a first value; Comparing and quantizing the input signal input to the input terminal, and then coded to a predetermined bit to output a code generation process, and selecting and outputting a multiplication factor of the input signal input to the second input terminal according to the code output in the code generation process Code generation and data multiplexing method characterized in that consisting of a multi-selection process for. 제1항에 있어서, 상기 코드발생 과정이 다음의 식, {M≥3.3log(2N+1)여기서 M은 코드의 비트수, N은 정수}을 만족하는 코드를 발생함을 특징으로 한 코드발생 및 데이타 멀티플렉싱 방법.The code generation process according to claim 1, wherein the code generation process generates a code that satisfies the following equation: {M≥3.3log (2N + 1), where M is the number of bits of code and N is an integer}. And data multiplexing method. 영상신호 처리장치의 수평윤곽 보상 방법에 있어서, 입력 영상신호를 화상의 윤곽을 명확하게 하기 위해 1차미분 하는 과정과, 상기 1차미분 과정으로 부터 고역성분이 강조된 2차미분신호를 얻는 과정과, 상기 2차미분신호를 낮은 레벨신호 성분을 부스팅하기 위한 과정과, 상기 1차미분 과정으로 부터 얻어진 1차미분신호를 소정 시간차를 두고 절대값을 취하기 위한 과정과, 상기 절대값으로 부터 에치를 검출하여 리쉐이핑 하기위한 과정과, 상기 입력 영상신호를 수평윤곽 보상 하기 위해 소정시간 지연시키는 과정과, 상기 부스팅 과정에서 부스팅된 값과 기준발생부로 부터 얻어진 기준값을 비교후 소정비트로 코드화 하기 위한 과정과, 상기 코트화 과정에서 생성된 코드에 따라 상기 리쉐이핑 과정으로 부터 얻어진 데이타를 선택 출력하기 위한 곱셈 셀렉터 과정과, 상기 곱셉 셀렉터 과정에서 선택된 출력과 상기 지연과정으로 부터 지연된 출력을 가산하여 수평윤곽 보상된 영상신호를 출력하기 위한 가산과정으로 이루어짐을 특징으로 하는 수평윤곽 보상방법.A horizontal contour compensation method of an image signal processing apparatus, comprising the steps of: firstly performing an input derivative on an input image signal for clarity of an image, and obtaining a second derivative signal with a high frequency component emphasized from the first derivative; Boosting the second differential signal with a low level signal component; taking an absolute value of the first differential signal obtained from the first differential process with a predetermined time difference; and etching from the absolute value. Detecting and reshaping, Delaying a predetermined time to compensate for the horizontal contour of the input video signal, Coding with a predetermined bit after comparing the boosted value in the boosting process and the reference value obtained from the reference generator; And selectively outputting data obtained from the reshaping process according to the code generated during the coat process. Count selector process and horizontal contour compensation method, characterized by the addition constituted by any process, for outputting a horizontal contour compensated video signal by adding the output and the delayed output from the delay process selected in the process of multiplication selector. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900021500A 1990-12-22 1990-12-22 Code output and data multiplexing method KR930008434B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900021500A KR930008434B1 (en) 1990-12-22 1990-12-22 Code output and data multiplexing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900021500A KR930008434B1 (en) 1990-12-22 1990-12-22 Code output and data multiplexing method

Publications (2)

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KR920013942A true KR920013942A (en) 1992-07-30
KR930008434B1 KR930008434B1 (en) 1993-08-31

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