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Publication of KR920013767ApublicationCriticalpatent/KR920013767A/en
Insulated Gate Type Field-Effect Transistor
(AREA)
Abstract
내용 없음No content
Description
핫 캐리어 방지 트랜지스터의 제조방법Method of manufacturing a hot carrier prevention transistor
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도 (a)-(f)는 본 발명에 따른 핫캐리어 방지 트랜지스터의 제조공정도이다.2 (a) to 2 (f) are manufacturing process diagrams of the hot carrier preventing transistor according to the present invention.
Claims (1)
반도체 기판상에 게이트산화막, 폴리실리콘을 차례로 도포한 후 상기 폴리실리콘을 게이트가 될 부분만 남기도록 식각하고 전명에 질화막을 도포하는 공정과, 양측이 중앙부보다 도핑 농도가 높도록 PoCl3도핑을 실시하여 상기 폴리실리콘 내부에 PoCl3영역을 형성하는 공정과, 불순물 주입으로 소오스 및 드레인 영역을 형성하는 공정으로 이루어진 핫캐리어 방지 트랜지스터의 제조 방법.After the gate oxide film and polysilicon are applied on the semiconductor substrate in turn, the polysilicon is etched to leave only the portion to be gated and the nitride film is applied to the entire surface, and the PoCl 3 doping is performed so that both sides have a higher doping concentration than the center portion. Forming a PoCl 3 region in the polysilicon; and forming a source and a drain region by impurity implantation.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900021454A1990-12-221990-12-22
Method of manufacturing a hot carrier prevention transistor
KR920013767A
(en)