KR880003439A - Submicron MOSFET device with high concentration doped only channel region and its manufacturing method - Google Patents

Submicron MOSFET device with high concentration doped only channel region and its manufacturing method Download PDF

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Publication number
KR880003439A
KR880003439A KR1019860006926A KR860006926A KR880003439A KR 880003439 A KR880003439 A KR 880003439A KR 1019860006926 A KR1019860006926 A KR 1019860006926A KR 860006926 A KR860006926 A KR 860006926A KR 880003439 A KR880003439 A KR 880003439A
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South Korea
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channel
channel region
mosfet device
manufacturing
drain
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KR1019860006926A
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Korean (ko)
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KR890004425B1 (en
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최민성
박영준
김흥식
김기홍
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구자두
금성반도체 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음No content

Description

채널 영역만을 고농도로 도우핑시킨 서브마이크론MOSFET장치 및 그 제조방법Submicron MOSFET device with high concentration doped only channel region and its manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 의한 서브마이크론 MOSFET장치의 구성도이다.1 is a configuration diagram of a submicron MOSFET device according to the present invention.

제2도는 본 발명에 의한 서브마이크론 MOSFET장치의 제조방법을 제조공정별로 나타낸 도면이다.2 is a diagram showing a manufacturing method of a submicron MOSFET device according to the present invention for each manufacturing process.

제3도는 본 발명에 따른 자기정렬의 원리를 이용한 서브마이크론 MOSFET장치의 제조방법을 공정별로 나타낸 도면이다.3 is a diagram showing a process for manufacturing a submicron MOSFET device using the self-alignment principle according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 기판 2 : 격리용 산화막1 substrate 2 oxide film for isolation

3 : 포토레지스터 3' : 무결정실리콘3: photoresist 3 ': amorphous silicon

4 : 채널영역 5 : 게이트용 산화막4 channel region 5 gate oxide film

6 : 폴리실리콘 게이트 7 : 소오스6: polysilicon gate 7: source

8 : 드레인 9 : 접착면8: drain 9: adhesive surface

10 : 연결금속10: connecting metal

Claims (2)

P형이나 또는 N형 기판(1) 상에 격리용 산화막(2)이 형성되어 있고, 이러한 격리용 산화막(2) 사이에 게이트용 산화막(5) 및 폴리실리콘 게이트(6)가 형성되어 있으며, 그 아래에 불순물이 주입되어 소오스(7) 및 드레인(8) 영역이 형성되어 있고, 상기 기판(1) 상단에는 접착면(9)이 정의되어 있으며, 상기 소오스(7) 및 드레인(8)을 외부로 연결시키는 연결금속(10)이 접착되어 있는 MOSFET장치에 있어서, 상기 폴리실리콘 게이트(6) 바로밑의 채널영역(4)만을 P채널일 경우에는 N+붕소를 임플란테이션시키고, 그리고 N채널일 경우에는 P+인을 임플란테이션 시킴으로써 상기 채널 영역(4)만이 고농도로 도우핑이 증가되어 있는 구성으로 된것을 특징으로 하는 채널 영역만을 고농도로 도우핑시킨 서브마이크론 MOSFET장치.An isolation oxide film 2 is formed on the P-type or N-type substrate 1, and a gate oxide film 5 and a polysilicon gate 6 are formed between the isolation oxide films 2. Impurities are implanted underneath to form source 7 and drain 8 regions, and an adhesive surface 9 is defined on the substrate 1 and the source 7 and drain 8 are formed. In the MOSFET device to which the connecting metal 10 to be connected to the outside is bonded, N + boron is implanted in the case where only the channel region 4 directly under the polysilicon gate 6 is a P channel, and N In the case of a channel, a submicron MOSFET device in which only the channel region 4 is doped at a high concentration by implanting P + phosphorus. MOSFET장치의 제조방법에 있어서, P형 혹은 N형 기판(1) 상에 격리용 산화막(2)을 형성하는 제1공정과, 포토레지스터(3)을 기판(1) 상에 도포하여 2회 마스크하면서 채널 영역을 정의하여 N채널인 경우에는 붕소를 임플란테이션시키고, 그리고 P채널일 경우에는 인을 임플란테이션 시킴으로써 고농도로 도우핑을 증가시킨 채널 영역(4)을 형성시키는 제2공정과, 게이트용 산화막(5) 및 폴리실리콘 게이트(6)을 형성하고 소오스(7) 및 드레인(8)의 영역을 형성시키기 위해서, N채널일 경우에는 아세닉을, 그리고 P채널일 경우에는 붕소를 임플란테이션시키는 제3공정과, 이러한 공정후에 접착면(9)을 정의하고 나서 소오스(7) 및 드레인(8)영역을 외부로 각각 연결시키기 위한 연결금속(10)을 접착시키는 제4공정으로 구성되어 있는 것을 특징으로 하는 채널 영역만을 고농도로 도우핑시킨 서브마이크론 MOSFET장치의 제조방법.In the method of manufacturing a MOSFET device, a first step of forming an isolation oxide film 2 on a P-type or N-type substrate 1 and a photoresist 3 are applied on the substrate 1 to mask twice. While defining a channel region and implanting boron in the N-channel and phosphorus in the P-channel to form the channel region 4 having a high doping concentration, In order to form the gate oxide film 5 and the polysilicon gate 6 and to form the regions of the source 7 and the drain 8, an acenic is used for the N channel and boron is used for the P channel. A third step of planting, and a fourth step of bonding the connecting metal 10 for connecting the source 7 and drain 8 regions to the outside after defining the adhesive surface 9 after such a step. Only the channel region, characterized in that A method of manufacturing a submicron MOSFET device doped at a concentration. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860006926A 1986-08-20 1986-08-20 Submicron mosfet device and the manufacturing method doping channel domain with high density KR890004425B1 (en)

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KR1019860006926A KR890004425B1 (en) 1986-08-20 1986-08-20 Submicron mosfet device and the manufacturing method doping channel domain with high density

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KR1019860006926A KR890004425B1 (en) 1986-08-20 1986-08-20 Submicron mosfet device and the manufacturing method doping channel domain with high density

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KR880003439A true KR880003439A (en) 1988-05-17
KR890004425B1 KR890004425B1 (en) 1989-11-03

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100811370B1 (en) * 2001-06-29 2008-04-01 주식회사 하이닉스반도체 Pattern Transformation Preventive Process Using Boron Implantation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100811370B1 (en) * 2001-06-29 2008-04-01 주식회사 하이닉스반도체 Pattern Transformation Preventive Process Using Boron Implantation

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KR890004425B1 (en) 1989-11-03

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