KR920007105A - Aℓ계 재료막의 에칭방법 - Google Patents

Aℓ계 재료막의 에칭방법 Download PDF

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Publication number
KR920007105A
KR920007105A KR1019910014714A KR910014714A KR920007105A KR 920007105 A KR920007105 A KR 920007105A KR 1019910014714 A KR1019910014714 A KR 1019910014714A KR 910014714 A KR910014714 A KR 910014714A KR 920007105 A KR920007105 A KR 920007105A
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KR
South Korea
Prior art keywords
based material
material film
etching
etching method
film formed
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Application number
KR1019910014714A
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English (en)
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KR100214032B1 (ko
Inventor
게이지 시노하라
Original Assignee
오가 노리오
소니 가부시기가이샤
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Application filed by 오가 노리오, 소니 가부시기가이샤 filed Critical 오가 노리오
Publication of KR920007105A publication Critical patent/KR920007105A/ko
Application granted granted Critical
Publication of KR100214032B1 publication Critical patent/KR100214032B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/915—Active solid-state devices, e.g. transistors, solid-state diodes with titanium nitride portion or region

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

내용 없음

Description

Aℓ계 재료막의 에칭방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 실시예1에서 얻어진 에칭형상의 단면도,
제3도는 피에칭재의 일예를 도시한 단면도,
제4도는 실시예에서 사용한 에칭장치의 구성도.

Claims (1)

  1. 소재위에 형성된 Aℓ계 재료막을 에칭하는 Aℓ계 재료막의에칭 방법에 있어서, 수소를 구성원소로하여 분자중에 함유된 가스를 10~99% 함유하여 이루어지는 혼합가스를 사용하여 소재가 노출될 때까지 에칭을 행하고, 산화성의 가스를 사용하여 상기 에칭에 의해 형성된 Aℓ계 재료패턴의 측벽에 보호막을 형성하고, 그 후 오버에칭을 행하는 것을 특징으로 하는 Aℓ계 재료막의 에칭방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910014714A 1990-09-11 1991-08-24 알루미늄계재료막의에칭방법 KR100214032B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP90-240486 1990-09-11
JP24048690A JP3170791B2 (ja) 1990-09-11 1990-09-11 Ａｌ系材料膜のエッチング方法

Publications (2)

Publication Number Publication Date
KR920007105A true KR920007105A (ko) 1992-04-28
KR100214032B1 KR100214032B1 (ko) 1999-08-02

Family

ID=17060232

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910014714A KR100214032B1 (ko) 1990-09-11 1991-08-24 알루미늄계재료막의에칭방법

Country Status (3)

Country Link
US (1) US5207868A (ko)
JP (1) JP3170791B2 (ko)
KR (1) KR100214032B1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100534519B1 (ko) * 1998-09-18 2006-03-14 주식회사 코오롱 크림프성이 우수한 해도형 극세사 및 그의 제조방법.
US9925752B2 (en) * 2012-07-19 2018-03-27 Jeongsan International Co., Ltd Method for manufacturing synthetic leather using different liquid silicone rubber coating solutions

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US5868854A (en) * 1989-02-27 1999-02-09 Hitachi, Ltd. Method and apparatus for processing samples
US5480748A (en) * 1992-10-21 1996-01-02 International Business Machines Corporation Protection of aluminum metallization against chemical attack during photoresist development
KR970001883B1 (ko) * 1992-12-30 1997-02-18 삼성전자 주식회사 반도체장치 및 그 제조방법
US5387556A (en) * 1993-02-24 1995-02-07 Applied Materials, Inc. Etching aluminum and its alloys using HC1, C1-containing etchant and N.sub.2
JPH0786244A (ja) * 1993-09-13 1995-03-31 Sony Corp ドライエッチング方法
DE69424388T2 (de) * 1993-12-23 2000-08-31 St Microelectronics Inc Verfahren und Dielektrikumstruktur zur Erleichterung der Metallüberätzung ohne Beschädigung des Zwischendielektrikums
EP0690503A1 (en) * 1994-05-31 1996-01-03 Advanced Micro Devices, Inc. Improved interconnect line structure and process therefor
US5910021A (en) 1994-07-04 1999-06-08 Yamaha Corporation Manufacture of semiconductor device with fine pattens
US5739046A (en) * 1994-09-30 1998-04-14 United Microelectronics Corporation Method of making a reliable barrier layer
JPH08130206A (ja) * 1994-10-31 1996-05-21 Sony Corp Ａｌ系金属層のプラズマエッチング方法
US5702564A (en) * 1995-01-03 1997-12-30 Advanced Micro Devices, Inc. Method of etching conductive lines without undercutting
US6090717A (en) * 1996-03-26 2000-07-18 Lam Research Corporation High density plasma etching of metallization layer using chlorine and nitrogen
US5849641A (en) * 1997-03-19 1998-12-15 Lam Research Corporation Methods and apparatus for etching a conductive layer to improve yield
US5808364A (en) * 1997-04-08 1998-09-15 International Business Machines Corporation Interconnects using metal spacers
US6211078B1 (en) 1997-08-18 2001-04-03 Micron Technology, Inc. Method of improving resist adhesion for use in patterning conductive layers
WO1999012195A1 (fr) * 1997-08-28 1999-03-11 Hitachi, Ltd. Procede de gravure a sec
US6187682B1 (en) * 1998-05-26 2001-02-13 Motorola Inc. Inert plasma gas surface cleaning process performed insitu with physical vapor deposition (PVD) of a layer of material
US8187483B2 (en) * 2006-08-11 2012-05-29 Jason Plumhoff Method to minimize CD etch bias
KR20130043063A (ko) * 2011-10-19 2013-04-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법

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IT1203089B (it) * 1976-03-03 1989-02-15 Int Plasma Corp Procedimento ed apparecchiatura per eseguire reazioni chimiche nella regione della scarica luminescente di un plasma
JPS57170534A (en) * 1981-04-15 1982-10-20 Hitachi Ltd Dry etching method for aluminum and aluminum alloy
JPS60217634A (ja) * 1984-04-13 1985-10-31 Victor Co Of Japan Ltd プラズマエツチング法
JPH0828359B2 (ja) * 1986-10-27 1996-03-21 ソニー株式会社 エツチング方法
JP2590471B2 (ja) * 1987-03-27 1997-03-12 ソニー株式会社 エツチング方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100534519B1 (ko) * 1998-09-18 2006-03-14 주식회사 코오롱 크림프성이 우수한 해도형 극세사 및 그의 제조방법.
US9925752B2 (en) * 2012-07-19 2018-03-27 Jeongsan International Co., Ltd Method for manufacturing synthetic leather using different liquid silicone rubber coating solutions

Also Published As

Publication number Publication date
JP3170791B2 (ja) 2001-05-28
US5207868A (en) 1993-05-04
JPH04120282A (ja) 1992-04-21
KR100214032B1 (ko) 1999-08-02

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