KR910005296A - 불휘발성 반도체 기억장치 및 그 제조방법 - Google Patents

불휘발성 반도체 기억장치 및 그 제조방법

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Publication number
KR910005296A
KR910005296A KR1019890011731A KR890011731A KR910005296A KR 910005296 A KR910005296 A KR 910005296A KR 1019890011731 A KR1019890011731 A KR 1019890011731A KR 890011731 A KR890011731 A KR 890011731A KR 910005296 A KR910005296 A KR 910005296A
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South Korea
Prior art keywords
polycrystalline silicon
gate
nonvolatile semiconductor
layer
memory device
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KR1019890011731A
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English (en)
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KR940006094B1 (ko
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이수철
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김광호
삼성전자 주식회사
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Priority to KR1019890011731A priority Critical patent/KR940006094B1/ko
Priority to US07/412,305 priority patent/US5041886A/en
Priority to GB9011355A priority patent/GB2235088B/en
Priority to DE4016346A priority patent/DE4016346C2/de
Priority to US07/672,575 priority patent/US5073513A/en
Publication of KR910005296A publication Critical patent/KR910005296A/ko
Application granted granted Critical
Publication of KR940006094B1 publication Critical patent/KR940006094B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H01L21/2815—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects part or whole of the electrode is a sidewall spacer or made by a similar technique, e.g. transformation under mask, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885—Hot carrier injection from the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

불휘발성 반도체 기억장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 의한 플래시 EEPROM 반도체 기억장치의 셀어레이의 일부를 예시한 평면도.
제16도(a), (b)는 제3도의 B-B선 및 C-C선 단면을 본 발명에 의한 플래시 EEPROM 반도체 기억장치의 제조공정 순서에 따라 예시한 단면도.

Claims (8)

  1. n형 또는 p형 불순물이 도우핑된 단결정 반도체 서브스트레이트와, 이 서브스트레이트 위에 전기적으로 서로 절연된 게이트 도체군을 구비하고, 상기 게이트 도체군은, 부유 게이트로 제공되는 제1도체와, 상기 제1도체위에 적층되어 콘트롤 게이트로 제공되는 제2도체와, 그리고 상기 제1 및 제2도체의 적층구조의 일측벽을 따라 측벽 스페이서 구조로 형성되어 셀렉트 게이트로 제공되는 제3도체를 구비하고, 상기 제2 및 제3도체는 메모리 셀과 셀 사이의 필드산화층 위에서 콘택트를 형성하여 서로 연결되는 것을 특징으로 하는 불휘발성 반도체 기억장치.
  2. 제1항에 있어서, 상기 콘택트는 임의의 셀 수마다 하나씩 구비하는 것을 특징으로 하는 불휘발성 반도체 기억장치.
  3. 제1 또는 제2항에 있어서, 제1, 제2 및 제3도체는 다결정 실리콘으로 형성되는 특징으로 하는 불휘발성 반도체 기억장치.
  4. p형 단결정 실리콘 서브 스트레이트 상에 선택적 산화를 통해 셀 분리용 필드 산화층을 성장시키는 제1단계, 상기 제1단계 이후 제1게이트 산화막을 성장시키고 그 위에 제1층 다결정 실리콘층을 침적시키고 상기 필드 산화층 위의 제1층 다결정 실리콘층을 에칭하는 제2단계, 상기 제2단계 이후 제1중간 절연막을 덮고 그 위에 제2층 다결정 실리콘층을 침적시키고 제2중간 절연막을 성정시키는 제3단계, 상기 제3단계 이후 워드라인을 정의하기 위한 셀프얼라인 마스크를 적용해서 제2중단 절연막, 제2다결정실리콘층, 제1중간 절연막, 제1다결정 실리콘층까지를 에칭하는 제4단계, 상기 제4단계 이후 제2게이트 산화막을 성장시키고 게이트 콘택트홀을 정의하기 위한 게이트 콘택트 마스크를 적용해서 상기 제2다결정 실리콘층의 게이트 콘택트부위의 제2중간 절연막을 에칭하는 제5단계, 상기 제5단계 이후 제3다결정 실리콘층을 침적시키고 에치백 공정을 적용해서 제1 및 제2다결정 실리콘 측벽을 따라 측벽 스페이서를 남기는 제6단계, 상기 제6단계 이후 드레인영역의 다결정 실리콘 측벽 스페이서를 제거하는 제7단계, 상기 제7단계 이후 n형 불순물을 주입하여서 액티브 영역에 소오스 및 드레인을 형성하는 제8단계, 상기 제8단계 이후 제3중간 절연막 및 제4중간 절연막을 차례로 덮고 금속콘택트를 정의하기 위해 금속콘택트 마스크를 적용해서 금속콘택트홀을 형성하는 제9단계, 상기 제9단계 이후 금속을 침적시키고 금속마스크를 적용해서 금속배선을 형성하는 제10단계로 이루어진 것을 특징으로 하는 불휘발성 반도체 기억장치의 제조방법.
  5. 제4항에 있어서, 상기 제1단계에서 필드산화층을 성장시키기 전에 p형 불순물을 주입시켜 필드 임계전압을 조절하는 단계를 포함하는 것을 특징으로 하는 불휘발성 반도체 기억장치의 제조방법.
  6. 제5항에 있어서, 상기 제2단계에서 제1게이트 산화막을 성장시키기 전 또는 후에 액티브 영역에 p형 불순물을 주입시켜 드레시홀드 전압을 조정하는 단계를 포함하는 것을 특징으로 하는 불휘발성 반도체 기억장치의 제조방법.
  7. 제6항에 있어서, 상기 제1게이트 산화막은 200A 이항의 두께로 성장시키는 것을 특징으로 하는 불휘발성 반도체 기억장치의 제조방법.
  8. 제7항에 있어서, 제8단계에서 제4중간 절연막은 붕소(B)와 인(P)을 함유하는 SiO2산화막(BPSG:boro-phosphosilicate glass)을 저온에서 성정시키는 것을 특징으로 하는 불휘발성 반도체 기억장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890011731A 1989-08-17 1989-08-17 불휘발성 반도체 기억장치 및 그 제조방법 KR940006094B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019890011731A KR940006094B1 (ko) 1989-08-17 1989-08-17 불휘발성 반도체 기억장치 및 그 제조방법
US07/412,305 US5041886A (en) 1989-08-17 1989-09-25 Nonvolatile semiconductor memory device and manufacturing method thereof
GB9011355A GB2235088B (en) 1989-08-17 1990-05-21 Nonvolatile semiconductor memory device and manufacturing method thereof
DE4016346A DE4016346C2 (de) 1989-08-17 1990-05-21 Nichtflüchtige Halbleiterspeichervorrichtung und ein Verfahren zu ihrer Herstellung
US07/672,575 US5073513A (en) 1989-08-17 1991-03-20 Manufacture of a nonvolatile semiconductor memory device having a sidewall select gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890011731A KR940006094B1 (ko) 1989-08-17 1989-08-17 불휘발성 반도체 기억장치 및 그 제조방법

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KR910005296A true KR910005296A (ko) 1991-03-30
KR940006094B1 KR940006094B1 (ko) 1994-07-06

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US (2) US5041886A (ko)
KR (1) KR940006094B1 (ko)
DE (1) DE4016346C2 (ko)
GB (1) GB2235088B (ko)

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