KR900005602A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

Info

Publication number
KR900005602A
KR900005602A KR1019890003419A KR890003419A KR900005602A KR 900005602 A KR900005602 A KR 900005602A KR 1019890003419 A KR1019890003419 A KR 1019890003419A KR 890003419 A KR890003419 A KR 890003419A KR 900005602 A KR900005602 A KR 900005602A
Authority
KR
South Korea
Prior art keywords
conductive layer
electrode
polycrystalline silicon
insulating film
forming
Prior art date
Application number
KR1019890003419A
Other languages
English (en)
Other versions
KR930001218B1 (ko
Inventor
마사히로 요네다
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR900005602A publication Critical patent/KR900005602A/ko
Application granted granted Critical
Publication of KR930001218B1 publication Critical patent/KR930001218B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/098—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being PN junction gate field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66606—Lateral single gate silicon transistors with final source and drain contacts formation strictly before final or dummy gate formation, e.g. contact first technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도, 제1B도, 제1C도, 제1D도, 제1E도 및 제1F도는, 본 발명의 제1의 실시예에 의한 MOSFET의 제조공정을 순서대로 표시한 제조공정 단면도.

Claims (2)

  1. 한쪽의 전극용 도전층이 다른쪽의 전극용 도전체의 위에 걸려서 움직이지 못하는 구조를 가지고 있는 반도체장치로서 그 내부에 제 1 도전형의 불순물 영역과 제 2 도전형의 불순물 영역과를 포함하는 실리콘 기판과, 상기 제 1 도전형의 불순물 영역의 표면상에 적층된 제 1 전극용 도전층과, 상기 제 2 도전형의 불순물영역의 표면상에 적층된 제 2 전극용 도전층과, 상기 제 1 전극용 도전층과 상기 제 2 전극용 도전층과의 사이에 형성되는 절연막과를 구비하고. 상기 제 1 전극용 도전층은 적어도 고융점 금속을 포함하는 하부 도전층과, 이 도전층의 표면상에 형성된 다결정 실리콘층과를 포함하고, 상기 제 2 전극용 도전층의 일부는 상기 제 1 전극용 도전층의 표면상에 상기 절연막을 사이에 두고 걸려서 움직이지 못하는 구조를 가지고 있는 반도체 장치.
  2. 반도체 기판 상에 고융점 금속을 포함하는 도전층과 다결정 실리콘층과의 적층구조의 전극용 도전층을 가지는 반도체장치의 제조방법에 있어서, 상기 반도체 기판 상에 고융점 금속을 포함하는 도전층을 형싱하는 공정과, 상기 도전층 상에 불순물을 포함하는 제1의 다결정 실리콘층을 형성하는 공정과, 상기 제1의 다결정 실리콘층 상에 제1의 절연막을 형성하는 공정과, 상기 제1의 절연막 및 전기 제1의 다결정 실리콘막과를 동시에 에칭하고, 상기 도전층에 달하는 소정의 구멍트인 곳을 형성하는 공정과, 상기 소정의 구멍트인 곳내에 표면이 노출한 상기 도전층을 에칭하고, 상기 소정의 구멍트인 곳내에 상기 반도체 기판 표면을 노출시키는 공정과, 상기 소정의 구멍트인 곳의 밑면과 내측면과 상기 제1 절연막 상에 제2의 절연막을 형성하는 공정과, 상의 제2의 절연막상이 제2의 다결정실리콘을 형성하는 공정과, 상기 세2의 다결정 실리콘층을 소정의 형상으로 패턴닝하는 공정과, 열처리에 의하여 상기 제1의 다결정 실리콘층중에 포함되는 불순물을 상기 반도체 기판 중에 확산시키는 공정과를 포함하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890003419A 1988-09-20 1989-03-18 반도체장치 및 그 제조방법 KR930001218B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP88-236043 1988-09-20
JP63-236043 1988-09-20
JP63236043A JPH0728040B2 (ja) 1988-09-20 1988-09-20 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
KR900005602A true KR900005602A (ko) 1990-04-14
KR930001218B1 KR930001218B1 (ko) 1993-02-22

Family

ID=16994914

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890003419A KR930001218B1 (ko) 1988-09-20 1989-03-18 반도체장치 및 그 제조방법

Country Status (4)

Country Link
US (1) US5079617A (ko)
JP (1) JPH0728040B2 (ko)
KR (1) KR930001218B1 (ko)
DE (1) DE3931127C2 (ko)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH073835B2 (ja) * 1990-03-19 1995-01-18 日本プレシジョン・サーキッツ株式会社 半導体装置
KR940010564B1 (ko) * 1991-10-10 1994-10-24 금성일렉트론 주식회사 전계효과 트랜지스터 및 그 제조방법
EP0550255B1 (en) * 1991-12-31 1998-03-11 STMicroelectronics, Inc. Transistor spacer structure
US5475266A (en) * 1992-02-24 1995-12-12 Texas Instruments Incorporated Structure for microelectronic device incorporating low resistivity straps between conductive regions
US5719065A (en) 1993-10-01 1998-02-17 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device with removable spacers
KR0171732B1 (ko) * 1993-11-26 1999-03-30 김주용 모스 트랜지스터 및 그 제조방법
US5393682A (en) * 1993-12-13 1995-02-28 Taiwan Semiconductor Manufacturing Company Method of making tapered poly profile for TFT device manufacturing
US5646435A (en) * 1995-04-04 1997-07-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating CMOS field effect transistors having sub-quarter micrometer channel lengths with improved short channel effect characteristics
US5781445A (en) * 1996-08-22 1998-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma damage monitor
US5943576A (en) * 1998-09-01 1999-08-24 National Semiconductor Corporation Angled implant to build MOS transistors in contact holes
JP4454921B2 (ja) * 2002-09-27 2010-04-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4683817B2 (ja) * 2002-09-27 2011-05-18 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR100540061B1 (ko) * 2003-12-31 2005-12-29 동부아남반도체 주식회사 플라즈마 데미지를 방지하는 방법
WO2011068028A1 (en) * 2009-12-04 2011-06-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor element, semiconductor device, and method for manufacturing the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4329706A (en) * 1979-03-01 1982-05-11 International Business Machines Corporation Doped polysilicon silicide semiconductor integrated circuit interconnections
US4364166A (en) * 1979-03-01 1982-12-21 International Business Machines Corporation Semiconductor integrated circuit interconnections
US4392150A (en) * 1980-10-27 1983-07-05 National Semiconductor Corporation MOS Integrated circuit having refractory metal or metal silicide interconnect layer
US4398335A (en) * 1980-12-09 1983-08-16 Fairchild Camera & Instrument Corporation Multilayer metal silicide interconnections for integrated circuits
JPS6116573A (ja) * 1984-07-03 1986-01-24 Matsushita Electronics Corp Ｍｉｓ型半導体装置の製造方法
EP0183995B1 (en) * 1984-11-02 1989-08-16 Hitachi, Ltd. Semiconductor device having a polycrystalline silicon interconnection layer and method for its manufacture
US4855798A (en) * 1986-12-19 1989-08-08 Texas Instruments Incorporated Semiconductor and process of fabrication thereof

Also Published As

Publication number Publication date
DE3931127A1 (de) 1990-03-22
US5079617A (en) 1992-01-07
JPH0283937A (ja) 1990-03-26
KR930001218B1 (ko) 1993-02-22
DE3931127C2 (de) 1996-05-23
JPH0728040B2 (ja) 1995-03-29

Similar Documents

Publication Publication Date Title
KR880014657A (ko) 반도체장치의 제조방법
KR960002804A (ko) 반도체장치 및 그 제조방법
KR940006179A (ko) 반도체 장치와 그 제작방법
KR920005345A (ko) 터널 주입형 반도체장치 및 그 제조방법
KR900005602A (ko) 반도체장치 및 그 제조방법
KR890013777A (ko) 반도체 집적회로장치 및 그 제조방법
KR870007565A (ko) 반도체장치 및 그 제조방법
KR900019239A (ko) 집적회로용 로칼인터커넥트
KR900019261A (ko) 반도체장치
KR920010975A (ko) 반도체장치 및 그의 제조방법
KR920020671A (ko) 골드구조를 가지는 반도체소자의 제조방법
KR910019260A (ko) 반도체장치및 그의 제조방법
KR890001195A (ko) 반도체 장치 및 그 제조방법
KR900004026A (ko) 반도체 소자 및 그 제조방법
KR930001460A (ko) 반도체 집적회로장치 및 그 제조방법
KR950021526A (ko) 반도체 장치 및 그의 제조방법
KR930020590A (ko) 알루미늄을 주성분으로 하는 금속박막의 에칭방법 및 박막트랜지스터의 제조방법
KR910003783A (ko) 반도체장치 및 그 제조방법
KR890016620A (ko) 반도체 집적회로장치의 제조방법
KR870008388A (ko) 반도체장치 및 그 제조방법
KR950025908A (ko) 반도체소자 제조방법
KR920015650A (ko) 반도체 발광소자 및 그 제조방법
KR880014690A (ko) 상부측 기판 접촉부를 갖고 있는 cmos 집적회로 및 이의 제조방법
JPS63318755A (ja) 半導体装置
KR960032687A (ko) 반도체 장치 및 그 제조 방법

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20010215

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee