KR900002884B1 - Leadframe for semiconductor device - Google Patents

Leadframe for semiconductor device Download PDF

Info

Publication number
KR900002884B1
KR900002884B1 KR1019860008835A KR860008835A KR900002884B1 KR 900002884 B1 KR900002884 B1 KR 900002884B1 KR 1019860008835 A KR1019860008835 A KR 1019860008835A KR 860008835 A KR860008835 A KR 860008835A KR 900002884 B1 KR900002884 B1 KR 900002884B1
Authority
KR
South Korea
Prior art keywords
alloy
lead frame
semiconductor device
copper
iron
Prior art date
Application number
KR1019860008835A
Other languages
Korean (ko)
Other versions
KR870006648A (en
Inventor
이사무 야마모또
세이지 다께무라
Original Assignee
미쓰비시전기주식회사
시끼모리야
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 미쓰비시전기주식회사, 시끼모리야 filed Critical 미쓰비시전기주식회사
Publication of KR870006648A publication Critical patent/KR870006648A/en
Application granted granted Critical
Publication of KR900002884B1 publication Critical patent/KR900002884B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The lead frame for resin sealed semiconductor device uses ferrous alloy having similar thermal expansion coefficient to silicon at the island portion, and copper or copper alloy at the other portion. The ferrous alloy is 42 alloy (42% Nickel), or 50 alloy (50% Nickel). The lead frame prevents warpage, and temperature rise of semiconductor device.

Description

수지밀봉반도체장치용 리드프레임(lead frame)Lead Frame for Resin Sealed Semiconductor Device

제 1 도는 이 발명의 실시예에 의한 리드프레임을 나타내는 사시도.1 is a perspective view showing a lead frame according to an embodiment of the present invention.

제 2 도는 종래 리드프레임을 나타내는 사시도.2 is a perspective view showing a conventional lead frame.

제 3 도는 종래 리드프레임에 반도체소자를 장착한 상태를 나타내는 사시도.3 is a perspective view showing a state in which a semiconductor device is mounted on a conventional lead frame.

제 4 도는 제 3 도에서 나타낸 리드프레임에 수지밀봉한 상태를 나타낸 사시도.4 is a perspective view showing a resin-sealed state in the lead frame shown in FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 리드프레임 12 : 아우터르디(outer lead)11: lead frame 12: outer lead

13 : 아이랜드(island)부 14 : 타이버13: island part 14: Tyver

15 : 인너리드(inner lead) 16 : 테15: inner lead 16: te

17 : 접속부.17: connection part.

이 발명은 수지밀봉반도체장치용 리드프레임에 관한 것이다.The present invention relates to a lead frame for a resin sealing semiconductor device.

종래의 수지밀봉반도체장치에는 제 2 도에 표시한 리드프레임이 사용되어왔다.The lead frame shown in FIG. 2 has been used in the conventional resin sealing semiconductor device.

도면에 있어서, 1은 리드프레임, 2은 아우터리드, 3은 아이랜드부, 4는 밀봉용수지가 외부로 누설되는 것을 방지하기 위한 타어버(Tieber), 5는 인너리드, 6은 테이다.In the drawings, 1 is a lead frame, 2 is an outer lead, 3 is an irish portion, 4 is a tire for preventing leakage of the sealing resin to the outside, 5 is an inner lead, 6 is a rim.

리드프레임(1)은 수지밀봉은 제 3 도와 같이 아이랜드부(3)에 반도체소자(7)를 접착하고 그 전극과 인너리드(5)를 금선(金線, 8)으로 접속시키고 있다.In the lead frame 1, the resin sealing is bonded to the semiconductor element 7 to the island portion 3 as shown in the third diagram, and the electrode and the inner lead 5 are connected by gold wires.

제 4 도는 이와같이 수지밀봉된 리드프레임(1)을 표시한다. 9는 경화된 밀봉용수지이다.4 shows the lead frame 1 sealed in this way. 9 is a cured sealing resin.

상기 리드프레임(1)은 일반적으로 철계의 합금 또는 동계의 합금이 단일재료로 만들어져 있으나, 고품질이 요구되고 있는 것은 팽창계수가 반도체소자의 재료인 실리콘에 가까운 철, 닉켈게의 합금이 사용되며 고열전도와 저코스트가 요구되는 것은 동계의 합금이 사용되고 있다.The lead frame 1 is generally made of a single alloy of an iron-based alloy or a copper-based alloy. However, high quality is required, and an alloy of iron or nickel crab having an expansion coefficient close to silicon, which is a material of a semiconductor device, is used. Copper alloys are used for those requiring thermal conductivity and low cost.

이중 고열전도가 용구되는 리드프레임은 동계합금으로 만들어져 있기 때문에 반도체소자가 발생시키는 열을 방출시켜 그 온도상승을 억제하는데는 좋지만 반도체소자의 재료인 실리콘과 리드프레임의 재료인 동계합금의 열팽창계수가 다르기 때문에 아이랜드부(3)에 접착한 반도체소자에 뒤틀림이 발생하는 문제점이 있었다.Since lead frame made of high thermal conductivity is made of copper alloy, it is good to release heat generated by semiconductor element and to suppress its temperature rise. Because of this difference, there is a problem that distortion occurs in the semiconductor device bonded to the island portion (3).

특히, 고집적화에 따른 반도체소자의 면적이 넓어지게 되면 뒤틀림의 발생은 보다 현저하게 된다. 이 발명은 이러한 종래의 문제점을 해결하기 위해 발명한 것으로서, 반도체소자의 뒤틀림과 온도상승을 방지할 수 있는 수지밀봉반도체장치용 리드프레임을 얻는데 그 목적이 있다.In particular, when the area of the semiconductor device is increased due to high integration, distortion occurs more remarkably. The present invention was invented to solve such a conventional problem, and an object thereof is to obtain a lead frame for a resin sealing semiconductor device capable of preventing distortion and temperature rise of a semiconductor element.

이 발명에 관한 리드프레임은 아이랜드부에 열팽창계수가 실리콘에 가까운 철계합금을, 그리고 아이랜드부 이외에 부분에는 동계합금을 각각 사용한 것이다.In the lead frame according to the present invention, an iron-based alloy having a coefficient of thermal expansion close to silicon is used in the irish portion, and a copper alloy is used in the portions other than the irish portion.

아이랜드부를 형성하는 철계합금의 열팽창계수가 반도체소자의 재료인 실리콘에 가까우므로 아이랜부에 접착한 반도체소자의 뒤틀림은 거의 발생하지 않는다.Since the thermal expansion coefficient of the iron alloy forming the island portion is close to silicon, which is a material of the semiconductor element, warpage of the semiconductor element adhered to the island portion hardly occurs.

한편, 아이랜드부이외의 부분은 고열전도성을 가진 동 또는 동계합금으로 만들어져 있으므로 반도체소자가 발생시키는 열은 이부분을 통하여 외기로 방출되어 반도체소자의 온도상승을 억제할 수 있다.On the other hand, since the portion other than the Irish portion is made of copper or copper alloy having high thermal conductivity, heat generated by the semiconductor element is released to the outside air through this portion to suppress the temperature rise of the semiconductor element.

제 1 도는 이 발명의 실시예를 표시한 사시도인데 도면에 있어서, 11은 리드프레임, 12은 아우터리드 13은 아이랜드부, 16은 테이다.1 is a perspective view showing an embodiment of the present invention, where 11 is a lead frame, 12 is an outer 13, an island part, and 16 is a rim.

상기 각구성 부분중 아애랜드부(13)에는 열팽창계수가 반도체소자의 재료인 실리콘에 가까운 철계합금을 사용하고 있으며, 아이랜드부(13)이외의 부분, 즉, 아우터리드(12), 타이버(14), 인너리드(15) 및 테(16)에는 동 또는 동계합금을 사용하고 있다.Among the components, the iron land portion 13 uses an iron alloy close to silicon, which has a thermal expansion coefficient close to that of the semiconductor element, and the parts other than the island portion 13, that is, the outer 12 and the tyre ( 14) Inner lead 15 and frame 16 are made of copper or copper alloy.

여기에서 말하는 철계합금은 예컨대 42알로이(alloy)(42% Ni), 50알로이(50% Ni)등이다. 아이랜드부(13)는 기타부분과 재료가 다르므로 테(16)에서 아이랜드부(13)로 뻗는 지지부(17)에 접속되어 있다. 18은 그 접속부이다.The iron alloy mentioned here is 42 alloy (42% Ni), 50 alloy (50% Ni), etc., for example. The island portion 13 is connected to the support portion 17 extending from the frame 16 to the island portion 13 because the material is different from the other portions. 18 is the connection part.

이 실시예에서는 아이랜드부가 반도체소자의 재료인 실리콘과 열팽창계수가 가까운 철계합금을 사용하였기 때문에 아이랜드부에 접착한 반도체소자의 뒤틀림이 거의 생기지 않는다. 또 아우터리드(12), 타이버(14), 인너리드(15)및 테(16)에 동 또는 동계합금을 사용하였기 때문에 반도체소자가 발생시키는 열은 이 부분을 통하여 외부로 방출되며 따라서, 반도체소자의 온도상승이 억제된다.In this embodiment, since the Irish portion uses an iron-based alloy close to the thermal expansion coefficient of silicon, which is a material of the semiconductor element, almost no distortion of the semiconductor element bonded to the Irish portion occurs. In addition, since copper or copper alloy is used for the outer 12, the tie 14, the inner lead 15, and the rim 16, the heat generated by the semiconductor element is discharged to the outside through this portion. The temperature rise of the device is suppressed.

이상과 같이 이 발명에 의하면 아이랜드부에 철계합금, 기타부분에 동 또는 동계합금을 사용하였기 때문에 반도체소자의 뒤틀림과 온도상승을 방지할 수 있다.As described above, according to the present invention, since the iron-based alloy and the copper or copper alloy are used for the Irish portion, the warping and the temperature rise of the semiconductor element can be prevented.

Claims (2)

아이랜드부에 열팽창계수가 실리콘에 가까운 철계합금을, 그리고 아이랜드부 이외의 부분에는 동 또는 동계합금을 각각 사용한 것을 특징으로 하는 수지밀봉반도체장치용 리드프레임.A lead frame for a resin sealing semiconductor device, wherein an iron-based alloy having a coefficient of thermal expansion close to silicon and an copper or copper alloy are used for portions other than the irish portion. 청구범위 제 1 항에 있었서, 철계합금은 42알로이(42% Ni), 50알로이(50% Ni)인 것을 특징으로 하는 수지밀봉반도체장치용 리드프레임.The lead frame for a resin sealing semiconductor device according to claim 1, wherein the iron alloy is 42 alloy (42% Ni) or 50 alloy (50% Ni).
KR1019860008835A 1985-12-09 1986-10-22 Leadframe for semiconductor device KR900002884B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60277295A JPS62136059A (en) 1985-12-09 1985-12-09 Lead frame for resin sealed semiconductor device
JP60-277295 1985-12-09

Publications (2)

Publication Number Publication Date
KR870006648A KR870006648A (en) 1987-07-13
KR900002884B1 true KR900002884B1 (en) 1990-05-01

Family

ID=17581543

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860008835A KR900002884B1 (en) 1985-12-09 1986-10-22 Leadframe for semiconductor device

Country Status (2)

Country Link
JP (1) JPS62136059A (en)
KR (1) KR900002884B1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0735403Y2 (en) * 1987-09-08 1995-08-09 ソニー株式会社 Lead frame
JP2754675B2 (en) * 1989-03-08 1998-05-20 三菱電機株式会社 Lead frame for semiconductor device, method of manufacturing the same, and semiconductor device
DE69231290D1 (en) * 1991-12-27 2000-08-31 Fujitsu Ltd Semiconductor device and method for its manufacture
US5681663A (en) * 1995-06-09 1997-10-28 Ford Motor Company Heatspreader carrier strip
JP5089184B2 (en) 2007-01-30 2012-12-05 ローム株式会社 Resin-sealed semiconductor device and manufacturing method thereof
JP2020094933A (en) * 2018-12-13 2020-06-18 日立オートモティブシステムズ株式会社 Thermal flowmeter

Also Published As

Publication number Publication date
KR870006648A (en) 1987-07-13
JPS62136059A (en) 1987-06-19

Similar Documents

Publication Publication Date Title
US4943843A (en) Semiconductor device
US6281566B1 (en) Plastic package for electronic devices
US4107727A (en) Resin sealed semiconductor device
EP0366386A2 (en) Flagless semiconductor package
JPH02114658A (en) Semiconductor device
KR900002884B1 (en) Leadframe for semiconductor device
US5883424A (en) Lead frame for hollow plastic package
KR960002775A (en) Resin-sealed semiconductor devices
JP3186729B2 (en) Semiconductor device
JPH10256432A (en) Resin-sealing type semiconductor package
JPH046860A (en) Semiconductor device
JPS63174347A (en) Lead frame
JPS6066842A (en) Semiconductor device
JPH0333068Y2 (en)
KR0119759Y1 (en) Bottom Leaded Semiconductor Package
JPS5812736B2 (en) hand clasp
KR940016705A (en) Semiconductor device
JPH0321092B2 (en)
JPH04176194A (en) Heat dissipating member for electronic component package
JPH03227535A (en) Semiconductor device
JPH03265161A (en) Resin-sealed semiconductor device
JPS6190459A (en) Package of solid-state image pickup element
JPH04196471A (en) Semiconductor device
JPH0357252A (en) Resin-sealed semiconductor device
JPH06196596A (en) Semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060502

Year of fee payment: 17

EXPY Expiration of term