JPH046860A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH046860A JPH046860A JP2109609A JP10960990A JPH046860A JP H046860 A JPH046860 A JP H046860A JP 2109609 A JP2109609 A JP 2109609A JP 10960990 A JP10960990 A JP 10960990A JP H046860 A JPH046860 A JP H046860A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- thermal conductivity
- die pad
- resin
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 229920005989 resin Polymers 0.000 claims abstract description 14
- 239000011347 resin Substances 0.000 claims abstract description 14
- 239000000463 material Substances 0.000 claims abstract description 12
- 238000007789 sealing Methods 0.000 abstract description 9
- 229920002050 silicone resin Polymers 0.000 abstract description 2
- 230000017525 heat dissipation Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は半導体素子を樹脂封止した半導体装置に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor element is sealed with resin.
第４図は従来の半導体装置を示す断面図で、図において
、（１１は半導体素子、（２）は半導体素子（１）を固
定するダイパッド、（３）は半導体素子（１）をダイパ
ッド（２）に接着するはんだなとの接着層、（４）は半
導体装置（１）を外部回路と電気的機械的に接続するリ
ード、（５）は半導体素子（１１とリード（４）を電気
的に接続するＡｕ線、（６）は符号（１） −（５）の
部品をリード（４）の端部か外部に露出するようにして
封止する封止樹脂、（７）は半導体素子（１）がダイパ
ッド（２）に搭載されている側の封止樹脂（６）表面に
取付けられたヒートシンク、（８）はリード（４）を接
続する基板である。FIG. 4 is a cross-sectional view showing a conventional semiconductor device. ), (4) is a lead that electrically and mechanically connects the semiconductor device (1) to an external circuit, and (5) is an adhesive layer that electrically connects the semiconductor element (11 and lead (4)). Au wires to be connected, (6) a sealing resin that seals the components (1) to (5) so that the ends of the leads (4) are exposed to the outside, and (7) a semiconductor element (1). ) is a heat sink attached to the surface of the sealing resin (6) on the side mounted on the die pad (2), and (8) is a substrate to which the leads (4) are connected.
次に動作について説明する。半導体素子（１）が作動す
ることにより発熱し、その熱は封止樹脂（６）を通して
ヒートシンク（７）に伝わり空気中に放熱される。Next, the operation will be explained. When the semiconductor element (1) operates, heat is generated, and the heat is transmitted to the heat sink (7) through the sealing resin (6) and radiated into the air.
従来の半導体装置は以上のように構成されていたので、
半導体素子で発生した熱は、熱伝導性の悪い封止樹脂を
通らなければヒートシンクに伝わらず、また、熱はダイ
パッドやリードなとのり一トフレームを通しても放熱さ
れるが、半導体素子との熱膨張係数を合わせるため、熱
伝導性の悪い４２アロイなとを使用する場合があるので
、放熱効率か悪く、また、ヒートシンクを外付けしてい
るので、占有体積が大きくなるなとの問題があった。Since conventional semiconductor devices were configured as described above,
The heat generated by the semiconductor element cannot be transferred to the heat sink unless it passes through the sealing resin, which has poor thermal conductivity. Heat is also radiated through die pads, leads, and frames, but the heat generated by the semiconductor element does not reach the heat sink. In order to match the expansion coefficient, 42 alloy, which has poor thermal conductivity, is sometimes used, which results in poor heat dissipation efficiency, and since the heat sink is externally attached, there is a problem that the occupied volume becomes large. Ta.
この発明は上記のような問題点を解消するためになされ
たもので、効率よく放熱できるとともに、小型化かでき
る半導体装置を得ることを目的とする。This invention was made to solve the above-mentioned problems, and aims to provide a semiconductor device that can efficiently dissipate heat and can be miniaturized.
この発明に係る半導体装置は、半導体素子を固定するダ
イパッドに貫通口又は凹部を設け、この凹部に高熱伝導
特性を有する材料の凸部をはめ込んで樹脂封止をしたも
のである。In the semiconductor device according to the present invention, a through hole or a recess is provided in a die pad for fixing a semiconductor element, and a protrusion made of a material having high thermal conductivity is fitted into the recess and sealed with a resin.
この発明における半導体装置は、半導体素子か固定され
ているダイパッドは、貫通口又は凹部か設けられている
ため、高熱伝導率を有する材料を半導体素子に密着又は
近接して設置てき、封止樹脂、リードフレーム材料の影
響を受けることなく、効率の良い放熱ができ、また、高
熱伝導率を有する材料を一体て樹脂封止したのて小型化
かてきる。In the semiconductor device of the present invention, since the die pad to which the semiconductor element is fixed is provided with a through hole or a recess, a material having high thermal conductivity is placed in close contact with or close to the semiconductor element, and a sealing resin, Efficient heat dissipation is possible without being affected by the lead frame material, and miniaturization is possible because the material with high thermal conductivity is integrally sealed with resin.
以下、この発明の一実施例を図について説明する。第１
図において、（１）は半導体素子、（２）は半導体素子
（１）を固定するダイパッド、（３）は半導体素子（１
）をダイパッド（２）に接着するはんたなとの接着層、
（４）は外部回路と電気的機械的に接続するリート、（
５）は半導体素子（１）とリート（４）とを電気的に接
続するＡｕ線で、リード（４）は半導体素子（１）かＡ
ｕ線（５）でリート（４）と接続されている面倒に折り
曲げられている。（２１）はダイパッド（２）に設けら
れたダイパッド貫通口、（７）は高熱伝導特性を有する
材料で作られたヒートシンクで、ダイパッド貫通口（２
１）にはめ込まれる凸部を有する。（９）はヒートシン
ク（７）のダイパッド貫通口（２１）にはめ込まれた凸
部を半導体素子（１）の裏面に接着させるＡｇペースト
、シリコーン樹脂なとの緩衝層で、半導体素子（１）と
ヒートシンク（７）のすき間を埋めて密着性を高め、熱
伝導性を高める。また、半導体素子（１）とヒートシン
ク（ア）の熱膨張の差を吸収するという働きもする。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) is the semiconductor element, (2) is the die pad that fixes the semiconductor element (1), and (3) is the semiconductor element (1).
) to the die pad (2),
(4) is a LEET that electrically and mechanically connects to an external circuit; (
5) is an Au wire that electrically connects the semiconductor element (1) and the lead (4), and the lead (4) is connected to the semiconductor element (1) or the lead (4).
It is connected to the leet (4) by the U-line (5) and is bent in a complicated manner. (21) is a die pad through hole provided in the die pad (2), and (7) is a heat sink made of a material with high thermal conductivity.
1) It has a convex part that is fitted into the body. (9) is a buffer layer made of Ag paste or silicone resin that adheres the protrusion fitted into the die pad through hole (21) of the heat sink (7) to the back surface of the semiconductor element (1). Fill the gap in the heat sink (7) to improve adhesion and improve thermal conductivity. It also functions to absorb the difference in thermal expansion between the semiconductor element (1) and the heat sink (A).
（６）は上記符号（１１〜（５］、（７１（９）の部品
をリード（４）及びヒートシンク（７）の一部が外部に
露出するように封止する封止樹脂である。(6) is a sealing resin that seals the components (11 to (5), (71) and (9)) so that a part of the lead (4) and the heat sink (7) are exposed to the outside.
次に動作について説明する。半導体素子（１）か動作す
ることにより発生した熱は、緩衝層（８）を通りヒート
シンク（７）に伝わり外部に放熱される。Next, the operation will be explained. Heat generated by the operation of the semiconductor element (1) passes through the buffer layer (8), is transmitted to the heat sink (7), and is radiated to the outside.
なお、上記実施例ではリード（４）を逆ベントしている
か従来とうりダイパッド（２）の半導体素子（１）が搭
載されている側の逆側に曲げてもよく、その場合ヒート
シンク（７）は基板（８）に接続し、基板（８）に放熱
することになる。In the above embodiment, the leads (4) may be reverse bent or may be bent to the side opposite to the side on which the semiconductor element (1) of the die pad (2) is mounted, in which case the heat sink (7) is connected to the substrate (8) and radiates heat to the substrate (8).
第２図はこの発明の他の実施例を示したもので、図にお
いて、ダイパッド（２）にダイパット凹部（２２）を設
け、そこにヒートシンク（７）をはめ込んたものである
。これは、半導体素子（１）のダイパッド（２）への接
着の容易さを考慮しつつ、高い放熱性を得るようにした
ものである。FIG. 2 shows another embodiment of the present invention, in which the die pad (2) is provided with a die pad recess (22), into which a heat sink (7) is fitted. This is designed to obtain high heat dissipation while considering the ease of adhering the semiconductor element (1) to the die pad (2).
第３図はこの発明のさらにもう１つの他の実施例を示し
たもので、ヒートシンク（７）に外付はヒートシンクａ
〔を取付けて、高い放熱性を得るようにしたちのである
。FIG. 3 shows yet another embodiment of the present invention, in which the heat sink (7) has an external heat sink a.
[I installed it to obtain high heat dissipation.
また、上記実施例では外付はヒートシンクα■を設けた
場合を示したが、液冷装置強制空冷なとに適用しても同
様の効果を奏する。Further, in the above embodiment, the external heat sink α■ is provided, but the same effect can be obtained even if it is applied to a liquid cooling device such as forced air cooling.
以上のようにこの発明によれば、半導体装置を半導体素
子か固定されているダイパッドに貫通口又は凹部を設け
、この凹部に高熱伝導特性を有する材料の凸部をはめ込
んた状態て樹脂封止するよにしたので、半導体装置に高
い放熱性を持たせることかでき、また一体化して樹脂封
止したことにより小型化かでき、また半導体素子はダイ
パッドに固定されているので半導体素子に高熱伝導特性
を有する材料強固に固定する必要かないので、熱膨張率
を気にせず熱伝導性の高い材料を選ぶことかてきる。ま
た、ヒートシンクの位置合せが容易になるなとの効果か
ある。As described above, according to the present invention, a semiconductor device is resin-sealed by providing a through hole or a recess in a die pad to which a semiconductor element is fixed, and fitting a protrusion made of a material having high thermal conductivity into the recess. This allows the semiconductor device to have high heat dissipation properties, and since it is integrated and sealed with resin, it can be made smaller. Also, since the semiconductor element is fixed to the die pad, the semiconductor element has high thermal conductivity. Since there is no need to firmly fix a material having a high thermal conductivity, it is possible to select a material with high thermal conductivity without worrying about the coefficient of thermal expansion. It also has the effect of making it easier to align the heat sink.
第１図はこの発明の一実施例である半導体装置の断面図
、第２図、第３図はこの発明の他の実施例を示す半導体
装置の断面図、第４図は従来の半導体装置の断面図であ
る。
図において、（１１半導体素子、（２）ダイパッド、（
３）接着層、（６）封止樹脂、（７）ヒートシンク、（
９）は緩衝層、（２Ｉ）ダイパッド貫通口、（２２）ダ
イパッド凹部を示す。
なお、
図中、
同一符号は同一
または相当部分
を示す。FIG. 1 is a sectional view of a semiconductor device that is an embodiment of the present invention, FIGS. 2 and 3 are sectional views of a semiconductor device that shows other embodiments of the invention, and FIG. 4 is a sectional view of a conventional semiconductor device. FIG. In the figure, (11 semiconductor elements, (2) die pad, (
3) Adhesive layer, (6) Sealing resin, (7) Heat sink, (
9) shows a buffer layer, (2I) a die pad through hole, and (22) a die pad recess. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
伝導特性を有する材料を半導体素子裏面に密着又は近接
した状態で一体化して樹脂封止したことを特徴とする半
導体装置。What is claimed is: 1. A semiconductor device in which a semiconductor element is encapsulated in a resin, characterized in that a material having high thermal conductivity is integrated with the back surface of the semiconductor element in close contact with or in close proximity to the back surface of the semiconductor element and encapsulated in the resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2109609A JPH046860A (en) | 1990-04-24 | 1990-04-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2109609A JPH046860A (en) | 1990-04-24 | 1990-04-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH046860A true JPH046860A (en) | 1992-01-10 |
Family
ID=14514627
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2109609A Pending JPH046860A (en) | 1990-04-24 | 1990-04-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH046860A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0566872A3 (en) * | 1992-04-21 | 1994-05-11 | Motorola Inc | A thermally enhanced semiconductor device and method for making the same |
| US5895966A (en) * | 1995-09-29 | 1999-04-20 | Analog Devices, Inc. | Integrated circuit and supply decoupling capacitor therefor |
| KR100237620B1 (en) * | 1996-06-17 | 2000-01-15 | 김영환 | Heat dispersing semiconductor package |
| EP0698292B1 (en) * | 1994-03-09 | 2001-12-05 | National Semiconductor Corporation | Method of forming a moulded lead frame |
| WO2012023236A1 (en) * | 2010-08-20 | 2012-02-23 | パナソニック株式会社 | Semiconductor device and method for manufacturing same |
-
1990
- 1990-04-24 JP JP2109609A patent/JPH046860A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0566872A3 (en) * | 1992-04-21 | 1994-05-11 | Motorola Inc | A thermally enhanced semiconductor device and method for making the same |
| US5483098A (en) * | 1992-04-21 | 1996-01-09 | Motorola, Inc. | Drop-in heat sink package with window frame flag |
| EP0698292B1 (en) * | 1994-03-09 | 2001-12-05 | National Semiconductor Corporation | Method of forming a moulded lead frame |
| US5895966A (en) * | 1995-09-29 | 1999-04-20 | Analog Devices, Inc. | Integrated circuit and supply decoupling capacitor therefor |
| KR100237620B1 (en) * | 1996-06-17 | 2000-01-15 | 김영환 | Heat dispersing semiconductor package |
| WO2012023236A1 (en) * | 2010-08-20 | 2012-02-23 | パナソニック株式会社 | Semiconductor device and method for manufacturing same |
| JP5412532B2 (en) * | 2010-08-20 | 2014-02-12 | パナソニック株式会社 | Semiconductor device and manufacturing method thereof |
| US8686545B2 (en) | 2010-08-20 | 2014-04-01 | Panasonic Corporation | Semiconductor device and method for manufacturing the same |
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