KR880700973A - 주기억장치의 제어기능분산을 위한 데이타처리시스템 - Google Patents

주기억장치의 제어기능분산을 위한 데이타처리시스템

Info

Publication number
KR880700973A
KR880700973A KR870700883A KR870700883A KR880700973A KR 880700973 A KR880700973 A KR 880700973A KR 870700883 A KR870700883 A KR 870700883A KR 870700883 A KR870700883 A KR 870700883A KR 880700973 A KR880700973 A KR 880700973A
Authority
KR
South Korea
Prior art keywords
data processing
processing system
main memory
control functions
distributing control
Prior art date
Application number
KR870700883A
Other languages
English (en)
Other versions
KR910005379B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR880700973A publication Critical patent/KR880700973A/ko
Application granted granted Critical
Publication of KR910005379B1 publication Critical patent/KR910005379B1/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1615Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement using a concurrent pipeline structrure

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Multi Processors (AREA)
  • Dram (AREA)
KR1019870700883A 1986-01-29 1987-01-29 데이타처리시스템의 주기억장치에서 제어기능분산을 위해 사용되는 메모리보드 KR910005379B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US82368786A 1986-01-29 1986-01-29
US823,687 1986-01-29
PCT/US1987/000185 WO1987004825A1 (en) 1986-01-29 1987-01-29 Apparatus and method for providing distributed control in a main memory unit of a data processing system

Publications (2)

Publication Number Publication Date
KR880700973A true KR880700973A (ko) 1988-04-13
KR910005379B1 KR910005379B1 (ko) 1991-07-29

Family

ID=25239418

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870700883A KR910005379B1 (ko) 1986-01-29 1987-01-29 데이타처리시스템의 주기억장치에서 제어기능분산을 위해 사용되는 메모리보드

Country Status (12)

Country Link
EP (1) EP0288479B1 (ko)
JP (1) JPH01501346A (ko)
KR (1) KR910005379B1 (ko)
CN (1) CN1007186B (ko)
AU (1) AU6931087A (ko)
CA (1) CA1286412C (ko)
DE (1) DE3785191D1 (ko)
ES (1) ES2004078A6 (ko)
IL (1) IL81427A (ko)
IN (1) IN170464B (ko)
MX (1) MX168581B (ko)
WO (1) WO1987004825A1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1324679C (en) * 1989-02-03 1993-11-23 Michael A. Gagliardo Method and means for interfacing a system control unit for a multi-processor system with the system main memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3343140A (en) * 1964-10-27 1967-09-19 Hughes Aircraft Co Banked memory system
DE2537787A1 (de) * 1975-08-25 1977-03-03 Computer Ges Konstanz Modularer arbeitsspeicher fuer eine datenverarbeitungsanlage und verfahren zum durchfuehren von speicherzugriffen an diesem speicher
US4245303A (en) * 1978-10-25 1981-01-13 Digital Equipment Corporation Memory for data processing system with command and data buffering
US4451880A (en) * 1980-10-31 1984-05-29 Honeywell Information Systems Inc. Memory controller with interleaved queuing apparatus
JPS58215777A (ja) * 1982-06-07 1983-12-15 Hitachi Ltd 記憶制御方式

Also Published As

Publication number Publication date
JPH01501346A (ja) 1989-05-11
ES2004078A6 (es) 1988-12-01
IL81427A (en) 1991-06-10
IN170464B (ko) 1992-03-28
CN87102176A (zh) 1987-09-02
EP0288479A1 (en) 1988-11-02
IL81427A0 (en) 1987-08-31
WO1987004825A1 (en) 1987-08-13
CA1286412C (en) 1991-07-16
KR910005379B1 (ko) 1991-07-29
EP0288479B1 (en) 1993-03-31
AU6931087A (en) 1987-08-25
CN1007186B (zh) 1990-03-14
MX168581B (es) 1993-06-01
DE3785191D1 (de) 1993-05-06

Similar Documents

Publication Publication Date Title
KR850006738A (ko) 데이타 처리 시스템
DE3582662D1 (de) Virtuelles datenverarbeitungssystem.
DE3587493D1 (de) Betriebssicheres datenverarbeitungsbussystem.
EP0166268A3 (en) Shared memory access for data processing system
DE68925447D1 (de) Steuerungsverfahren für verteiltes Verarbeitungssystem
DE3782335T2 (de) Speichersteuersystem.
DE3787494T2 (de) Datenübertragungssteuerungssystem.
DE69028362T2 (de) Verteiltes Datenverarbeitungssystem
ATE81220T1 (de) Rechnersystem mit multikanaldirektspeicherzugriffsarbitrierung.
DE3650602D1 (de) Datenverarbeitungssystem
TR22753A (tr) Sismik verilerinin islenmesine mahsus sistem
DE3752060D1 (de) Computergesteuertes entwurfsystem
DE3750702T2 (de) Datenverarbeitungssystem.
DE3482997D1 (de) Vorrichtung zur computerspeicherzugriffssteuerung.
DE3587508D1 (de) Sendedatenverarbeitungssystem.
DE3583903D1 (de) Datenverarbeitungssystem.
KR880702018A (ko) 음향 조작용 제어 시스템
DK129884D0 (da) Datastyresystem
DE3485025D1 (de) Datenverarbeitungssystem.
NO175122C (no) Databehandlingssystem
DE3776598D1 (de) Datenverarbeitungsanlage.
KR880700973A (ko) 주기억장치의 제어기능분산을 위한 데이타처리시스템
NO875041D0 (no) Data-buss system.
DE68928214D1 (de) Dateneingabesystem
DE68929342D1 (de) Dateneingangssystem

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee