KR100937305B1 - 분수분주형 pll에서 과도 응답을 감소시키는 시스템 및방법 - Google Patents
분수분주형 pll에서 과도 응답을 감소시키는 시스템 및방법 Download PDFInfo
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- KR100937305B1 KR100937305B1 KR1020077027584A KR20077027584A KR100937305B1 KR 100937305 B1 KR100937305 B1 KR 100937305B1 KR 1020077027584 A KR1020077027584 A KR 1020077027584A KR 20077027584 A KR20077027584 A KR 20077027584A KR 100937305 B1 KR100937305 B1 KR 100937305B1
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- Prior art keywords
- charge pump
- microcurrent
- pll
- adaptive mode
- adaptive
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- 238000000034 method Methods 0.000 title claims abstract description 16
- 230000004044 response Effects 0.000 title claims abstract description 14
- 230000001052 transient effect Effects 0.000 title claims abstract description 11
- 230000003044 adaptive effect Effects 0.000 claims abstract description 50
- 230000007704 transition Effects 0.000 claims description 8
- 230000006978 adaptation Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
- H03L7/0898—Details of the current generators the source or sink current values being variable
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1072—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the charge pump, e.g. changing the gain
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
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- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
Claims (10)
- 전하 펌프(charge pump)를 포함하는 PLL(phase lock loop)으로서,상기 전하 펌프는,제1 미세(trickle) 전류원에 의해 제1 미세 전류가 부가되기 전에 제1의 미리 결정된 시간 동안 인에이블(enable)되는 적응 모드(adapt mode) 전하 펌프- 제2의 미리 결정된 시간의 종료시에 상기 제1 미세 전류는 턴 오프(turn off)되며, 상기 적응 모드 전하 펌프는 디스에이블(disable)됨 -와,제2 미세 전류원에 의해 제2 미세 전류가 부가되는 정규 모드(normal mode) 전하 펌프를 포함하는 PLL.
- 제1항에 있어서,상기 적응 모드 전하 펌프에 부가되는 상기 제1 미세 전류는 상기 PLL의 위상 고정 시간을 최소화하는 PLL.
- 제1항에 있어서,상기 정규 모드 전하 펌프에 부가되는 상기 제2 미세 전류는 상기 PLL을 선형화하는 PLL.
- 제1항에 있어서,위상 검출기와,상기 전하 펌프에 결합되는 루프 필터와,상기 루프 필터에 결합되는 VCO(voltage controlled oscillator)와,상기 VCO와 상기 위상 검출기 사이에 피드백(feedback)을 제공하는 분주기와,상기 제1의 미리 결정된 시간 동안 상기 적응 모드 전하 펌프에의 상기 제1 미세 전류의 인가를 지연시키기 위한 제1 타이머와,상기 적응 모드 전하 펌프 및 상기 제1 미세 전류를 디스에이블하기 위한, 상기 제2의 미리 결정된 시간을 설정하는 제2 타이머를 더 포함하는 PLL.
- 분수분주형(fractional-N) PLL에서 과도 응답을 최소화하는 방법으로서,동작의 적응 모드와 동작의 정규 모드를 가지는 전하 펌프를 제공하는 단계와,제1 미세 전류원에 의해 적응 모드 전하 펌프에 제1 미세 전류를 부가하는 단계와,정규 모드 전하 펌프를 이용하는 정규 모드 동작으로의 천이를 위하여 미리 결정된 시간 이후에 상기 적응 모드 전하 펌프 및 상기 제1 미세 전류를 디스에이블(disable)하는 단계를 포함하는 과도 응답 최소화 방법.
- 제5항에 있어서,상기 적응 모드 전하 펌프에 제1 미세 전류를 부가하는 상기 단계는 상기 PLL의 고정 시간을 최소화하는 과도 응답 최소화 방법.
- 제5항에 있어서,상기 정규 모드 전하 펌프에는 제2 미세 전류원에 의해 제2 미세 전류가 부가되어 상기 PLL을 선형화하는 과도 응답 최소화 방법.
- 제5항에 있어서,상기 적응 모드 전하 펌프에의 상기 제1 미세 전류의 부가를 지연시켜, 상기 PLL의 고정 시간을 최소화하는 단계를 더 포함하는 과도 응답 최소화 방법.
- 동작의 적응 모드와 동작의 정규 모드를 제공하는 3 상태 전하 펌프를 가지는 합성기를 포함하고,상기 동작의 적응 모드시에, 적응 모드 전하 펌프가 제1의 미리 결정된 시간 동안 인에이블되고, 상기 제1의 미리 결정된 시간의 종료시에 제2의 미리 결정된 시간 동안 제1 미세 전류원에 의해 제1 미세 전류가 부가되며,상기 제2의 미리 결정된 시간의 종료시에, 상기 적응 모드 전하 펌프 및 상기 제1 미세 전류가 디스에이블되고, 상기 동작의 정규 모드가 인에이블되는 PLL.
- 제9항에 있어서,상기 적응 모드 전하 펌프에 부가되는 상기 제1 미세 전류는 상기 PLL의 고정 시간을 최소화하는 PLL.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US11/139,160 | 2005-05-28 | ||
US11/139,160 US7170322B2 (en) | 2005-05-28 | 2005-05-28 | System and method for reducing transient response in a fractional N phase lock loop |
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KR20080007264A KR20080007264A (ko) | 2008-01-17 |
KR100937305B1 true KR100937305B1 (ko) | 2010-01-18 |
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KR1020077027584A KR100937305B1 (ko) | 2005-05-28 | 2006-05-12 | 분수분주형 pll에서 과도 응답을 감소시키는 시스템 및방법 |
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US (1) | US7170322B2 (ko) |
EP (1) | EP1891737B1 (ko) |
KR (1) | KR100937305B1 (ko) |
CN (2) | CN104022779A (ko) |
AU (1) | AU2006252880B2 (ko) |
WO (1) | WO2006130333A2 (ko) |
Families Citing this family (8)
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US7170322B2 (en) * | 2005-05-28 | 2007-01-30 | Motorola, Inc. | System and method for reducing transient response in a fractional N phase lock loop |
US8954773B2 (en) * | 2005-10-21 | 2015-02-10 | Freescale Semiconductor, Inc. | Electronic device and method for controlling current of a processor load by slewing clock frequency |
JP4845723B2 (ja) * | 2006-12-27 | 2011-12-28 | 富士フイルム株式会社 | レンズ駆動システム |
US7449929B2 (en) * | 2007-02-08 | 2008-11-11 | Motorola, Inc | Automatic bias adjustment for phase-locked loop charge pump |
JP2011151473A (ja) * | 2010-01-19 | 2011-08-04 | Panasonic Corp | 角度変調器、送信装置及び無線通信装置 |
CN102158221B (zh) * | 2011-01-26 | 2016-01-27 | 上海华虹宏力半导体制造有限公司 | 锁相环及其快速锁定装置 |
US10027333B2 (en) * | 2016-11-18 | 2018-07-17 | Stmicroelectronics International N.V. | Phase locked loops having decoupled integral and proportional paths |
US10236896B1 (en) | 2018-03-12 | 2019-03-19 | Motorola Solutions, Inc. | Reducing transient response in a phase-locked loop circuit |
Citations (2)
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US6278333B1 (en) * | 2000-02-29 | 2001-08-21 | Motorola, Inc. | Phase lock loop with dual state charge pump and method of operating the same |
US6747494B2 (en) * | 2002-02-15 | 2004-06-08 | Motorola, Inc. | PLL arrangement, charge pump, method and mobile transceiver |
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US5180993A (en) | 1990-01-15 | 1993-01-19 | Telefonaktiebolaget L M Ericsson | Method and arrangement for frequency synthesis |
US5699387A (en) * | 1993-06-23 | 1997-12-16 | Ati Technologies Inc. | Phase offset cancellation technique for reducing low frequency jitters |
JPH11274920A (ja) * | 1998-03-26 | 1999-10-08 | Nec Corp | Pllのチャージポンプ回路 |
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US20040066220A1 (en) * | 2002-10-03 | 2004-04-08 | Chun-Chieh Chen | High-speed high-current programmable charge-pump circuit |
US6710666B1 (en) * | 2002-11-07 | 2004-03-23 | Mediatek Inc. | Charge pump structure for reducing capacitance in loop filter of a phase locked loop |
US7170322B2 (en) * | 2005-05-28 | 2007-01-30 | Motorola, Inc. | System and method for reducing transient response in a fractional N phase lock loop |
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- 2006-05-12 KR KR1020077027584A patent/KR100937305B1/ko active IP Right Grant
- 2006-05-12 CN CN201410126359.3A patent/CN104022779A/zh active Pending
- 2006-05-12 EP EP06770360.3A patent/EP1891737B1/en active Active
- 2006-05-12 CN CNA2006800182183A patent/CN101258680A/zh active Pending
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6278333B1 (en) * | 2000-02-29 | 2001-08-21 | Motorola, Inc. | Phase lock loop with dual state charge pump and method of operating the same |
US6747494B2 (en) * | 2002-02-15 | 2004-06-08 | Motorola, Inc. | PLL arrangement, charge pump, method and mobile transceiver |
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Publication number | Publication date |
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WO2006130333A3 (en) | 2008-05-08 |
AU2006252880B2 (en) | 2009-09-03 |
EP1891737A2 (en) | 2008-02-27 |
KR20080007264A (ko) | 2008-01-17 |
EP1891737A4 (en) | 2012-02-29 |
AU2006252880A1 (en) | 2006-12-07 |
US7170322B2 (en) | 2007-01-30 |
CN101258680A (zh) | 2008-09-03 |
EP1891737B1 (en) | 2014-03-12 |
CN104022779A (zh) | 2014-09-03 |
WO2006130333A2 (en) | 2006-12-07 |
WO2006130333B1 (en) | 2008-06-26 |
US20060267645A1 (en) | 2006-11-30 |
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