KR100850221B1 - Manufacturing process of passivity element of insertion type - Google Patents

Manufacturing process of passivity element of insertion type Download PDF

Info

Publication number
KR100850221B1
KR100850221B1 KR1020070001204A KR20070001204A KR100850221B1 KR 100850221 B1 KR100850221 B1 KR 100850221B1 KR 1020070001204 A KR1020070001204 A KR 1020070001204A KR 20070001204 A KR20070001204 A KR 20070001204A KR 100850221 B1 KR100850221 B1 KR 100850221B1
Authority
KR
South Korea
Prior art keywords
layer
copper foil
patterned photoresist
photoresist layer
copper
Prior art date
Application number
KR1020070001204A
Other languages
Korean (ko)
Other versions
KR20080036491A (en
Inventor
한-친 시흐
Original Assignee
트리포드 테크놀로지 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 트리포드 테크놀로지 코포레이션 filed Critical 트리포드 테크놀로지 코포레이션
Publication of KR20080036491A publication Critical patent/KR20080036491A/en
Application granted granted Critical
Publication of KR100850221B1 publication Critical patent/KR100850221B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0317—Thin film conductor layer; Thin film passive component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0568—Resist used for applying paste, ink or powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1453—Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

본 발명의 감입식 피동부품의 제조방법은 주로 순서에 따라 크기가 다른 포토레지스트층 2개를 형성하여, 기판 위에 형성된 동박층과 동 전기도금층이 피차 고저낙차를 구비한 계단상 접속패드로 에칭됨으로써, 종래 기술에 비해 균일성이 부족한 동 전기도금층에 전기저항부품이 형성됨을 피하고, 본 발명은 계단상 접속패드 위에(특히 매끄럽고 균일성이 우수한 동박층 위에) 피동부품이 형성되며, 형성된 피동부품의 균일성이 상대적으로 향상된다.The manufacturing method of the immersed driven component of the present invention mainly forms two photoresist layers having different sizes according to the order, and the copper foil layer and the copper electroplating layer formed on the substrate are etched with stepped connection pads provided with high and low drop-off. To avoid the formation of electrical resistance components in copper electroplating layers which lack uniformity compared to the prior art, the present invention provides a passive component formed on a stepped connection pad (especially on a smooth and uniform copper foil layer). Uniformity is relatively improved.

Description

감입식 피동부품의 제조방법{MANUFACTURING PROCESS OF PASSIVITY ELEMENT OF INSERTION TYPE}Manufacturing method of the immersion driven component {MANUFACTURING PROCESS OF PASSIVITY ELEMENT OF INSERTION TYPE}

도 1a 내지 도 1e는 종래의 감입식 전기저항부품의 제조방법을 보인 공정도.1a to 1e is a process diagram showing a method of manufacturing a conventional resistive electrical resistance component.

도 2a 내지 도 2g는 본 발명의 감입식 전기저항부품의 제조방법을 보인 공정도.Figure 2a to 2g is a process diagram showing a method of manufacturing a resistive electrical resistance component of the present invention.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for main parts of the drawings>

10 : 기판 10: substrate

12 : 동박층12: copper foil layer

13 : 한 쌍의 접속패드13: A pair of connection pad

8, 14, 18 : 도안화 포토레지스트층8, 14, 18: patterned photoresist layer

6, 16 : 동 전기도금층6, 16: copper electroplating layer

2, 20 : 피동부품 22 : 접촉부2, 20: driven part 22: contact part

본 발명은 일종의 피동부품의 제조방법에 관한 것이며, 특히 감입식 피동부품의 제조방법에 관한 것이다.TECHNICAL FIELD The present invention relates to a method of manufacturing a kind of driven component, and more particularly, to a method of manufacturing a sensitive driven component.

내부 감입식 제조공정은 일종의 특수 유전체, 저항재료, 유기유리섬유기판 등의 적층 구조물을 이용하여 피동부품을 설계하고, 응용시 전기회로의 특성과 필요에 따라 고저 유전계수와 전기저항기판재료를 채용하여 콘덴서, 전기저항 또는 고주파 전송선의 내부매장의 설계에 응용된다.The internal immersion manufacturing process designs the driven parts using a laminated structure such as a kind of special dielectric, resistance material, and organic glass fiber substrate, and adopts high and low dielectric constant and electric resistance substrate material according to the characteristics and needs of the electric circuit when applied. It is applied to the design of internal storage of capacitor, electric resistance or high frequency transmission line.

도 1a 내지 도 1e는 종래의 감입식 피동부품의 제조방법을 보인 공정도이다.1A to 1E are process diagrams showing a method for manufacturing a conventional immersion driven component.

도 1a 내지 도 1e를 참조하면, 먼저, 도 1a와 같이 동박층(12)을 가진 기판(10) 위에, 동 전기도금층(6)을 전기 도금한 다음, 도 1b와 같이 동 전기도금층(6) 위에 포토레지스트층(8)이 형성되고, 포토레지스트층(8)의 일부가 예정된 저항부품(예컨대 전기저항)과 접촉할 한 쌍의 접속패드 위를 커버한다. 도안화 포토레지스트층(8)의 형성은 주로 노광, 현상 등의 수단을 이용하여 완성한 것이다. 이어서, 도 1c에 도시된 바와 같이, 도안화 포토레지스트층(8)이 커버되지 않은 일부 동박층(12)과 동 전기도금층(6)을 기판(10)이 노출될 때까지 에칭(etching)하여, 요형 홈이 형성되게 한다. 도 1d에 도시된 바와 같이 도안화 포토레지스트층(8)을 제거한 후, 도 1e와 같이 에칭된 요형 홈과 요형 홈 근처의 동 전기도금층(6) 위에 전기저항부품(2)(즉, 저항 페이스트)가 도포되어 요형 홈에 저항부품(2)이 형성되며, 상기 저항부품(2)은 동 전기도금층(6)에 한 쌍의 접촉부가 연장 돌출되어, 상기 저항부품(2)의 한 쌍의 접촉부(돌출부)는 상기 한 쌍의 접속패드 상방에 위치하며, 또한 이 한 쌍의 접속패드와 전기적으로 연결된다.
그러나, 이러한 제조방법은 도금의 적절한 제어가 쉽지 않아 동 전기도금층(6)의 표면(특히 상기 한 쌍의 접속패드)위에 항상 많은 과립상(顆粒狀)이 형성되고, 전기저항부품의 도포시 저항부품(2)의 두께의 균일화를 이루지 못하여, 신뢰성이 문제가 된다. 그 결과 근본이 불균일한 동 도금층(6) 위에 정밀한 전기저항치를 인쇄하는 것은, 전기저항치의 공차가 과다한 결과를 초래할 수밖에 없다.Referring to FIGS. 1A to 1E, first, the copper electroplating layer 6 is electroplated on the substrate 10 having the copper foil layer 12 as shown in FIG. 1A, and then the copper electroplating layer 6 as shown in FIG. 1B. A photoresist layer 8 is formed thereon, and a portion of the photoresist layer 8 covers the pair of connection pads that will come into contact with a predetermined resistance component (for example, electrical resistance). Formation of the patterned photoresist layer 8 is completed mainly using means, such as exposure and image development. Subsequently, as shown in FIG. 1C, some of the copper foil layer 12 and the copper electroplating layer 6 which are not covered by the patterned photoresist layer 8 are etched until the substrate 10 is exposed. , Concave groove is formed. After removing the patterned photoresist layer 8 as shown in FIG. 1D, the electrical resistive component 2 (i.e., resist paste) is formed on the copper electroplating layer 6 near the recessed groove and the recessed groove as shown in FIG. 1E. ) Is coated to form a resistance part 2 in the concave groove, and the resistance part 2 has a pair of contact portions extending from and protrudes from the copper electroplating layer 6 to thereby provide a pair of contact parts of the resistance part 2. The protrusions are located above the pair of connection pads and are electrically connected to the pair of connection pads.
However, such a manufacturing method is not easy to properly control the plating, so that many granules are always formed on the surface of the copper electroplating layer 6 (particularly, the pair of connection pads). Since the thickness of the component 2 is not equalized, reliability becomes a problem. As a result, printing a precise electric resistance value on the copper plating layer 6 whose origin is nonuniform will result in excessive tolerance of electric resistance value.

삭제delete

본 발명의 주요목적은 계단상 접속패드 위에(특히 매끄럽고 균일성이 우수한 동박층 위에) 전기저항부품이 형성되고, 상대적으로 상기 전기저항부품의 두께의 균일성을 향상시키며, 전기저항치의 정밀성을 향상시킬 수 있는 일종의 감입식 피동부품의 제조방법을 제공하는 것이다.The main object of the present invention is to form an electrical resistance component on a stepped connection pad (especially on a smooth and uniform copper foil layer), to relatively improve the uniformity of the thickness of the electrical resistance component, and to improve the precision of the electrical resistance value. It is to provide a method for manufacturing a kind of the immersion driven component that can be made.

상기 목적을 달성하기 위한 본 발명은, 감입식 피동부품의 제조방법으로서 주로 순서에 따라 크기가 다른 포토레지스트층 2개를 형성하여, 기판 위에 형성된 동박층과 동 전기도금층이 피차 고저낙차를 구비한 계단상 접속패드로 에칭되게 하고, 또한 종래 기술과 같이 균일성이 부족한 동 전기도금층에 저항재료가 형성되는 것을 피하고, 계단상 접속패드 위에(특히 매끄럽고 균일성이 우수한 동박층 위에) 피동부품(전기저항부품)이 형성되게 하여, 피동부품의 균일성이 상대적으로 향상되게 한 것을 특징으로 한다.In order to achieve the above object, the present invention provides a method for manufacturing a sensitized driven component, in which two photoresist layers of different sizes are mainly formed in order, and the copper foil layer and the copper electroplating layer formed on the substrate are provided with a high drop. Etched with a stepped connection pad, and avoiding the formation of a resistive material in the copper electroplating layer which lacks uniformity as in the prior art, and on a stepped connection pad (especially on a smooth and uniform copper foil layer) Resistance parts) are formed, so that the uniformity of the driven parts is relatively improved.

이하, 본 발명의 장점을 보다 용이하게 이해를 할 수 있도록 하기 위해 첨부된 도면을 참조하여 본 발명에 대하여 상세히 설명한다. Hereinafter, the present invention will be described in detail with reference to the accompanying drawings so that the advantages of the present invention can be more easily understood.

도 2a 내지 도 2g는 본 발명의 감입식 피동부품의 제조방법을 보인 공정도이다.2A to 2G are process diagrams showing a method for manufacturing a sensitized driven component of the present invention.

본 발명의 감입식 피동부품의 제조방법은 주로 순서에 따라 크기가 다른 포토레지스트층(14)(18) 2개를 형성하여, 기판(10) 위에 형성된 동박층과 동 전기도금층이 피차 고저낙차를 구비한 계단상 접속패드로 에칭되게 하고(도 2e 참조), 또한 종래 기술과 같이 균일성이 부족한 동 전기도금층에 저항재료(20)가 형성되는 것을 피하고, 계단상 접속패드 위에(특히 매끄럽고 균일성이 우수한 동박층(12) 위에) 피동부품(전기저항부품)(20)이 형성되게 하여(도 2g 참조), 피동부품의 두께의 균일성이 상대적으로 향상되게 할 수 있다.In the manufacturing method of the immersed driven component of the present invention, two photoresist layers 14 and 18 having different sizes are formed in order, so that the copper foil layer formed on the substrate 10 and the copper electroplating layer are subjected to high and low dropping. Etched with a stepped connection pad provided (see FIG. 2E), and avoiding the formation of the resistive material 20 in the copper electroplating layer which lacks uniformity as in the prior art, and on the stepped connection pad (especially smooth and uniform) The driven component (electrical resistance component) 20 is formed on this excellent copper foil layer 12 (see FIG. 2G), whereby the uniformity of the thickness of the driven component can be relatively improved.

구체적으로, 먼저 도 2a를 참조하면, 본 발명의 제조방법은 동박층(12)을 가진 기판(10)을 제공하고, 도 2b와 같이 동박층(12) 위에 제1도안화 포토레지스트층(14)을 형성하고, 제1도안화 포토레지스트층(14)의 일부분이 동박층(12)의 피동부품으로서 접속할 한 쌍의 접속패드(13)를 커버한다.Specifically, referring first to FIG. 2A, the manufacturing method of the present invention provides a substrate 10 having a copper foil layer 12, and the first draft photoresist layer 14 on the copper foil layer 12 as shown in FIG. 2B. ), And a part of the first patterned photoresist layer 14 covers a pair of connection pads 13 to be connected as a driven component of the copper foil layer 12.

다음에 제1도안화 포토레지스트층(14)이 커버하지 않은 동박층(12) 위에 도 2c와 같이 동 전기도금층(16)을 도금하고, 이어서, 제1도안화 포토레지스트층(14)과 일부 동 전기동금층(16) 위에 제2도안화 포토레지스트층(18)을 형성하여 제1도안화 포토레지스트층(14) 전체와 동 전기동금층(16)의 일부를 커버한다. 하지만, 상기 한 쌍의 접속패드(13) 사이의 동 전기도금층(16)(잠시 후 에칭으로 제거되고, 또한 피동부품이 형성되는 곳)은 커버하지 않는다(도 2d 참조).Next, the copper electroplating layer 16 is plated on the copper foil layer 12 which is not covered by the first patterning photoresist layer 14 as shown in FIG. 2C, and then partially with the first patterning photoresist layer 14. A second patterned photoresist layer 18 is formed on the copper electrolytic layer 16 to cover the entire first patterned photoresist layer 14 and a part of the copper electroplated layer 16. However, it does not cover the copper electroplating layer 16 between the pair of connection pads 13 (where it is removed by etching after a while and the driven component is formed) (see FIG. 2D).

도 2e를 참조하는 바와 같이, 제2도안화 포토레지스트층(18)을 이용하여, 제2도안화 포토레지스트층(18)이 커버하지 않은 동 전기도금층(16)과 동박층(12)을 기판(10)이 노출될 때까지 제거한다.As shown in FIG. 2E, the copper electroplating layer 16 and the copper foil layer 12 which are not covered by the second design photoresist layer 18 are substrates using the second design photoresist layer 18. Remove until (10) is exposed.

도 2f를 참조하면, 먼저 제1도안화 포토레지스트층(14)과 제2도안화 포토레지스트층(18)을 제거한 후, 동박층(12)과 동 전기도금층(16)을 재차 노출되게 한다. 기판(10), 동박층(12), 동 전기도금층(16) 사이에는 서로 고저낙차가 있으므로, 접속패드(13)는 계단상 접속패드라고도 한다.Referring to FIG. 2F, first, the first patterned photoresist layer 14 and the second patterned photoresist layer 18 are removed, and then the copper foil layer 12 and the copper electroplating layer 16 are exposed again. Since the board | substrate 10, the copper foil layer 12, and the copper electroplating layer 16 have high and low drop mutually, the connection pad 13 is also called a stepped connection pad.

마지막으로, 도 2g를 참조하면, 상기 계단상 접속패드(13) 및 기판(10) 위에 저항페이스트를 도포하여 피동부품(20)이 형성되고, 상기 피동부품(20)에서 계단상 접속패드(13) 상방에 위치한 한 쌍의 접촉부(22)가 연장되어 나오며, 피동부품(20)의 접촉부(22)와 접속패드(13)는 전기적으로 연결된다.Lastly, referring to FIG. 2G, a driven part 20 is formed by applying a resistance paste on the stepped connection pad 13 and the substrate 10, and the stepped connection pad 13 is formed on the driven part 20. A pair of contact portions 22 positioned upwards are extended, and the contact portions 22 and the connection pads 13 of the driven component 20 are electrically connected to each other.

상기 내용을 종합하면, 본 발명의 감입식 피동부품의 제조방법을 이용하여 제조한 감입식 피동부품(20)은 매끄러움과 균일성이 부족한 동 전기도금층(16) 위에 형성되지 않고, 상대적으로 비교적 매끄럽고 균일한 동박층(12) 및 기판(10) 위에 형성됨으로써 피동부품(20)의 두께는 종래의 기술보다 균일하고, 전기저항치의 정확성도 향상된다. 상기 원인으로 본 발명의 감입식 피동부품은 양호한 신뢰도가 있는 동시에 정밀한 전기저항치를 인쇄할 때, 이 방법에 의해 저항 공차 수치도 비교적 낮아진다.
본 발명의 감입식 피동부품의 제조방법에 의하면 감입식 전기저항을 제조하는 것 외에 감입식 콘덴서 및 감입식 인덕턴스의 제조에도 적용되고, 본 발명의 특징은 매끄럽고 균일한 평탄면을 제공하고, 감입식 피동부품이 상기 평탄면에 형성되게 하여, 감입식 피동부품의 균일성과 정확성을 향상시키는 것이다.In summary, the sensitized driven part 20 manufactured by using the method for manufacturing the sensitized driven part of the present invention is not formed on the copper electroplating layer 16 lacking smoothness and uniformity, and is relatively relatively smooth. By being formed on the uniform copper foil layer 12 and the board | substrate 10, the thickness of the driven component 20 is more uniform than the conventional technique, and the accuracy of an electrical resistance value also improves. For this reason, when the immersed driven component of the present invention has good reliability and at the same time prints an accurate electric resistance value, the resistance tolerance value is also relatively low by this method.
According to the method for manufacturing a sensitized driven component of the present invention, in addition to producing a sensitized electric resistance, it is applied to the manufacture of a sensitized capacitor and a sensitized inductance, and the features of the present invention provide a smooth and uniform flat surface. The driven parts are formed on the flat surface to improve the uniformity and accuracy of the immersed driven parts.

이상의 설명과 같이 본 발명의 감입식 피동부품의 제조방법에 의하면, 피동부품에 불 균일한 동 전기도금층이 형성되지 않으므로, 기판 위에 상대적으로 비교적 매끄럽고 균일한 동박층이 형성되고, 이에 따라 피동부품의 균일성도 향상되며, 상기 원인으로 본 발명의 감입식 피동부품은 양호한 신뢰도가 있는 동시에 정밀한 전기저항치를 인쇄할 때, 저항치의 변이를 감소시킬 수 있는 효과가 있다.As described above, according to the manufacturing method of the immersed driven component of the present invention, since a non-uniform copper electroplating layer is not formed on the driven component, a relatively smooth and uniform copper foil layer is formed on the substrate, thereby Uniformity is also improved, and as a result of the above, the immersed driven component of the present invention has a good reliability and at the same time has an effect of reducing the variation of the resistance value when printing a precise electrical resistance value.

이상의 실시예는 본 발명의 특징을 보이기 위한 최선의 일 실시 형태만을 설명한 것일 뿐, 본 발명에 대해 어떤 형식상의 제한을 하고자 하는 것은 아니므로, 본 발명과 동일한 목적 하에서 본 발명에 대한 다양한 수정과 변경을 실시할 수 있으며, 그러한 변경은 모두 본 발명의 보호범위에 포함된다.The above embodiments are only illustrative of the best mode for showing the features of the present invention, and are not intended to limit any form of the present invention, and various modifications and changes to the present invention under the same purpose as the present invention. It may be carried out, all such changes are included in the scope of protection of the present invention.

Claims (4)

일종의 감입식 피동부품의 제조방법에 있어서,In the method of manufacturing a kind of immersed driven component, 동박층을 구비한 기판이 제공되고;A substrate having a copper foil layer is provided; 상기 동박층 위에 제1도안화 포토레지스트층이 형성되되, 상기 제1도안화 포토레지스트층의 부분이 동박층에서 피동부품과 접촉하는 한 쌍의 접속패드를 커버하고;A first patterned photoresist layer is formed on the copper foil layer, wherein a portion of the first patterned photoresist layer covers a pair of connection pads in contact with the driven component in the copper foil layer; 상기 제1도안화 포토레지스트층이 커버하지 않은 동박층 부분에 동 전기도금층이 도금되고;A copper electroplating layer is plated on a portion of the copper foil layer not covered by the first patterned photoresist layer; 상기 제1도안화 포토레지스트층과 상기 일부 동 전기도금층 위에 제2도안화 포토레지스트층이 형성되되, 상기 제2도안화 포토레지스트층이 상기 한 쌍의 접속패드 사이의 동 전기도금층을 제외한 제1도안화 포토레지스트층과 일부 동 전기도금층을 커버하고;A second patterned photoresist layer is formed on the first patterned photoresist layer and the partial copper electroplating layer, and the second patterned photoresist layer is the first except for the copper electroplating layer between the pair of connection pads. Covering the patterned photoresist layer and some copper electroplating layers; 상기 제2도안화 포토레지스트층이 커버하지 않은 상기 동 전기도금층과 상기 동박층을 상기 기판이 노출될 때까지 제거하고;Removing the copper electroplating layer and the copper foil layer not covered by the second design photoresist layer until the substrate is exposed; 상기 제1도안화 포토레지스트층과 제2도안화 포토레지스트층을 제거하여, 상기 동박층과 상기 동 전기도금층을 노출하되, 상기 동박층과 상기 동 전기도금층 사이에 고저낙차를 구비한 계단상 접속패드가 노출되게 하며;Removing the first patterned photoresist layer and the second patterned photoresist layer to expose the copper foil layer and the copper electroplating layer, and having a stepped connection having a high drop between the copper foil layer and the copper electroplating layer. Allow the pad to be exposed; 상기 계단상 접속패드 및 상기 기판 위에 피동부품이 형성되는 것을 포함하는 것을 특징으로 하는 감입식 피동부품의 제조방법.And a driven component is formed on the stepped connection pad and the substrate. 제1항에 있어서, The method of claim 1, 상기 피동부품은 전기저항, 콘덴서, 인덕턴스 중 어느 하나에 적용되는 것을 특징으로 하는 감입식 피동부품의 제조방법.The driven component is a manufacturing method of the immersion driven component, characterized in that applied to any one of an electrical resistance, a capacitor, an inductance. 제2항에 있어서, The method of claim 2, 상기 전기저항은 저항 페이스트인 것을 특징으로 하는 감입식 피동부품의 제조방법.And said electrical resistance is a resistance paste. 제1항에 있어서,The method of claim 1, 상기 피동부품은 계단상 접속패드 상방에 위치한 한 쌍의 접촉부가 연장되고, 상기 피동부품의 상기 한 쌍의 접촉부는 상기 접속패드와 전기적으로 연결된 것을 특징으로 하는 감입식 피동부품의 제조방법.And said pair of contact portions extending above a stepped connection pad, said pair of contacts of said driven component being electrically connected to said connection pad.
KR1020070001204A 2006-10-23 2007-01-05 Manufacturing process of passivity element of insertion type KR100850221B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW095138998 2006-10-23
TW095138998A TW200820858A (en) 2006-10-23 2006-10-23 Method of manufacturing embedded passive components

Publications (2)

Publication Number Publication Date
KR20080036491A KR20080036491A (en) 2008-04-28
KR100850221B1 true KR100850221B1 (en) 2008-08-04

Family

ID=39574903

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070001204A KR100850221B1 (en) 2006-10-23 2007-01-05 Manufacturing process of passivity element of insertion type

Country Status (2)

Country Link
KR (1) KR100850221B1 (en)
TW (1) TW200820858A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349415A (en) * 1999-06-03 2000-12-15 Ind Technol Res Inst Manufacture of printed circuit board having polymeric thick-film resistor and metal thin-film resistor
JP2001298255A (en) * 2000-04-17 2001-10-26 Sumitomo Metal Electronics Devices Inc Method of manufacturing thick printed board
KR100642047B1 (en) * 2005-07-29 2006-11-10 전자부품연구원 Method for processing a embedded resistor and processing pcb using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349415A (en) * 1999-06-03 2000-12-15 Ind Technol Res Inst Manufacture of printed circuit board having polymeric thick-film resistor and metal thin-film resistor
JP2001298255A (en) * 2000-04-17 2001-10-26 Sumitomo Metal Electronics Devices Inc Method of manufacturing thick printed board
KR100642047B1 (en) * 2005-07-29 2006-11-10 전자부품연구원 Method for processing a embedded resistor and processing pcb using the same

Also Published As

Publication number Publication date
KR20080036491A (en) 2008-04-28
TWI305126B (en) 2009-01-01
TW200820858A (en) 2008-05-01

Similar Documents

Publication Publication Date Title
US20110283535A1 (en) Wiring board and method of manufacturing the same
TW200829104A (en) Circuit board and method for manufaturing thereof
JP4984855B2 (en) Thin film chip resistor, thin film chip capacitor, and thin film chip inductor manufacturing method
JP2006100631A (en) Wiring board and its manufacturing method
US6651324B1 (en) Process for manufacture of printed circuit boards with thick copper power circuitry and thin copper signal circuitry on the same layer
KR20080061816A (en) Printed circuit board and method of fabricating the same
US20070126108A1 (en) External connection structure for semiconductor package, and method for manufacturing the same
KR20110009790A (en) Flexible printed circuit board and method for manufacturing the same
KR100850221B1 (en) Manufacturing process of passivity element of insertion type
JP2000182872A (en) Chip inductor and manufacture thereof
JP2004103911A (en) Method for forming wiring
US8227175B2 (en) Method for smoothing printed circuit boards
KR100351923B1 (en) method for fabricating PCB
KR100462835B1 (en) Method of manufacturing build-up printed circuit board using metal bump
KR100747020B1 (en) Resistence embedded PCB and manufacturing method thereof
JP4311157B2 (en) Manufacturing method of substrate for semiconductor device
JPH1079568A (en) Manufacturing method of printed circuit board
CN112312671B (en) Circuit board and preparation method thereof
TWI696241B (en) Manufacturing method of high-power inductance element and its element
US20050067188A1 (en) Thin film circuit integrating thick film resistors thereon and method of fabricating the same
KR100858054B1 (en) Method of embedding passive device into external layer for printed circuit board
KR100690354B1 (en) Fabrication Process of Thermally Curable Thick-Film Resistor And Resistor made by the Process
JP2003324027A (en) Method of manufacturing laminated electronic component
KR20050109653A (en) Preparation of semiconductor substrate by build up technology
KR100981201B1 (en) Making method of PCB for memory card

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20130708

Year of fee payment: 6

FPAY Annual fee payment

Payment date: 20140707

Year of fee payment: 7

FPAY Annual fee payment

Payment date: 20150518

Year of fee payment: 8

FPAY Annual fee payment

Payment date: 20160518

Year of fee payment: 9

FPAY Annual fee payment

Payment date: 20170614

Year of fee payment: 10

FPAY Annual fee payment

Payment date: 20190523

Year of fee payment: 12