KR100619345B1 - Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom - Google Patents

Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom

Info

Publication number
KR100619345B1
KR100619345B1 KR1020040055615A KR20040055615A KR100619345B1 KR 100619345 B1 KR100619345 B1 KR 100619345B1 KR 1020040055615 A KR1020040055615 A KR 1020040055615A KR 20040055615 A KR20040055615 A KR 20040055615A KR 100619345 B1 KR100619345 B1 KR 100619345B1
Authority
KR
South Korea
Prior art keywords
circuit board
printed circuit
plating layer
layer
plating
Prior art date
Application number
KR1020040055615A
Other languages
Korean (ko)
Other versions
KR20060006536A (en
Inventor
이동준
김치성
강대경
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020040055615A priority Critical patent/KR100619345B1/en
Publication of KR20060006536A publication Critical patent/KR20060006536A/en
Application granted granted Critical
Publication of KR100619345B1 publication Critical patent/KR100619345B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1675Process conditions
    • C23C18/1683Control of electrolyte composition, e.g. measurement, adjustment
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/32Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/32Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
    • C23C18/34Coating with nickel, cobalt or mixtures thereof with phosphorus or boron using reducing agents
    • C23C18/36Coating with nickel, cobalt or mixtures thereof with phosphorus or boron using reducing agents using hypophosphites
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/42Coating with noble metals
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/42Coating with noble metals
    • C23C18/44Coating with noble metals using reducing agents
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/02Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material

Abstract

본 발명은 반도체 패키지용 인쇄회로기판의 도금층 형성방법 및 이로부터 제조된 인쇄회로기판에 관한 것으로, 전자부품의 금속표면처리(metal finish)에 있어서 9∼13중량%의 인(P)을 함유하는 무전해 니켈층을 형성시킨 후, 유기환원제를 필수성분으로 함유하는 환원형 금 도금액을 이용하여 금 도금층을 형성시키는 것을 특징으로 한다. 본 발명의 방법에 따라 도금층을 형성할 경우, 전자부품의 표면실장의 결합신뢰성(solder jointability)을 향상시킬 수 있고, 무전해니켈/금도금 표면처리층의 내식성을 향상시킬 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a plated layer of a printed circuit board for a semiconductor package and a printed circuit board manufactured therefrom, wherein the metal surface contains 9 to 13% by weight of phosphorus (P) in a metal finish of an electronic component. After the electroless nickel layer is formed, a gold plating layer is formed by using a reduced gold plating solution containing an organic reducing agent as an essential component. When the plating layer is formed according to the method of the present invention, it is possible to improve the solder jointability of the surface mounting of the electronic component, and to improve the corrosion resistance of the electroless nickel / gold plated surface treatment layer.

인쇄회로기판, 도금층, 인함량, 니켈도금, 금도금, 유기환원제Printed Circuit Board, Plating Layer, Phosphorus Content, Nickel Plating, Gold Plating, Organic Reducing Agent

Description

반도체 패키지용 인쇄회로기판의 도금층 형성방법 및 이로부터 제조된 인쇄회로기판 {Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom}Method for forming plated layer of printed circuit board for semiconductor package and printed circuit board manufactured therefrom {Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom}

도 1은 본 발명에 따른 패키지용 인쇄회로기판의 도금층 형성방법을 개략적으로 나타낸 도면이다.1 is a view schematically showing a plating layer forming method of a printed circuit board for a package according to the present invention.

도 2는 본 발명의 실시예 1 및 비교예 1∼2에 따른 BGA 인쇄회로기판 솔더부의 결합강도를 대조적으로 나타낸 그래프이다.FIG. 2 is a graph showing contrasting bonding strengths of soldering parts of a BGA printed circuit board according to Example 1 and Comparative Examples 1 to 2 of the present invention. FIG.

※ 도면의 주요 부분에 대한 부호의 설명 ※※ Explanation of code about main part of drawing ※

1 패키지용 인쇄회로기판1 Printed Circuit Board for Package

2 구리 노출부2 copper exposed parts

3 포토솔더레지스트층3 Photo Solder Resist Layer

4 무전해 니켈 도금층4 Electroless Nickel Plating Layer

5 금 도금층5 gold plating layer

본 발명은 반도체 패키지용 인쇄회로기판의 도금층 형성방법 및 이로부터 제 조된 인쇄회로기판에 관한 것이다. 보다 구체적으로는 9∼13중량%의 인(P)을 함유하는 무전해 니켈 도금층을 형성한 후, 유기환원제를 이용한 환원형 금 도금공정을 통하여 전자부품 표면실장의 결합신뢰성을 향상시킬 수 있는 반도체 패키지용 인쇄회로기판의 도금층 형성방법 및 이로부터 제조된 인쇄회로기판에 관한 것이다.The present invention relates to a method for forming a plating layer of a printed circuit board for a semiconductor package and a printed circuit board manufactured therefrom. More specifically, after forming an electroless nickel plating layer containing 9 to 13% by weight of phosphorus (P), a semiconductor capable of improving the bonding reliability of the surface mount of an electronic component through a reduced gold plating process using an organic reducing agent. A method of forming a plating layer of a printed circuit board for a package and a printed circuit board manufactured therefrom.

현재 전자산업에서는 전자부품에 금속(예를 들어, 구리, 코발트, 금 및 니켈)을 도금하는 다양한 기술이 사용되고 있다. 이러한 방법으로는 화학증착, 금속 스퍼터링, 전기도금 및 무전해 금속도금이 포함될 수 있다.Currently, various technologies are used in the electronic industry to plate metals (eg, copper, cobalt, gold, and nickel) on electronic components. Such methods may include chemical vapor deposition, metal sputtering, electroplating and electroless metal plating.

무전해 금속도금은 전류흐름 없이도 전자 부품의 표면에 금속을 도금할 수 있으므로 최근 더욱 각광받고 있다. 전자 부품 산업에서 무전해 금속 도금을 사용한 예로는 인쇄회로기판(PCB)에 구리를 도금하는 것을 들 수 있다. 또한, 반도체의 경우, 무전해도금은 니켈을 본딩 패드와 멀티칩 장치에 도금하는데 사용되기도 한다.Electroless metal plating has been in the spotlight recently because it can plate metal on the surface of electronic components without current flow. An example of the use of electroless metal plating in the electronic components industry is the plating of copper on printed circuit boards (PCBs). In the case of semiconductors, electroless plating is also used to plate nickel on bonding pads and multichip devices.

금속을 무전해로 도금하는 방법은 일반적으로 먼저 금속 도금을 원활하게 하는 물질을 전자 제품의 표면에 시딩(seeding) 또는 석출하여 전자제품의 표면을 활성화시킴으로써 수행된다. 그렇지만 시딩이 반드시 필요한 것은 아니다. 예를 들면, 코발트, 니켈, 로듐 또는 팔라듐을 함유하는 물질인 경우에는 금속 도금을 증진시키기 위한 시딩이 요구되지 않는다. 시딩은 필요한 경우, 예컨대 전자부품을 시딩제를 함유하는 용액에 담그는 방식으로 수행한다. 활성화 후, 전자부품은 금속이온과 환원제가 존재하는 용액에 침지되는 것이 통상적이다.The method of electroless plating metal is generally performed by first seeding or depositing a material on the surface of the electronic product to facilitate the metal plating to activate the surface of the electronic product. However, seeding is not necessary. For example, for materials containing cobalt, nickel, rhodium or palladium, no seeding is required to enhance metal plating. Seeding is performed if necessary, for example, by dipping the electronic component into a solution containing the seeding agent. After activation, the electronic component is usually immersed in a solution in which metal ions and a reducing agent are present.

상기 환원제는 금속이온에 전자를 공급하는 역할을 함으로써 전자부품의 주 위 또는 표면에 있는 금속이온이 환원되어 금속이 되고 전자부품 표면에 도금이 된다.The reducing agent serves to supply electrons to the metal ions, thereby reducing the metal ions on or around the electronic component to form a metal and plating the surface of the electronic component.

다양한 금속이 전자 부품 표면에 무전해로 도금될 수 있으며, 예를 들면 구리, 니켈, 코발트, 금, 은, 팔라듐, 백금, 로듐, 철, 알루미늄, 탄탈륨, 티타늄, 텅스텐, 질화탄탈륨, 질화텅스텐, 인산코발트텅스텐(cobalt tungsten phosphorus) 또는 이들의 조합을 들 수 있다. Various metals can be electrolessly plated on the surface of electronic components, for example copper, nickel, cobalt, gold, silver, palladium, platinum, rhodium, iron, aluminum, tantalum, titanium, tungsten, tantalum nitride, tungsten nitride, Cobalt tungsten phosphorus or a combination thereof.

특히, 금은 그 우수한 물리적 성질 때문에 각종의 전자부품에 금 도금을 실시하여 광범위하게 이용되고 있다. 세라믹에 메탈라이즈를 실시한 전자부품에 금을 사용하는 경우에는 본딩, 땜납 등의 접합성에 우수한 특성을 나타내지만 극히 고가이기 때문에 될 수 있으면 도금층을 얇게해야 한다.In particular, gold has been widely used because of its excellent physical properties by plating gold on various electronic components. In the case where gold is used for electronic parts that have been metallized on ceramics, it exhibits excellent properties in bonding, soldering, and the like, but is extremely expensive. Therefore, the plating layer should be thinned if possible.

그러나, 금 도금층을 얇게하면 하지층의 Ni, Cu 등의 도금 또는 메탈라이즈 층이 치밀하지 않기 때문에 금 도금면으로 확산되어 내열변색, 실리콘 층의 박리, 본딩성 및 땜납성 등의 성능 저하가 나타난다.However, when the gold plating layer is thinned, the plating or metallization layer of Ni, Cu, etc. of the underlying layer is not dense, so it diffuses to the gold plating surface, resulting in deterioration of performance such as heat discoloration, peeling of the silicon layer, bonding property and solderability. .

이를 해결하기 위하여, 일본 특개소 58-4955호에는 금 도금의 하지층으로 로듐(Rh) 도금을 하여 위와 같은 불량요인을 없애기 위한 방법이 소개되어 있지만, Rh 자체가 고가인 단점이 있다.In order to solve this problem, Japanese Patent Application Laid-Open No. 58-4955 discloses a method for eliminating the above-mentioned defect by performing rhodium (Rh) plating with an underlying layer of gold plating, but there is a disadvantage that Rh itself is expensive.

한편, 인쇄회로기판은 기판 상에 회로 패턴 및 패드부를 포함하고 있으며, 일반적으로 상기 회로패턴 및 패드부는 구리 재질로 이루어진다. 그러나, 외부로 노출된 구리층은 시간의 경과에 따라 산화되어 반도체 및 인쇄회로기판의 실장시 신뢰성을 저하시키므로 이를 방지하기 위한 표면처리로서 패드부를 금 도금하는 공 정이 필수적으로 수행되고 있다.On the other hand, a printed circuit board includes a circuit pattern and a pad portion on a substrate, and the circuit pattern and the pad portion are generally made of copper. However, since the copper layer exposed to the outside is oxidized over time to reduce the reliability when mounting the semiconductor and printed circuit board, a gold plating process of the pad part is essentially performed as a surface treatment for preventing the copper layer.

상술한 전자부품의 금속표면처리기술로 무전해니켈/금도금공정(ENIG: Electroless Ni Immersion Gold)이 많이 이용되고 있으나 무전해니켈/금도금 코팅피막층은 이후 솔더와의 결합강도가 낮아 결합신뢰성(joint reliability)에서 많은 문제가 보고되어 있다. 이러한 문제점을 해결하기 위하여, 최근 직접금도금공정(DIG: Direct Immersion Gold), Sn 침지 도금(Immersion Sn), Ag 침지 도금(Immersion Ag) 또는 Cu 유기솔더보존제(OSP) 등 여러가지 다른 금속표면처리기술이 모색되고 있는 상황이다.Electroless Nickel / Gold Plating Process (ENIG: Electroless Ni Immersion Gold) is widely used as the metal surface treatment technology of the above-mentioned electronic parts, but the electroless nickel / gold plated coating layer has a low bond strength with solder afterwards, resulting in joint reliability. ), Many problems have been reported. In order to solve this problem, various other metal surface treatment technologies such as direct immersion gold (DIG), Sn immersion plating (Immersion Sn), Ag immersion plating (Immersion Ag), or Cu organic solder preservative (OSP) have been recently introduced. The situation is being sought.

이와 관련하여, 미국 특허 제6,383,269호에는 솔더 마스크를 사용하여 금 도금하고자 하는 회로 패턴 부위에 무전해 니켈층을 형성한 다음, 칼륨 시안화 금, 하나 이상의 유기 전도성 염, 및 하나 이상의 환원제를 포함하는 금 침지 도금액을 접촉시켜 인쇄회로기판을 제조하는 방법이 개시되어 있다.In this regard, US Pat. No. 6,383,269 discloses a layer of electroless nickel on a portion of a circuit pattern to be gold plated using a solder mask, followed by gold containing potassium cyanide, one or more organic conductive salts, and one or more reducing agents. A method of manufacturing a printed circuit board by contacting an immersion plating liquid is disclosed.

또한, 일본 특개평 7-7243호에는 금 도금을 하고자 하는 구리 부위 상에 비결정질의 제1무전해 니켈 피막을 형성시키고, 결정질의 제2무전해 니켈 피막을 형성시킨 후에 치환반응을 주반응으로 하는 무전해 금 도금 방법을 개시하고 있다. 이외에도, 구리층 상에 니켈-금 도금층을 형성하는 개량된 기술은 미국 특허 제5,173,130호 및 제5,235,139호에 개시되어 있다.In Japanese Patent Laid-Open No. 7-7243, an amorphous first electroless nickel film is formed on a copper portion to be gold plated, and a crystalline second electroless nickel film is formed. An electroless gold plating method is disclosed. In addition, improved techniques for forming nickel-gold plated layers on copper layers are disclosed in US Pat. Nos. 5,173,130 and 5,235,139.

전술한 종래기술의 무전해니켈/금도금 공정에서 무전해 니켈 도금층은 약 6∼8%의 P 함량을 가지며, 대부분의 금도금은 라인관리상의 이유 등으로 치환 금도금공정을 사용하고 있다. 그러나, 이러한 방법으로 제조된 일반적인 무전해니켈/ 금도금층은 금도금공정 중 전기화학반응에 의한 침식반응으로 인하여 결합신뢰성이 약화되는 것으로 알려져 있으며, 이를 해결할 수 있는 개선된 도금층 형성방법이 절실히 요구되고 있는 실정이다.In the aforementioned electroless nickel / gold plating process, the electroless nickel plating layer has a P content of about 6 to 8%, and most gold plating uses a substitutional gold plating process for reasons of line management. However, the general electroless nickel / gold plating layer manufactured by such a method is known to weaken the bond reliability due to the erosion reaction by the electrochemical reaction during the gold plating process, and an improved plating layer formation method that can solve this is urgently needed. It is true.

이에 본 발명에서는 전술한 바와 같은 문제점을 해결하기 위하여 다양한 연구를 거듭한 결과, 9∼13중량%의 인(P)을 함유한 무전해 니켈 도금층을 형성하고 유기환원제를 이용한 환원형 금 도금공정을 통하여 전자부품 표면실장의 결합신뢰성을 향상시킬 수 있음에 착안하여 본 발명을 완성하였다.Accordingly, in the present invention, as a result of various studies to solve the problems described above, forming an electroless nickel plating layer containing 9 to 13% by weight of phosphorus (P) and using a reducing gold plating process using an organic reducing agent The present invention has been completed by focusing on improving the bonding reliability of surface mounting of electronic components.

따라서, 본 발명의 목적은 전자부품의 표면실장의 결합신뢰성 및 무전해니켈/금도금 표면처리층의 내식성을 향상시킬 수 있는 반도체 패키지용 인쇄회로기판의 도금층 형성방법을 제공하는데 있다.Accordingly, an object of the present invention is to provide a method for forming a plated layer of a printed circuit board for a semiconductor package which can improve the bonding reliability of the surface mount of an electronic component and the corrosion resistance of the electroless nickel / gold plated surface treatment layer.

본 발명의 다른 목적은 상기 방법에 따라 제조된 인쇄회로기판을 제공하는데 있다.Another object of the present invention is to provide a printed circuit board manufactured according to the above method.

상기 목적을 달성하기 위한 본 발명에 따른 반도체 패키지용 인쇄회로기판의 도금층 형성방법은:Method for forming a plating layer of a printed circuit board for a semiconductor package according to the present invention for achieving the above object:

a) 반도체 실장을 위한 와이어본딩부 및 외부 부품과의 결합을 위한 솔더링부를 포함하고, 일정한 회로패턴이 형성된 패키지용 인쇄회로기판을 제공하는 단계;a) providing a printed circuit board for a package including a wire bonding part for semiconductor mounting and a soldering part for coupling with external components, and having a predetermined circuit pattern formed thereon;

b) 상기 인쇄회로기판의 와이어본딩부 및 솔더링부를 제외한 부분에 포토솔더레지스트층을 형성하는 단계; b) forming a photosolder layer on portions of the printed circuit board other than the wire bonding portion and the soldering portion;                         

c) 상기 와이어본딩부 및 솔더링부에 니켈 도금액을 접촉시켜 9∼13중량%의 인(P)을 함유하는 무전해 니켈 도금층을 형성하는 단계; 및c) contacting the wire bonding portion and the soldering portion with a nickel plating solution to form an electroless nickel plating layer containing 9 to 13% by weight of phosphorus (P); And

d) 상기 니켈 도금층 상에 유기환원제를 필수적으로 함유하는 환원형 금 도금액을 접촉시켜 금 도금층을 형성하는 단계;d) forming a gold plating layer by contacting a reduced gold plating solution containing an organic reducing agent on the nickel plating layer;

를 포함하는 것을 특징으로 한다.Characterized in that it comprises a.

상기 다른 목적을 달성하기 위한 본 발명에 따른 반도체 패키지용 인쇄회로기판은:The printed circuit board for a semiconductor package according to the present invention for achieving the above another object is:

반도체 실장을 위한 와이어본딩부 및 외부 부품과의 결합을 위한 솔더링부를 포함하고, 일정한 회로패턴이 형성된 패키지용 인쇄회로기판에 있어서, In a printed circuit board for a package including a wire bonding portion for semiconductor mounting and a soldering portion for coupling with external components, and a constant circuit pattern is formed,

상기 와이어본딩부 및 솔더링부는The wire bonding part and the soldering part

구리 또는 구리합금층;Copper or copper alloy layers;

상기 구리층 또는 구리합금층 상에 형성되며, 9∼13중량%의 인(P)을 함유하는 무전해 니켈 도금층; 및An electroless nickel plating layer formed on the copper layer or the copper alloy layer and containing 9 to 13% by weight of phosphorus (P); And

상기 니켈 도금층 상에 유기환원제를 필수적으로 함유하는 환원형 금 도금액을 접촉시켜 형성된 금 도금층;A gold plating layer formed by contacting a reduced gold plating solution containing an organic reducing agent on the nickel plating layer;

을 포함하는 것을 특징으로 한다.Characterized in that it comprises a.

이하, 본 발명을 첨부된 도면을 참조하여 좀 더 구체적으로 살펴보면 다음과 같다.Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

전술한 바와 같이, 본 발명에서는 종래의 무전해니켈/금도금 공정을 개선하 여 전자부품의 표면실장의 결합신뢰성을 향상시키고, 무전해니켈/금도금 표면처리층의 내식성을 향상시킬 수 있는 반도체 패키지용 인쇄회로기판의 도금층 형성방법 및 이로부터 제조된 인쇄회로기판이 제공된다.As described above, the present invention improves the conventional electroless nickel / gold plating process to improve the bonding reliability of the surface mounting of electronic components, and improves the corrosion resistance of the electroless nickel / gold plating surface treatment layer. Provided are a plating layer forming method of a printed circuit board and a printed circuit board manufactured therefrom.

본 발명에 따른 인쇄회로기판의 도금층 형성방법을 도 1에 개략적으로 나타내었다.A method of forming a plating layer of a printed circuit board according to the present invention is schematically illustrated in FIG. 1.

도 1을 참조하면, 도금공정에 앞서, 우선, 패키지용 인쇄회로기판(1) 상에 일정한 회로패턴(도시되지 않음)과, 반도체 실장을 위한 와이어본딩부(2) 및 외부 부품과의 결합을 위한 솔더링부(도시되지 않음)를 형성시키는데, 상기 공정은 당 업계에서 널리 알려진 사진식각법(photolithography)에 의한 것이 전형적이다.Referring to FIG. 1, prior to the plating process, first, a combination of a predetermined circuit pattern (not shown) on the package printed circuit board 1, the wire bonding part 2 for mounting the semiconductor, and an external component are applied. To form a soldering portion (not shown), typically by photolithography, which is well known in the art.

그 다음, 포토솔더레지스트(PSR)를 상기 인쇄회로기판(1)에 도포하는데 상기 솔더레지스트층(3)은 후술하는 도금에 대한 레지스트(resist) 역할을 한다. 상기 솔더레지스트층(3)에 드라이 필름을 적용하고 노광 및 현상을 거쳐 와이어본딩부(2) 및 솔더링부(도시되지 않음) 상의 솔더레지스트층 부위만을 선택적으로 박리한다.Then, a photo solder resist PSR is applied to the printed circuit board 1, wherein the solder resist layer 3 serves as a resist for plating, which will be described later. A dry film is applied to the solder resist layer 3 and selectively peels only the solder resist layer portion on the wire bonding portion 2 and the soldering portion (not shown) through exposure and development.

상기 공정이 완료된 후에는 와이어본딩부(2) 및 솔더링부(도시되지 않음)가 외부로 노출되어 그 위에 무전해 니켈도금에 의한 무전해 니켈 도금층(4)이 형성된다.After the process is completed, the wire bonding portion 2 and the soldering portion (not shown) are exposed to the outside, thereby forming an electroless nickel plating layer 4 by electroless nickel plating.

이러한 도전층(2) 상에 무전해 니켈 도금층(4)을 형성하기 위한 도금 원리를 간략히 설명하면 다음과 같다. The plating principle for forming the electroless nickel plating layer 4 on the conductive layer 2 will be briefly described as follows.

금속 이온을 함유한 용액에서 금속을 석출시킬 때 Mx + + X- → M0 의 전자이동이 일어난다. 이들의 화학적 변화를 일으키는 방법으로는 환원제를 이용하는 방법인 자기촉매형 무전해도금(환원도금)과 이온화경향을 이용하는 치환도금이 있다.The M 0 → of electromigration occurs - M + + X x when deposit the metal in a solution containing metal ions. As a method of causing these chemical changes, there are a self-catalyzed electroless plating (reduction plating), which is a method of using a reducing agent, and a substitution plating, which uses an ionization tendency.

무전해 니켈 도금은 니켈염을 함유한 용액에서 차아린산염 등의 환원제에 따라서 화학적으로 니켈을 석출시키는 것으로 도금액은 니켈염, 환원제, 착화제, 안정제 및 습윤제 등을 포함한다. 전처리 공정 처리된 인쇄회로기판을 Pd, Au 또는 Pt와 같은 촉매의 존재하에서 도금액에 담그면 각각 하기 반응식 1 및 하기 반응식 2와 같은 주반응 및 부반응이 표면에서 일어난다.Electroless nickel plating chemically precipitates nickel in a solution containing nickel salt in accordance with a reducing agent such as hypochlorite. The plating solution contains a nickel salt, a reducing agent, a complexing agent, a stabilizer, and a wetting agent. Pretreatment process When the printed circuit board is immersed in the plating solution in the presence of a catalyst such as Pd, Au, or Pt, the main reactions and side reactions such as the following Schemes 1 and 2, respectively, occur on the surface.

NiSO4 + 2NaH2PO2 + 2H2O → Ni0 + Na2HPO 3 + H2 + H2SO4 NiSO 4 + 2NaH 2 PO 2 + 2H 2 O → Ni 0 + Na 2 HPO 3 + H 2 + H 2 SO 4

NaH2PO3 + H → P + NaOH + H2ONaH 2 PO 3 + H → P + NaOH + H 2 O

이와 같이, 촉매핵을 중심으로 니켈의 촉매반응이 일어나며 도금이 석출된다. 이 때 부반응으로 인(P)이 피막중에 공석하게 되고 Ni-P의 비결정성 조직이 된다.In this way, the catalytic reaction of nickel occurs around the catalyst nucleus and plating is deposited. At this time, the side reaction causes phosphorus (P) to vacancies in the coating and becomes Ni-P amorphous structure.

상기 니켈 도금과정은 pH가 약 4.0∼5.5인 니켈 도금액을 사용하여 약 75∼90℃의 온도에서 10분에서 50분 동안 수행하는 것이 제품의 품질과 생산성 측면에서 바람직하다. 이로부터 형성된 무전해 니켈 도금층의 두께는 약 1 내지 20㎛이 며, 상기 도금층의 두께가 1㎛ 미만이면 확산 장벽(diffusion barrier)으로서의 역할이 충분하지가 않으며, 20㎛를 초과하면 대량생산시 생산성 저하가 우려된다.The nickel plating process is preferably performed from 10 to 50 minutes at a temperature of about 75 to 90 ℃ using a nickel plating solution having a pH of about 4.0 to 5.5 in terms of product quality and productivity. The electroless nickel plated layer formed therefrom has a thickness of about 1 to 20 μm. When the thickness of the plated layer is less than 1 μm, a role as a diffusion barrier is not sufficient. There is a fear of deterioration.

여기서, 상기 무전해 니켈 도금에 따라 형성되는 무전해 니켈 도금층(4)은 9 내지 13중량%의 인(P)을 함유한다. 상기 인(P)의 함량이 9중량% 미만이면 내식성이 저하되고, 13중량%를 초과하면 내식성과 와이어본딩성은 향상되는 반면 솔더링성은 떨어지게 된다.Here, the electroless nickel plating layer 4 formed according to the electroless nickel plating contains 9 to 13% by weight of phosphorus (P). If the content of phosphorus (P) is less than 9% by weight, the corrosion resistance is lowered, and if it exceeds 13% by weight, the corrosion resistance and wire bonding properties are improved while soldering properties are inferior.

그 다음, 상기 니켈 도금층(4)의 손상을 방지하기 위하여 요구되는 금 도금층(5)을 형성시키기 위하여 상기 니켈 도금층(4) 상에 충분한 시간동안 환원형 무전해 수용성 금 도금액에 접촉, 침적시켜 원하는 금 도금 두께, 바람직하게는 0.02∼1.0㎛로 금 도금층(5)을 형성시킨다. 여기서, 상기 도금층의 두께가 0.02㎛ 미만이면 습윤성(wettability)이 저하되고, 1.0㎛를 초과하면 Au 무름(embrittle) 현상으로 인하여 솔더가 쉽게 파괴된다.Thereafter, the nickel plating layer 4 is contacted and deposited on the nickel plating layer 4 for a sufficient time so as to form a gold plating layer 5 required to prevent damage to the nickel plating layer 4. The gold plating layer 5 is formed to a gold plating thickness, Preferably it is 0.02-1.0 micrometer. Here, when the thickness of the plating layer is less than 0.02 μm, wettability is lowered, and when the thickness of the plating layer is more than 1.0 μm, solder is easily broken due to Au embrittle phenomenon.

상기 무전해 니켈 도금층(4) 위에 환원형 금이 석출되는 주반응은 하기 반응식 3에 나타낸 바와 같다.The main reaction in which the reduced gold is deposited on the electroless nickel plating layer 4 is as shown in Scheme 3 below.

Ni → Ni2+ + 2e- Ni → Ni 2+ + 2e -

2Au+ + 2e- → 2Au0 2Au + + 2e - → 2Au 0

즉, 금 도금액 내에 니켈 및 인이 이온으로 용출되고 반대로 Au+은 전자를 받아들여 금속으로 음극 표면에 석출하는 반응이다.In other words, nickel and phosphorus elute as ions in the gold plating solution, and Au + silver accepts electrons and precipitates on the surface of the cathode as a metal.

상기 금 도금액에는 수용성 금 화합물, 유기산, 착화제, 안정제 및 환원제 등이 포함될 수 있는데, 특히 DMAB(dimethylamine borane), 차아린산, 아황산, 포르말린 및 하이드로메탄 술판산(hydromethane sulfanic acid) 중 하나 이상의 유기환원제가 필수적으로 함유된다. 상기 금 도금액 중의 유기환원제의 함량은 0.005∼0.2몰이고, 상기 함량이 0.005몰 미만이면 금도금 공정에서 침식이 일어나 결합강도가 약해지고, 0.2몰을 초과하면 금도금조에서 금석출이 발생하기 쉽다.The gold plating solution may include a water-soluble gold compound, an organic acid, a complexing agent, a stabilizer and a reducing agent, and in particular, one or more of dimethylamine borane (DMAB), hypoaric acid, sulfurous acid, formalin and hydromethane sulfanic acid. Reducing agent is essentially contained. The content of the organic reducing agent in the gold plating solution is 0.005 to 0.2 moles, and if the content is less than 0.005 moles, erosion occurs in the gold plating process, and thus the bond strength is weakened. When the content exceeds 0.2 moles, gold precipitation is easily generated in the gold plating bath.

여기서, 상기 금 도금액의 pH는 약 4.0∼8.5인 것이 바람직하며, 상기 금 도금 과정에서 요구되는 온도는 약 50∼90℃ 이다. 또한, 상기 금 도금공정은 약 2∼30분 동안 수행되는 것이 좋다. 상기 금 도금 공정 조건이 상술한 범위를 벗어나는 경우 생산성이 떨어지거나 금도금 공정에 의한 침식이 일어나 블랙 패드(black pad)가 생겨 결합강도가 감소하는 단점이 있다.Here, the pH of the gold plating solution is preferably about 4.0 to 8.5, the temperature required in the gold plating process is about 50 ~ 90 ℃. In addition, the gold plating process is preferably performed for about 2 to 30 minutes. If the gold plating process condition is out of the above-described range, the productivity may be reduced or erosion may occur due to the gold plating process, resulting in a black pad, resulting in a decrease in bonding strength.

본 발명에 사용되는 수용성 금 화합물로는 아황산금나트륨, 시안화금칼륨이 바람직하지만, 이에 한정되는 것은 아니다.As water-soluble gold compound used for this invention, although sodium sulfite and potassium cyanide are preferable, it is not limited to this.

또한, 최적의 금 도금층(5)을 형성하기 위해서는 도금 공정 중 선택적으로 전처리 과정을 수행할 수 있다. 즉, 먼저 구리 노출부(2)에 물리적인 연마를 실시하여 표면의 이물질을 제거하고 화학적으로 유기물을 제거한다. 또한, 구리층(2)의 표면을 에칭시킨 후 니켈 도금층(4)의 형성에 앞서서 선택적으로 촉매 역할을 하는 팔라듐(Pd) 등으로 처리하는 것이 바람직하다.In addition, in order to form the optimal gold plating layer 5, a pretreatment process may be selectively performed during the plating process. That is, first, the copper exposed portion 2 is physically polished to remove foreign substances on the surface and chemically remove organic substances. In addition, it is preferable to etch the surface of the copper layer 2 and then treat it with palladium (Pd) or the like which selectively serves as a catalyst prior to the formation of the nickel plating layer 4.

전술한 바와 같이, 본 발명에 따르면, 약 6∼8중량%의 인(P)을 함유하는 기존의 무전해 니켈 도금층과 달리, 이보다 훨씬 많은 약 9∼13중량%의 인(P)을 함유 하는 무전해 Ni 층을 도입하는 동시에, 금 도금액내에 환원제성분을 갖는 유기첨가제를 공급함으로써 무전해 니켈층의 전기화학적 침식을 최소화한다. 또한, 본 발명에 따른 무전해 니켈/금 도금층은 전기화학적인 침식을 최소화할 수 있으므로 이를 통하여 전자부품의 표면실장시 제품간 결합강도(solder jointability)를 향상시켜 준다. 아울러, 높은 인(P) 함량을 갖는 니켈 도금층은 내식성이 강하므로 장기간 사용 또는 보관 중 무전해 니켈/금 도금층 상에 생성되기 쉬운 니켈 산화물의 발생을 억제하여 전기적인 저항값 증가 등의 문제점을 해결할 수 있다.As described above, according to the present invention, unlike conventional electroless nickel plating layers containing about 6 to 8% by weight of phosphorus (P), it contains much more than about 9 to 13% by weight of phosphorus (P). The introduction of the electroless Ni layer and at the same time supplying an organic additive having a reducing agent in the gold plating solution minimizes the electrochemical erosion of the electroless nickel layer. In addition, the electroless nickel / gold plated layer according to the present invention can minimize the electrochemical erosion, thereby improving the solder jointability between products during surface mounting of electronic components. In addition, since the nickel plated layer having a high phosphorus (P) content has a high corrosion resistance, it is possible to solve problems such as an increase in electrical resistance by suppressing the occurrence of nickel oxide that is easily generated on the electroless nickel / gold plated layer during long-term use or storage. Can be.

이하, 하기 실시예를 통하여 본 발명을 좀 더 구체적으로 설명하지만, 이에 본 발명의 범주가 한정되는 것은 아니다.Hereinafter, the present invention will be described in more detail with reference to the following examples, but the scope of the present invention is not limited thereto.

하기의 실시예에서는 플라즈마 전처리가 실시 된 제품을 이용하여 구리 재질의 와이어본딩부와 솔더볼(solder ball)과의 용접성이 요구되는 솔더링부를 제외한 부분에 포토솔더레지스트(Hitachi, SR7000)가 도포된 패키지용 BGA 인쇄회로기판(크기 400×505㎜, 두께 1.08±0.06㎜, 구리층 두께 10∼20㎛)을 50℃에서 탈지하고, 구리층의 산화물을 제거할 목적으로 0.5∼1.0㎛ 에칭하였다. 다음 팔라듐(Pd)으로 구리층을 촉매 처리한 다음 수세하였다. 그 후, 다음과 같이 무전해 니켈 도금 및 금 도금을 순차적으로 수행하였다.In the following example, a package for which photosolder resist (Hitachi, SR7000) is applied to a portion except for a soldering portion requiring weldability between a copper wire bonding portion and a solder ball using a product subjected to plasma pretreatment The BGA printed circuit board (size 400 × 505 mm, thickness 1.08 ± 0.06 mm, copper layer thickness 10 to 20 μm) was degreased at 50 ° C. and etched at 0.5 to 1.0 μm for the purpose of removing oxides of the copper layer. The copper layer was then catalyzed with palladium (Pd) and washed with water. Thereafter, electroless nickel plating and gold plating were sequentially performed as follows.

실시예 1Example 1

상기와 같이 전처리가 완성된 패키지용 BGA 인쇄회로기판의 구리층 상에 니켈농도가 5.5∼6.5g/L의 함량으로 포함된 pH 약 4.5의 무전해 니켈 도금액(Atotech, Aurotech High Phosphoruos(HP) Nickel)으로 85℃에서 35분 동안 도금하 였다. 이때, 형성된 무전해 니켈 도금층의 두께는 약 6㎛이었다. 그 다음, 니켈 도금층이 형성된 인쇄회로기판을 수세한 후, 유기환원제 0.025몰이 포함된, pH가 약 7.2인 환원형 금 도금액(Uyemura, TSB 71B)이 담긴 도금액조에 약 85℃의 온도에서 약 26분 동안 침적시켜 상기 인쇄회로기판의 니켈 도금층 상에 약 0.08㎛의 두께를 갖는 환원형 금 도금층을 형성시켰다. 이를 수세하고, 150℃에서 60분 동안 건조시켜 니켈/금 도금 처리된 BGA 인쇄회로기판을 얻었다.The electroless nickel plating solution (Atotech, Aurotech High Phosphoruos (HP) Nickel) having a pH of about 4.5 contained in a nickel concentration of 5.5 to 6.5 g / L on the copper layer of the BGA printed circuit board for pre-processing package completed as described above. Plating at 85 ° C. for 35 minutes. At this time, the thickness of the electroless nickel plating layer formed was about 6 μm. Then, after washing the printed circuit board having the nickel plated layer, it was about 26 minutes at a temperature of about 85 ° C. in a plating solution bath containing a reduced gold plating solution (Uyemura, TSB 71B) having a pH of about 7.2 containing 0.025 mol of an organic reducing agent. During the deposition, the reduced gold plating layer having a thickness of about 0.08 μm was formed on the nickel plating layer of the printed circuit board. It was washed with water and dried at 150 ° C. for 60 minutes to obtain a nickel / gold plated BGA printed circuit board.

비교예 1Comparative Example 1

유기환원제를 함유하지 않은 치환형 금 도금액(Atotech, Aurotech HP Gold)을 사용한 것을 제외하고는 상기 실시예 1과 동일하게 실시하여 니켈/금 도금 처리된 BGA 인쇄회로기판을 얻었다.A nickel-gold plated BGA printed circuit board was obtained in the same manner as in Example 1 except that a substitution type gold plating solution (Atotech, Aurotech HP Gold) containing no organic reducing agent was used.

비교예 2Comparative Example 2

니켈농도가 4.5∼5.5g/L의 함량으로 포함된 니켈 도금액(medium phosphorous(중인용) Uyemura, NPR-4)을 사용한 것을 제외하고는 상기 실시예 1과 동일하게 실시하여 니켈/금 도금 처리된 BGA 인쇄회로기판을 얻었다.Except for using a nickel plating solution (medium phosphorous Uyemura, NPR-4) containing a nickel concentration of 4.5 ~ 5.5g / L was carried out in the same manner as in Example 1 was subjected to nickel / gold plating A BGA printed circuit board was obtained.

상기 실시예 1 및 비교예 1∼2에서 얻은 BGA 인쇄회로기판의 솔더부의 결합강도를 측정(Peel test metrology for solder joint reliability of FC BGA packages, Jinlin Wang et al., 2003 IEEE Electronic Components and Technology Conference, pp 353∼358)하여 그 결과를 하기 도 2에 대조적으로 나타내었다.Peel test metrology for solder joint reliability of FC BGA packages, Jinlin Wang et al., 2003 IEEE Electronic Components and Technology Conference, pp 353 to 358) and the results are shown in contrast to FIG. 2.

도 2에 나타낸 바와 같이, 고함량(9∼13중량%)의 인(P)을 갖는 니켈 도금액과, 유기환원제가 포함된 금 도금조를 이용하여 형성시킨 니켈/금 도금층의 조합( 실시예 2)이 그렇지 아니한 경우(비교예 1∼2)에 비하여 결합강도가 상대적으로 좋음을 알 수 있다.As shown in Fig. 2, a combination of a nickel plating solution having a high content (9 to 13% by weight) of phosphorus (P) and a nickel / gold plating layer formed by using a gold plating bath containing an organic reducing agent (Example 2 ), The bond strength is relatively good as compared to the case where it is not (Comparative Examples 1 and 2).

전술한 바와 같이, 본 발명에 따르면, 전자부품의 금속표면처리에 있어서 종래기술에 비하여 높은 인(P) 함량을 갖도록 9∼13중량%의 인(P)을 함유하는 무전해 니켈층을 형성시킨 후, 유기환원제를 필수적으로 함유하는 환원형 금 도금액을 이용하여 금 도금층을 형성시켜 전자부품의 표면실장의 결합신뢰성과 무전해니켈/금도금 표면처리층의 내식성을 향상시킬 수 있다.As described above, according to the present invention, an electroless nickel layer containing 9 to 13% by weight of phosphorus (P) is formed to have a higher phosphorus (P) content in the metal surface treatment of electronic components. Thereafter, a gold plating layer may be formed using a reducing gold plating solution containing an organic reducing agent, thereby improving bonding reliability of the surface mount of the electronic component and corrosion resistance of the electroless nickel / gold plating surface treatment layer.

Claims (16)

a) 반도체 실장을 위한 와이어본딩부 및 외부 부품과의 결합을 위한 솔더링부를 포함하고, 일정한 회로패턴이 형성된 패키지용 인쇄회로기판을 제공하는 단계;a) providing a printed circuit board for a package including a wire bonding part for semiconductor mounting and a soldering part for coupling with external components, and having a predetermined circuit pattern formed thereon; b) 상기 인쇄회로기판의 와이어본딩부 및 솔더링부를 제외한 부분에 포토솔더레지스트층을 형성하는 단계;b) forming a photosolder layer on portions of the printed circuit board other than the wire bonding portion and the soldering portion; c) 상기 와이어본딩부 및 솔더링부에 니켈 도금액을 접촉시켜 9∼13중량%의 인(P)을 함유하는 무전해 니켈 도금층을 형성하는 단계; 및c) contacting the wire bonding portion and the soldering portion with a nickel plating solution to form an electroless nickel plating layer containing 9 to 13% by weight of phosphorus (P); And d) 상기 니켈 도금층 상에 유기환원제를 0.005∼0.2몰 함유하는 환원형 금 도금액을 접촉시켜 금 도금층을 형성하는 단계;d) contacting the reduced gold plating solution containing 0.005 to 0.2 mol of an organic reducing agent on the nickel plating layer to form a gold plating layer; 를 포함하는 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.Plating layer forming method of a printed circuit board for a package comprising a. 제1항에 있어서, 상기 유기환원제는 DMAB(dimethylamine borane), 차아린산, 아황산, 포르말린 및 하이드로메탄 술판산(hydromethane sulfanic acid)으로 이루어진 군으로부터 하나 이상 선택되는 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The printed circuit board of claim 1, wherein the organic reducing agent is selected from the group consisting of dimethylamine borane (DMAB), hypoaric acid, sulfurous acid, formalin, and hydromethane sulfanic acid. Method of forming a plating layer. 삭제delete 제1항에 있어서, 상기 니켈 도금층의 두께는 1∼20㎛인 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The method of claim 1, wherein the nickel plating layer has a thickness of 1 to 20 μm. 제1항에 있어서, 상기 금 도금층의 두께는 0.02∼1.0㎛인 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The plating layer forming method of claim 1, wherein the gold plating layer has a thickness of 0.02 to 1.0 μm. 제1항에 있어서, 상기 니켈 도금액의 pH는 4.0∼5.5인 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The plating layer forming method of claim 1, wherein the nickel plating solution has a pH of 4.0 to 5.5. 제1항에 있어서, 상기 금 도금액의 pH는 4.0∼8.5인 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The method of claim 1, wherein the gold plating solution has a pH of 4.0 to 8.5. 제1항에 있어서, 상기 니켈 도금액의 온도는 70∼90℃인 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The method of claim 1, wherein the nickel plating solution has a temperature of 70 to 90 ° C. 제1항에 있어서, 상기 금 도금액의 온도는 50∼90℃인 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The plating layer forming method of claim 1, wherein the gold plating solution has a temperature of 50 ° C to 90 ° C. 제1항에 있어서, 상기 c) 무전해 니켈 도금 단계가 10∼50분 동안 수행되는 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.The method of claim 1, wherein the c) electroless nickel plating step is performed for 10 to 50 minutes. 제1항에 있어서, 상기 d) 금 도금 단계가 2∼30분 동안 수행되는 것을 특징으로 하는 패키지용 인쇄회로기판의 도금층 형성방법.2. The method of claim 1, wherein the d) gold plating step is performed for 2 to 30 minutes. 반도체 실장을 위한 와이어본딩부 및 외부 부품과의 결합을 위한 솔더링부를 포함하고, 일정한 회로패턴이 형성된 패키지용 인쇄회로기판에 있어서, In a printed circuit board for a package including a wire bonding portion for semiconductor mounting and a soldering portion for coupling with external components, and a constant circuit pattern is formed, 상기 와이어본딩부 및 솔더링부는: The wire bonding portion and the soldering portion: 구리 또는 구리합금층;Copper or copper alloy layers; 상기 구리층 또는 구리합금층 상에 형성된 무전해 니켈 도금층, 상기 무전해 니켈 도금층은 9∼13중량%의 인(P)을 함유함; 및An electroless nickel plating layer formed on the copper layer or the copper alloy layer, wherein the electroless nickel plating layer contains 9 to 13% by weight of phosphorus (P); And 상기 니켈 도금층 상에 형성된 금 도금층, 상기 금 도금층은 유기환원제를 0.005∼0.2몰 함유하는 환원형 금 도금액을 접촉시켜 형성됨;A gold plating layer formed on the nickel plating layer, the gold plating layer is formed by contacting a reduced gold plating solution containing 0.005 to 0.2 mol of an organic reducing agent; 을 포함하는 것을 특징으로 하는 패키지용 인쇄회로기판.Printed circuit board for a package comprising a. 제12항에 있어서, 상기 유기환원제는 DMAB(dimethylamine borane), 차아린산, 아황산, 포르말린 및 하이드로메탄 술판산(hydromethane sulfanic acid)으로 이루어진 군으로부터 하나 이상 선택되는 것을 특징으로 하는 패키지용 인쇄회로기판.The printed circuit board of claim 12, wherein the organic reducing agent is selected from the group consisting of dimethylamine borane (DMAB), hypoaric acid, sulfurous acid, formalin, and hydromethane sulfanic acid. . 삭제delete 제12항에 있어서, 상기 니켈 도금층의 두께는 1∼20㎛인 것을 특징으로 하는 패키지용 인쇄회로기판.The packaged printed circuit board of claim 12, wherein the nickel plating layer has a thickness of 1 μm to 20 μm. 제12항에 있어서, 상기 금 도금층의 두께는 0.02∼1.0㎛인 것을 특징으로 하는 패키지용 인쇄회로기판.The packaged printed circuit board of claim 12, wherein the gold plating layer has a thickness of 0.02 to 1.0 μm.
KR1020040055615A 2004-07-16 2004-07-16 Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom KR100619345B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020040055615A KR100619345B1 (en) 2004-07-16 2004-07-16 Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040055615A KR100619345B1 (en) 2004-07-16 2004-07-16 Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom

Publications (2)

Publication Number Publication Date
KR20060006536A KR20060006536A (en) 2006-01-19
KR100619345B1 true KR100619345B1 (en) 2006-09-08

Family

ID=37118217

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020040055615A KR100619345B1 (en) 2004-07-16 2004-07-16 Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom

Country Status (1)

Country Link
KR (1) KR100619345B1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100892301B1 (en) * 2007-04-23 2009-04-08 한화석유화학 주식회사 Manufacturing Method of Conductive Ball Using Eletroless Plating
KR101310256B1 (en) 2011-06-28 2013-09-23 삼성전기주식회사 Electroless plated layers of printed circuit board and method for preparing the same
KR101224667B1 (en) * 2011-06-28 2013-01-21 삼성전기주식회사 Wire bonding joint structure of joint pad, and method for preparing the same
KR102005487B1 (en) * 2011-12-21 2019-07-30 엘지이노텍 주식회사 Memory card, pcb for the memory card and method for manufacturing the same
KR101340350B1 (en) * 2012-01-30 2013-12-11 주식회사 심텍 Pcb having wear resistant terminal with high hardness and method of manufacturing the same
KR102014088B1 (en) 2012-03-20 2019-08-26 엘지이노텍 주식회사 Memory card, pcb for the memory card and method for manufacturing the same
KR101589631B1 (en) * 2015-09-11 2016-02-12 주식회사 삼한산업 Gold plating method of metal or metal alloy containing no nickel

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030095688A (en) * 2002-06-14 2003-12-24 삼성전기주식회사 Printed circuit board and plating method thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030095688A (en) * 2002-06-14 2003-12-24 삼성전기주식회사 Printed circuit board and plating method thereof

Also Published As

Publication number Publication date
KR20060006536A (en) 2006-01-19

Similar Documents

Publication Publication Date Title
JP5573429B2 (en) Electroless nickel-palladium-gold plating method, plated product, printed wiring board, interposer, and semiconductor device
US6261637B1 (en) Use of palladium immersion deposition to selectively initiate electroless plating on Ti and W alloys for wafer fabrication
JP2007123883A (en) Method of forming plating layer of print circuit board and print circuit board manufactured by the method
CN110325665B (en) Electroless plating process
KR20050060032A (en) Wafer level electroless copper metallization and bumping process, and plating solutions for semiconductor wafer and microchip
JP2012521490A (en) Pretreatment method for electroless nickel plating
KR20180089547A (en) Method for obtaining a palladium surface finish for copper wire bonding on printed circuit boards and ic-substratess
JP5755231B2 (en) Electroless plating of tin and tin alloys
EP2711977B1 (en) Manufacture of coated copper pillars
US7572723B2 (en) Micropad for bonding and a method therefor
KR20030095688A (en) Printed circuit board and plating method thereof
KR100619345B1 (en) Method for plating on printed circuit board for semi-conductor package and printed circuit board produced therefrom
KR101266901B1 (en) Non-cyanide electroless gold plating solution and method for electroless gold plating
US10602617B2 (en) Electroless plating method and ceramic substrate
EP3679167B1 (en) Electroless nickel plating solution
JP5978587B2 (en) Semiconductor package and manufacturing method thereof
KR101719180B1 (en) Activating solution for pretreatment of electroless palladium plating or electroless palldium alloy plating
JP2000256866A (en) Electroless nickel plating bath
JP6521553B1 (en) Substitution gold plating solution and substitution gold plating method
JP4096671B2 (en) Electronic component plating method and electronic component
JP4842620B2 (en) Method for manufacturing printed wiring board having high-density copper pattern
JP2009179845A (en) Electroless plating method
TWI551361B (en) Method for obtaining a palladium surface finish for copper wire bonding on printed circuit boards and ic-substrates and the products prepared therefrom
JP2021070858A (en) Substitution gold plating solution and substitution gold plating method

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20100701

Year of fee payment: 5

LAPS Lapse due to unpaid annual fee