KR100370410B1 - Method for manufacturing rear-facial buried contact solar cell - Google Patents

Method for manufacturing rear-facial buried contact solar cell Download PDF

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KR100370410B1
KR100370410B1 KR1019960000305A KR19960000305A KR100370410B1 KR 100370410 B1 KR100370410 B1 KR 100370410B1 KR 1019960000305 A KR1019960000305 A KR 1019960000305A KR 19960000305 A KR19960000305 A KR 19960000305A KR 100370410 B1 KR100370410 B1 KR 100370410B1
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semiconductor substrate
groove
forming
electrode
solar cell
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KR970060539A (en
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김동섭
지일환
이수홍
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삼성전자 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
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Abstract

PURPOSE: A method for manufacturing a rear-facial buried contact solar cell is provided to increase the collection efficiency of carrier and to form effective rear-facial electric field by forming a contact in a deep groove. CONSTITUTION: After forming a pyramid structure on a front surface of a P-type semiconductor substrate(1), PN junction is formed by emitter diffusion. An oxide layer(5) is formed on the front and rear surface of the P-type semiconductor substrate(1). A positive groove is formed on one predetermined portion of the rear surface of the semiconductor substrate. A P+-type layer(3) is formed in the positive groove. A negative groove is formed on the other predetermined portion of the rear surface of the semiconductor substrate. An N+-type layer(2) is formed in the negative groove. A bottom electrode(4) is formed in the positive and negative groove by plating a conductive metal.

Description

후면 함몰전극형 태양전지의 제조방법Manufacturing method of back recessed electrode type solar cell

본 발명은 후면 함몰전극형 태양전지의 제조방법에 관한 것으로서, 상세하기로는 캐리아의 수집확률이 높고 효과적인 후면전계를 형성시킬 수 있는 후면 함몰전극형 태양전지의 제조방법에 관한 것이다.The present invention relates to a method of manufacturing a back recessed electrode type solar cell, and more particularly, to a method of manufacturing a back recessed electrode type solar cell capable of forming an effective backside field having a high collection probability of carriers.

태양전지의 효율에 영향을 미치는 중요한 요소에는 단락회로 전류밀도, 개방회로전압, 충실도 등이 있다.Important factors affecting the efficiency of solar cells include short circuit current density, open circuit voltage, and fidelity.

태양전지의 변환효율을 향상시키기 위해서는 일반적으로 개방회로전압(VOC)을 높여야 한다. VOC는 하기식 (1)로 나타낼 수 있다.In order to improve the conversion efficiency of solar cells, open circuit voltage (V OC ) should generally be increased. V OC can be represented by the following formula (1).

여기에서 n은 전자의 농도, k는 볼츠만 상수(=1.38×10-23joule/K), T는 절대온도(K), q는 전하량(=1.602×10-19coulomb), JSC는 단락회로 전류밀도, JO는 다크(dark) 포화전류밀도이다.Where n is the electron concentration, k is the Boltzmann constant (= 1.38 × 10 -23 joule / K), T is the absolute temperature (K), q is the charge (= 1.602 × 10 -19 coulomb), and J SC is a short circuit. The current density, J O, is the dark saturation current density.

상기식 (1)에서 알 수 있는 바와 같이, 태양전지에서의 중요한 요소인 개방회로전압(VOC)을 높이기 위해서는 JO를 줄여아 하며, JO는 하기식 (2)로 나타낼 수있다.As can be seen from Equation (1), in order to increase the open circuit voltage (V OC ) which is an important factor in the solar cell, J O must be reduced, and J O can be represented by the following equation (2).

여기서, Jofs는 전면전류, Jobs는 후면전류, Joe는 에미터(emitter)전류, Job는 기저전류, Jofg는 전면홈전류이다.Here, J ofs is the front current, J obs is the rear current, J oe is the emitter (emitter) current, J ob is the base current, J ofg is the front groove current.

그런데 Jobs가 JO에서 가장 큰 비중을 차지하므로 JO를 줄이기 위해서는 Jobs값을 감소시켜야만 한다.However, because the J obs accounted for the largest share in J O J O and to reduce the sikyeoyaman reduce J obs value.

태양전지의 다른 중요한 요소인 충실도(fill factor, 이하 FF)는 하기식 (3)으로 표현된다.Fidelity (fill factor, FF), another important factor of solar cells, is represented by the following equation (3).

여기서, VOC= VOC/(kT/q)로 25℃에서 kT/q=0.026mV이며 증가된 VOC는 충실도를 향상시킨다. 향상된 VOC와 FF는 전체변환효율()을 향상시킨다.Here, V OC = V OC / (kT / q), kT / q = 0.026mV at 25 ° C. and increased V OC improves fidelity. Improved V OC and FF are the Improve).

여기서, Pin는 입사된 빛에너지의 양이다.Where P in is the amount of incident light energy.

상기식 (4)에서 알 수 있는 바와 같이 VOC와 FF가 증가하면는 증가한다.As can be seen from Equation (4), when V OC and FF increase Increases.

상기 단락회로 전류밀도에 영향을 미치는 요인으로는 반도체 기판 표면에서의 입사광의 반사율, 전지에서의 내부 양자 효율 등이 있다. 단락회로 전류밀도를 증가시키기 위해서는 반도체 기판 표면에서의 입사광의 반사율을 감소시켜야 하는데, 이를 위한 노력으로서 반도체 기판 표면을 텍스처링하거나 전극의 표면적을 줄이고자 하는 연구가 많이 진행되어 왔다.Factors affecting the short circuit current density include reflectance of incident light on the surface of the semiconductor substrate, internal quantum efficiency in the battery, and the like. In order to increase the short-circuit current density, it is necessary to reduce the reflectance of incident light on the surface of the semiconductor substrate. As an effort for this, much research has been conducted to texturize the surface of the semiconductor substrate or reduce the surface area of the electrode.

반도체 기판 표면을 텍스처링하는 방법은 기판 표면에서의 입사광의 반사를 감소시킬 뿐만 아니라 스넬법칙에 따라 입사광이 반도체 기판 내부로 들어가는 부수적인 효과를 얻을 수 있는 방법이다.The method of texturing the surface of a semiconductor substrate is a method that not only reduces the reflection of incident light on the surface of the substrate but also obtains an incidental effect of entering incident light into the semiconductor substrate according to Snell's law.

전극의 표면적을 줄이기 위한 방법으로서 기존의 스크린 프린팅형 전극대신 함몰전극형 전극을 사용하는 방법이 있다. 전극을 반도체 기판 내부로 깊게 파인 홈에 형성함으로써 전극에서의 반사로 인한 입사광의 손실을 줄일 수 있었다. 그러나 이러한 함몰전극이 반도체 기판의 전면에 형성되므로 이 전면전극에 의한 입사광의 반사율이 2∼3%정도나 된다.As a method for reducing the surface area of an electrode, there is a method of using a recessed electrode type electrode instead of a conventional screen printing electrode. The loss of incident light due to reflection at the electrode can be reduced by forming the electrode in the groove deeply dug into the semiconductor substrate. However, since the recessed electrode is formed on the entire surface of the semiconductor substrate, the reflectance of incident light by the front electrode is about 2 to 3%.

이러한 문제점을 해결하기 위하여 전극을 모두 반도체 기판 후면에 형성하는 후면전극형 태양전지가 개발되었으며, 이러한 전지의 예가 제1도에 도시되어 있다.In order to solve this problem, a back-electrode type solar cell in which all electrodes are formed on a back surface of a semiconductor substrate has been developed, and an example of such a battery is shown in FIG. 1.

제1A도는 p형 반도체 기판 (1) 후면 전체에 후면전극 (4)가 형성되어 있는 텍스처링된 블랙 태양전지를 나타낸 도면이고, 제1B도는 반도체 기판 (1) 후면에 p+부스바아 (6)과 n+부스바아 (7)이 형성되어 있는 포인트 콘택트 태양전지를 도시한 도면이다. 제1B도에서 화살표는 입사광의 방향을 나타내며, (2)는 n+층, (3)은 p+층, (5)는 산화막을 나타낸다.FIG. 1A shows a textured black solar cell having the back electrode 4 formed on the entire back surface of the p-type semiconductor substrate 1, and FIG. 1B shows p + busbars 6 and the back surface of the semiconductor substrate 1; It is a figure which shows the point contact solar cell in which n + busbar 7 is formed. In Fig. 1B, the arrow indicates the direction of incident light, (2) indicates an n + layer, (3) indicates a p + layer, and (5) indicates an oxide film.

그러나, 상기 후면전극형 태양전지는 반도체 기판 후면에 전극을 형성함으로써 전극에서의 반사로 인한 입사광의 손실을 줄일 수는 있었지만, 다음과 같은 문제점을 가지고 있다.However, the back electrode type solar cell has been able to reduce the loss of incident light due to reflection from the electrode by forming an electrode on the back of the semiconductor substrate, but has the following problems.

첫째, 반도체 기판 후면에 전극을 형성하기 위해서는 고가의 진공증착설비가 필요할 뿐만 아니라, 여러단계의 사진식각공정을 거쳐야 한다. 사진식각공정은 복잡하며 생산성이 낮은 공정이기 때문에 전지 제조원가를 상승시키는 역할을 한다.First, in order to form an electrode on the back of the semiconductor substrate, not only an expensive vacuum deposition apparatus is required, but also a plurality of photolithography processes are required. Photolithography is a complex and low-productivity process that increases battery manufacturing costs.

둘째, 전극이 반도체 기판 후면에 형성되어 있어서 캐리아들의 이동거리가 길어지게 되므로 캐리아들의 수집확률이 낮아진다. 특히 금속을 반도체 기판 후면 전체에 증착시켜 전극을 형성하는 경우, 금속과 반도체 기판과의 접촉면적이 증가하여 캐리아들의 수명이 감소되므로 전지의 개방전압 및 단락회로 전류밀도가 감소되는 문제점을 가지고 있다.Second, since the electrodes are formed on the rear surface of the semiconductor substrate, the moving distance of the carriers is increased, so that the collection probability of the carriers is lowered. In particular, when the electrode is formed by depositing metal on the entire back surface of the semiconductor substrate, the contact area between the metal and the semiconductor substrate is increased, and thus the life of the carriers is reduced, thereby reducing the open voltage and short circuit current density of the battery. .

그러므로 본 발명의 목적은 상기 문제점을 해결하여 캐리아의 수집확률이 높고 효과적인 후면전계를 형성시킬 수 있는 후면 함몰전극형 태양전지를 생산성 높게 제조하는 방법을 제공하는 것이다.Therefore, it is an object of the present invention to provide a method for manufacturing a back recessed electrode type solar cell with high productivity and high probability of collecting carriers, which can form an effective backside field.

상기 목적을 달성하기 위하여 본 발명에서는 p형 반도체 기판의 전면에 피라미드 구조를 형성한 다음, 이미터를 확산하여 pn접합을 형성하는 단계;In order to achieve the above object, the present invention comprises the steps of forming a pyramid structure on the front surface of the p-type semiconductor substrate, and then diffuse the emitter to form a pn junction;

반도체 기판의 전면과 후면에 산화막을 형성하는 단계;Forming oxide films on the front and back surfaces of the semiconductor substrate;

반도체 기판 후면에 양극홈을 형성하는 단계;Forming an anode groove on a back surface of the semiconductor substrate;

상기 양극홈에 p+층을 형성하는 단계;Forming a p + layer in the anode groove;

반도체 기판 후면에 음극홈을 형성하는 단계;Forming a cathode groove on a back surface of the semiconductor substrate;

상기 음극홈에 n+층을 형성하는 단계;Forming an n + layer in the cathode groove;

상기 반도체 기판 후면에 형성되어 있는 양극홈 및 음극홈에 전도성 금속을 도금하여 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 후면 함몰전극형 태양전지의 제조방법이 제공된다.There is provided a method of manufacturing a back recessed electrode type solar cell, comprising: forming an electrode by plating a conductive metal on an anode groove and a cathode groove formed on a rear surface of the semiconductor substrate.

본 발명에서는 상기 반도체 기판 전면의 산화막 하부에 n+층을 더 형성시킴으로써 전면전계를 형성한다.In the present invention, a front electric field is formed by further forming an n + layer under the oxide film on the entire surface of the semiconductor substrate.

상기 전극은 니켈, 아연, 구리, 티타늄, 팔라듐 및 은중에서 선택된 적어도 하나의 물질을 이용하여 선택적 도금이 가능한 무전해 도금방법 또는 전기 도금방법으로 형성시킨다. 그 중에서도 특히 니켈/아연, 니켈/구리/아연 또는 티타늄/팔라듐/은을 순차적으로 도금함으로써 전극을 제조하는 것이 바람직하다.The electrode is formed by an electroless plating method or an electroplating method capable of selective plating using at least one material selected from nickel, zinc, copper, titanium, palladium and silver. Among them, it is particularly preferable to prepare the electrode by sequentially plating nickel / zinc, nickel / copper / zinc or titanium / palladium / silver.

상기 반도체 기판의 홈은 레이저, 다이아몬드 펜을 이용하여 형성시키거나 화학적 에칭방법, 건식 에칭방법을 이용하여 형성시킨다. 이 때 홈의 깊이는 5∼100㎛, 폭은 5∼40㎛이다.The groove of the semiconductor substrate is formed using a laser, a diamond pen, or a chemical etching method or a dry etching method. At this time, the depth of the grooves is 5 to 100 µm and the width is 5 to 40 µm.

본 발명에서는 전지 전면에 인을 얇게 도핑함으로써 반도체 기판 표면에서의 전하의 재결합을 줄이고 플로팅 접합(floating junction)시킴으로써 단락회로 전류밀도와 개방회로전압이 증가된다. 양면 함몰전극형 태양전지(Bifacial Buried Contact Solar Cell)에서는 이러한 플로팅 접합으로 인하여 단락이 유발되어 전지의 개방회로전압과 충실도가 감소된다. 그러나 본 발명의 후면 함몰전극형 태양전지에서는 전극이 후면에만 있으므로 전극과 플로팅 접합과의 단락은 전혀 일어나지 않는다.In the present invention, a thin doping of the phosphor on the front surface of the cell reduces the recombination of charges on the surface of the semiconductor substrate and increases the short circuit current density and the open circuit voltage by floating junctions. In bilateral buried contact solar cells (Bifacial Buried Contact Solar Cell), the floating junction causes a short circuit, which reduces the open circuit voltage and fidelity of the cell. However, in the back recessed electrode type solar cell of the present invention, since the electrode is only at the rear side, a short circuit between the electrode and the floating junction does not occur at all.

이하, 본 발명의 후면 함몰전극형 태양전지의 제조방법을 제2A도 및 제3도를 참조하여 설명하기로 한다.Hereinafter, a method of manufacturing the back recessed electrode solar cell of the present invention will be described with reference to FIGS. 2A and 3.

먼저 반도체 기판 (1)을 깨끗하게 세정한 다음, 전지 표면에서의 입사광 반사를 감소시키기 위하여 반도체 기판 전면 표면에 텍스처링을 실시하는데, 이는 통상적인 화학적 에칭방법을 이용하여 반도체 기판 전면 표면에 크기가 5∼10㎛인 피라미드 구조를 형성시킨다. 이어서 시트 저항이 500∼2000Ω/□ 정도가 되도록 700∼1000℃에서 이미터를 확산시켜서 pn접합을 형성한다.First, the semiconductor substrate 1 is cleaned cleanly, and then texturing is performed on the front surface of the semiconductor substrate in order to reduce reflection of incident light on the surface of the cell. A pyramid structure of 10 mu m is formed. Subsequently, the emitter is diffused at 700 to 1000 ° C. such that the sheet resistance is about 500 to 2000 Ω / □, thereby forming a pn junction.

반도체 기판 표면을 비활성화(passivation)시킨 다음, 후속공정에서 반도체 기판 표면을 보호하기 위하여 반도체 기판의 전면과 후면에 2000∼4000Å 두께의 산화막 (5)를 형성한다. 이 때 산화막 (5) 상부에 반사방지막으로서 500∼1000Å 두께의 이산화티탄막을 더 형성시키기도 한다.After passivation of the surface of the semiconductor substrate, an oxide film 5 having a thickness of 2000 to 4000 microns is formed on the front and rear surfaces of the semiconductor substrate in order to protect the surface of the semiconductor substrate in a subsequent step. At this time, a titanium dioxide film having a thickness of 500 to 1000 Å may be further formed on the oxide film 5 as an antireflection film.

반도체 기판 (1) 후면에 양극홈 (8)을 형성한다. 이 때 홈은 레이저 또는 다이아몬드 펜을 이용하거나, 화학적 에칭 또는 건식 에칭방법을 이용하여 형성시킨다. 형성된 홈의 폭은 5∼40㎛, 깊이는 5∼100㎛이다.An anode groove 8 is formed on the back surface of the semiconductor substrate 1. At this time, the groove is formed by using a laser or diamond pen, or by chemical etching or dry etching. The grooves formed had a width of 5 to 40 µm and a depth of 5 to 100 µm.

상기 양극홈 (8)에 보론을 깊게 도핑하여 p+층 (3)을 형성함으로써 전극의 접촉저항을 줄이고 캐리아의 재결합 손실을 감소시킨다. 이 때 보론 공급원으로는 액체 또는 고체 공급원 모두가 사용가능하다.By deeply doping boron in the anode groove 8 to form the p + layer 3, the contact resistance of the electrode is reduced and the recombination loss of the carrier is reduced. At this time, both a liquid or a solid source can be used as the boron source.

이후의 인 확산시, 베리어를 형성하기 위한 산화막을 1000∼2000Å두께로 형성시킨다.In the subsequent phosphorus diffusion, an oxide film for forming a barrier is formed to have a thickness of 1000 to 2000 GPa.

양극홈 (8)을 형성시키는 경우와 동일한 방법을 사용하여 음극홈(9)를 형성하고, 형성된 홈내에 인을 깊게 도핑하여 n+층 (2)를 형성한다. 이 때 인 공급원으로는 보론의 경우와 마찬가지로 고체 또는 액체 공급원 모두를 사용할 수 있다.Using the same method as in the case of forming the anode groove 8, the cathode groove 9 is formed, and the n + layer 2 is formed by deeply doping phosphorus in the formed groove. In this case, as the source of phosphorus, both solid and liquid sources can be used.

형성된 양극홈 (8)과 음극홈 (9)에 금속 전극 (4)를 형성시킨다.The metal electrode 4 is formed in the formed anode groove 8 and cathode groove 9.

전극 형성시, 무전해 도금방법 또는 전기 도금방법을 사용할 수 있는데, 생산성과 제조원가를 고려할 때 선택적 도금이 가능한 무전해도금방법을 사용하는 것이 보다 바람직하다.When forming the electrode, an electroless plating method or an electroplating method may be used, and in consideration of productivity and manufacturing cost, it is more preferable to use an electroless plating method capable of selective plating.

상기 제조방법에 따라 제조된 후면 함몰전극형 태양전지는 제2A도에 도시되어 있다.The back recessed electrode type solar cell manufactured according to the manufacturing method is shown in FIG. 2A.

한편, 제2B도에서 알 수 있는 바와 같이 본 발명에서는 전지에서의 직렬저항을 감소시키기 위하여 p+층 (3)이 형성되어 있는 양극홈 (8)과 n+층 (2)가 형성되어 있는 음극홈 (9)를 서로 맞물리게 형성시킨다.On the other hand, as shown in FIG. 2B, in the present invention, in order to reduce the series resistance in the battery, the anode groove 8 and the n + layer 2 in which the p + layer 3 is formed are formed. The grooves 9 are formed to engage with each other.

본 발명의 방법은 사진식각공정이 필요없고, 비교적 간단하면서 생산성이 높은 방법이다. 이 방법에 따라 제조된 태양전지는 반도체 기판 후면내에 깊게 파여진 홈에 전극을 형성하므로 종래의 후면 전극형 태양전지보다 전극으로 수집되기 위한 캐리아 이동거리가 짧아짐으로써 캐리아의 수집효율이 증대되며, 효과적인 후면전계가 형성된다. 따라서 캐리아의 수명이 짧은 반도체 기판도 사용할 수 있다.The method of the present invention does not require a photolithography process and is a relatively simple and high productivity method. The solar cell manufactured according to this method forms an electrode in the groove deeply dug in the back of the semiconductor substrate, so that the carry distance for collecting the electrode is shorter than that of the conventional back electrode type solar cell. As a result, an effective rear field is formed. Therefore, a semiconductor substrate with a short lifetime of the carrier can also be used.

제1A도는 종래의 후면전극형 태양전지중에서 텍스처링된 블랙 태양전지(textured black solar cell)를, 제1B도는 포인트 콘택트 태양전지(point contact solar sell)를 나타내고,FIG. 1A shows a textured black solar cell in a conventional back-electrode type solar cell, FIG. 1B shows a point contact solar sell,

제2A도는 본 발명의 후면 함몰전극형 태양전지를 나타내고,2A shows a back recessed electrode type solar cell of the present invention,

제2B도는 본 발명의 후면 함몰전극형 태양전지에서 후면전극의 모양을 나타낸 도면이고,Figure 2B is a view showing the shape of the back electrode in the back recessed electrode solar cell of the present invention,

제3도는 본 발명에 따른 후면 함몰전극형 태양전지의 제조공정을 순서적으로 도시한 도면이다.3 is a view sequentially illustrating a manufacturing process of a back recessed electrode solar cell according to the present invention.

* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

1. p형 반도체 기판 2. n+1. p-type semiconductor substrate 2. n + layer

3. p+층 4. 후면전극3. p + layer 4. back electrode

5. 산화막 6. p+부스바아(busbar)5. Oxide 6. p + busbar

7. n+부스바아 8. 양극홈7. n + busbar 8. anode groove

9. 음극홈9. Cathode Groove

Claims (4)

p형 반도체 기판의 전면에 피라미드 구조를 형성한 다음, 이미터를 확산하여 pn접합을 형성하는 단계;forming a pyramid structure on the entire surface of the p-type semiconductor substrate, and then diffusing the emitter to form a pn junction; 반도체 기판의 전면과 후면에 산화막을 형성하는 단계;Forming oxide films on the front and back surfaces of the semiconductor substrate; 반도체 기판 후면에 양극홈을 형성하는 단계;Forming an anode groove on a back surface of the semiconductor substrate; 상기 양극홈에 p+층을 형성하는 단계;Forming a p + layer in the anode groove; 반도체 기판 후면에 음극홈을 형성하는 단계;Forming a cathode groove on a back surface of the semiconductor substrate; 상기 음극홈에 n+층을 형성하는 단계;Forming an n + layer in the cathode groove; 상기 반도체 기판 후면에 형성되어 있는 양극홈 및 음극홈에 전도성 금속을 도금하여 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 후면 함몰전극형 태양전지의 제조방법.And forming an electrode by plating a conductive metal on the anode groove and the cathode groove formed on the back surface of the semiconductor substrate. 제1항에 있어서, 상기 반도체 기판과 후면에 산화막을 형성하기 이전에, 반도체 기판 전면에 n+층을 형성하는 단계를 더 포함하는 것을 특징으로 하는 후면 함몰전극형 태양전지의 제조방법.The method of claim 1, further comprising forming an n + layer on a front surface of the semiconductor substrate before forming an oxide layer on the back surface of the semiconductor substrate. 제1항에 있어서, 상기 전극을 형성하는 단계에서 전도성 금속이 니켈, 아연, 구리, 은, 티타늄 및 팔라듐으로 이루어진 군으로부터 선택된 적어도 하나인 것을특징으로 하는 후면 함몰전극형 태양전지의 제조방법.The method of claim 1, wherein the conductive metal is at least one selected from the group consisting of nickel, zinc, copper, silver, titanium, and palladium in the forming of the electrode. 제1항에 있어서, 상기 홈의 깊이가 5∼100㎛, 폭이 5∼40㎛인 것을 특징으로 하는 후면 함몰전극형 태양전지의 제조방법.The method of claim 1, wherein the groove has a depth of 5 to 100 μm and a width of 5 to 40 μm.
KR1019960000305A 1996-01-09 1996-01-09 Method for manufacturing rear-facial buried contact solar cell KR100370410B1 (en)

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KR20110032655A (en) * 2009-09-23 2011-03-30 엘지전자 주식회사 The manufacturing method of back contact solar cells
KR20110080230A (en) * 2010-01-05 2011-07-13 엘지전자 주식회사 Solar cell and method for manufacturing the same
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US20080314443A1 (en) * 2007-06-23 2008-12-25 Christopher Michael Bonner Back-contact solar cell for high power-over-weight applications

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