KR100374811B1 - Process for preparing buried contact solar cell - Google Patents

Process for preparing buried contact solar cell Download PDF

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KR100374811B1
KR100374811B1 KR1019960037674A KR19960037674A KR100374811B1 KR 100374811 B1 KR100374811 B1 KR 100374811B1 KR 1019960037674 A KR1019960037674 A KR 1019960037674A KR 19960037674 A KR19960037674 A KR 19960037674A KR 100374811 B1 KR100374811 B1 KR 100374811B1
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plating layer
substrate
forming
solar cell
semiconductor substrate
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KR19980017853A (en
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김동섭
조영현
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삼성전자주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02366—Special surface textures of the substrate or of a layer on the substrate, e.g. textured ITO/glass substrate or superstrate, textured polymer layer on glass substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

PURPOSE: A process for preparing buried contact solar cell(BCSC) having low shading loss and electric power loss, thereby having excellent energy conversion efficiency, is provided. CONSTITUTION: The process for preparing buried contact solar cell comprises the steps of texturing the p-type semiconductor substrate(1) to form a pyramid structure on the front and rear surfaces of the substrate(1); diffusing an emitter to the substrate(1) to form p-n bonding; forming an oxide layer(3) on the front surface of the substrate(1); forming grooves on the substrate(1); doping the grooves with n-type impurities; vapor depositing conductive materials on the rear surface of the substrate(1) and then sintering to form back electrode(4); electroless plating with nickel onto the grooves to form nickel plating layer; electroplating with copper on the nickel plating layer to form copper plating layer; and electroless plating with silver onto the copper plating layer to form silver plating layer, thereby forming front electrode(2).

Description

함몰전극형 태양전지의 제조방법Manufacturing method of depressed electrode type solar cell

본 발명은 함몰전극형 태양전지의 제조방법에 관한 것으로서, 보다 상세하게는 핑거 표면적을 전류 밀도에 비례하도록 형성함으로써 효율을 개선한 함몰전극형 태양전지의 제조방법에 관한 것이다.The present invention relates to a method of manufacturing a depression electrode type solar cell, and more particularly, to a method of manufacturing a depression electrode type solar cell in which efficiency is improved by forming a finger surface area to be proportional to a current density.

태양 전지는 반도체의 고유한 성질인 밴드 갭 (band gap)을 기전력으로 이용하는 것으로서, p형 반도체와 n형 반도체를 조합하여 만든다. p형 반도체와 n형 반도체가 접한 부분 (pn 접합부)에 빛이 들어오면 광에너지에 의하여 반도체 내부에서 마이너스의 전하 (전자)와 플러스의 전하 (정공)가 발생한다.A solar cell uses a band gap, which is a unique property of a semiconductor, as an electromotive force, and is made by combining a p-type semiconductor and an n-type semiconductor. When light enters the portion where the p-type semiconductor and the n-type semiconductor are in contact (pn junction), negative charges (electrons) and positive charges (holes) are generated inside the semiconductor due to light energy.

광에너지에 의해 발생된 전자와 정공은 내부의 전계에 의하여 각각 n형 반도체측과 p형 반도체측으로 이동하여 양쪽의 전극부에 모아진다. 이러한 두개의 전극을 도선으로 연결하면 전류가 흐르고 외부에서 전력으로 이용할 수 있게 된다.The electrons and holes generated by the light energy are moved to the n-type semiconductor side and the p-type semiconductor side by the internal electric field, respectively, and are collected in the both electrode portions. When these two electrodes are connected by a lead wire, current flows and can be used as an external power source.

따라서, 빛을 많이 흡수해서 전자와 정공을 최대한 많이 생성시키고 생성된 전자와 정공을 손실시키지 않고 전압 강하를 최대한 줄여서 출력을 얻음으로써 전지의 효율을 높일 수 있다.Therefore, it is possible to increase the efficiency of the battery by absorbing a lot of light to generate as much electrons and holes as possible, and to reduce the voltage drop as much as possible without losing the generated electrons and holes.

태양전지는 전극의 형태에 따라 스크린 프린팅형 태양전지 (Screen Printing Solar Cell: SPSC)와 함몰전극형 태양전지 (Buried Contact Solar Cell: BCSC)로 구분할 수 있다.Solar cells can be divided into screen printing solar cells (SPSC) and buried contact solar cells (BCSC) according to the shape of the electrodes.

SPSC는 일반적으로 제조하기가 용이하지만 금속 전극에서의 반사, 후면 전류 흐름에서 기인된 저항 및 일반적으로 깊게 도핑되어 있는 이미터 영역에서의 캐리어들의 높은 재결합으로 인하여 전지의 변환효율이 낮은 편이고 어스펙트비가 불량하다.The SPSC is generally easy to manufacture, but the conversion efficiency of the cell is low due to reflection at the metal electrode, resistance caused by the backside current flow, and high recombination of carriers in the generally deeply-doped emitter region, It is bad.

한편, BCSC에 있어 금속 전극은 반도체 기판 전면내로 깊게 패인 홈에 형성되는데, 이 전지는 SPSC와 제조원가는 거의 동일하면서 변환효율은 그보다 높은 편이다. 따라서, BCSC 전지가 미래의 상업적인 태양전지의 주류를 이루게 될 전망이다.On the other hand, in the BCSC, the metal electrode is formed in the recess deeply in the front surface of the semiconductor substrate, and the conversion efficiency is higher than that of the SPSC. Thus, BCSC cells will become the mainstream of future commercial solar cells.

도 1은 통상적인 BCSC의 구조를 도시한 도면이다. 도 1에서 참조번호 1은 p형 반도체 기판을, 2는 전면 전극을, 3은 산화막을, 4는 후면전극을 각각 나타내고, 5는 생성되는 전류를 전극으로 운반하는 역할을 하는 핑거이다.1 is a diagram showing a structure of a conventional BCSC. In FIG. 1, reference numeral 1 denotes a p-type semiconductor substrate, 2 denotes a front electrode, 3 denotes an oxide film, and 4 denotes a rear electrode. Reference numeral 5 denotes a finger which serves to transport generated current to the electrode.

그런데, 도 1에 도시된 바와 같이 종래의 함몰전극형 태양전지에 있어서는 핑거를 따라서 흐르는 전류의 밀도에 관계없이 그 횡단면적이 일정하다는 것을 알 수 있다.However, as shown in FIG. 1, it can be seen that the cross-sectional area of the conventional depressed electrode type solar cell is constant regardless of the density of the current flowing along the finger.

이처럼 핑거의 횡단면적이 전류 밀도와 관계없이 일정할 경우, 전류 밀도가 작은 곳에서는 저항에 의한 전압 강하가 작지만, 전극쪽으로 가까워질수록 핑거를 따라 운반되는 전류의 밀도가 커지기 때문에 전류 밀도가 큰 부분에서는 전압 강하가 크게 일어나고 이에 따라 많은 전력 손실이 초래된다. 더구나, 전지의 크기가 커질수록 전류 밀도가 커지게 되므로 전력 손실은 더욱 심화된다.When the cross-sectional area of the finger is constant regardless of the current density, the voltage drop due to the resistance is small in a portion where the current density is small. However, since the density of the current carried along the finger increases as the portion approaches the electrode, A large voltage drop occurs and thus a large power loss is caused. Moreover, as the size of the battery increases, the current density becomes larger, so that the power loss is further increased.

이러한 문제점을 극복하려면 핑거의 횡단면적을 크게 해주어야 하는데, 전지의 횡단면적이 커지게 되면 셰이딩 손실 (shading loss)이 증가하므로 전지의 에너지 변환효율이 저하되는 결과가 초래된다.In order to overcome this problem, it is necessary to increase the cross-sectional area of the finger. If the cross-sectional area of the battery increases, the shading loss increases and the energy conversion efficiency of the battery decreases.

따라서, 본 발명자들은 전술한 문제점들을 극복하여 전류 밀도에 따라 핑거의 횡단면적을 조절함으로써 셰이딩 손실과 전력 손실을 최소화하여 전지의 에너지 변환효율을 최대화할 수 있는 방안으로서 횡단면적이 전극쪽으로 갈수록 증가하는 삼각형의 핑거를 가지고 있는 함몰전극형 태양전지를 제안한 바 있다.Accordingly, the present inventors have found that by overcoming the above-described problems and adjusting the cross-sectional area of the finger according to the current density, the shading loss and the power loss can be minimized to maximize the energy conversion efficiency of the battery. A depressed electrode type solar cell having a triangular finger has been proposed.

도 2는 핑거가 삼각형 형태를 갖고 있는 함몰전극형 태양전지를 도시한 것이다. 도면의 부호는 전술한 바와 같다. 도 2에 도시된 바와 같이, 핑거는 전극쪽으로부터 멀어질수록 횡단면적이 감소하는 삼각형의 형태로 되어 있다.FIG. 2 shows a depressed electrode type solar cell in which the fingers have a triangular shape. The reference numerals in the drawings are as described above. As shown in FIG. 2, the fingers are in the form of a triangle whose cross-sectional area decreases as the distance from the electrode side increases.

그러나, 통상의 무전해 도금법으로는 전술한 바와 같은 삼각형의 핑거를 형성할 수가 없었다.However, in the conventional electroless plating method, the above-described triangular fingers could not be formed.

도 3을 들어 통상적인 함몰전극형 태양전지의 제조방법을 설명하기로 한다.3, a conventional method of manufacturing a depression electrode type solar cell will be described.

먼저, 텍스처링을 실시하여 p형 반도체 기판 표면에 피라미드 구조를 형성한다 (도 3의 a)). 이미터를 확산하여 pn 접합을 형성하여 n+층을 형성한 다음, 산화 공정을 실시하여 반도체 기판 전면과 후면에 산화막을 형성한다 (도 3의 b)). 이어서, 레이저 등을 이용하여 상기 반도체 기판 전면내로 홈 (groove)을 깊게 스크라이빙한 다음, 인을 확산시켜서 n++층을 형성한다 (도 3의 c)). 다음으로, 기판의 후면부에 알루미늄을 증착한 다음 소결하여 후면 전극을 형성한다 (도 3의 d)). 기판을 니켈 도금액에 담가서 상기 홈을 니켈로 무전해 도금한다 (도 3의 e)). 이어서, 기판을 구리 도금액에 담가서 상기 홈을 구리로 무전해 도금한 다음, 은 도금액에 담가서 은으로 무전해 도금한다 (도 3의 f)).First, texturing is performed to form a pyramid structure on the surface of the p-type semiconductor substrate (Fig. 3 (a)). An emitter is diffused to form a pn junction to form an n + layer, and then an oxidation process is performed to form an oxide film on the front and rear surfaces of the semiconductor substrate (FIG. 3B)). Next, a groove is deeply scribed into the entire surface of the semiconductor substrate using a laser or the like, and phosphorus is diffused to form an n ++ layer (FIG. 3C)). Next, aluminum is deposited on the rear surface of the substrate and then sintered to form a rear electrode (Fig. 3 (d)). The substrate is immersed in a nickel plating solution and the groove is electroless-plated with nickel (Fig. 3 (e)). Subsequently, the substrate is immersed in a copper plating solution, electroless-plated with copper, and immersed in a silver plating solution, followed by electroless plating with silver (FIG.

전술한 통상의 BCSC 태양전지의 제조방법에 있어서, 전면 전극 형성시에 무전해 도금법을 채용하고 있다. 그런데, 무전해 도금법에 의하면 핑거 횡단면적을 조절할 수 없다는 문제점이 있다. 즉, 도 1에 도시되어 있는 것처럼 핑거 (5)는 횡단면적이 일정하게 형성된다.In the above-described conventional BCSC solar cell manufacturing method, the electroless plating method is employed at the time of forming the front electrode. However, according to the electroless plating method, there is a problem that the crossing area of the finger can not be controlled. That is, as shown in Fig. 1, the fingers 5 are formed with a constant cross-sectional area.

본 발명이 이루고자 하는 기술적 과제는 핑거의 횡단면적이 전류 밀도 증가에 비례하도록 핑거를 형성함으로써 셰이딩 손실 및 전력 손실은 낮고 에너지 변환효율은 우수한 태양전지를 제조하는 방법을 제공하는 것이다.SUMMARY OF THE INVENTION The present invention provides a method of fabricating a solar cell having a shading loss and a low power loss and excellent energy conversion efficiency by forming fingers so that the cross sectional area of the finger is proportional to the current density increase.

도 1은 통상의 함몰전극형 태양전지의 사시도이다.1 is a perspective view of a conventional depressed electrode type solar cell.

도 2는 본 발명에 따른 함몰전극형 태양전지의 사시도이다.2 is a perspective view of a depression electrode type solar cell according to the present invention.

도 3은 통상의 함몰전극형 태양전지의 제조방법을 순차적으로 도시한 것이다.FIG. 3 sequentially shows a method of manufacturing a conventional depressed electrode type solar cell.

도 4는 본 발명에 따른 함몰전극형 태양전지의 제조시 구리 도금층을 형성할 때 사용되는 전기도금장치를 도시한 것이다.FIG. 4 illustrates an electroplating apparatus used for forming a copper plating layer in the manufacture of a depression electrode type solar cell according to the present invention.

*도면의 주요 부분에 대한 부호의 설명*Description of the Related Art [0002]

1.. p형 반도체 기판 2.. 전면전극1. p-type semiconductor substrate 2. front electrode

3.. 산화막 4.. 후면전극3. Oxide film 4. Rear electrode

5.. 핑거5. Finger

본 발명의 기술적 과제는, p형 반도체 기판에 텍스처링을 실시하여 기판 전면과 후면에 피라미드 구조를 형성하는 단계; 상기 반도체 기판에 이미터를 확산하여 p-n 접합을 형성하는 단계; 반도체 기판 전면에 산화막을 형성하는 단계; 상기 반도체 기판에 홈을 형성하는 단계; 상기 홈에 n형 불순물을 도핑하는 단계; 상기 반도체 기판 후면에 도전성 물질을 증착시킨 다음, 소결하여 후면전극을 형성하는 단계; 상기 홈내에 니켈을 무전해 도금하여 니켈 도금층을 형성하는 단계; 상기 니켈 도금층 상에 구리를 전기도금하여 구리 도금층을 형성하는 단계; 및 상기 구리 도금층 상에 은을 무전해 도금하여 은 도금층을 형성함으로써 전면 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 함몰전극형 태양전지의 제조방법에 의하여 이루어진다.The present invention provides a method of fabricating a semiconductor device, the method comprising: forming a pyramid structure on a front surface and a rear surface of a substrate by texturing a p-type semiconductor substrate; Diffusing an emitter to the semiconductor substrate to form a p-n junction; Forming an oxide film on the entire surface of the semiconductor substrate; Forming a groove in the semiconductor substrate; Doping the groove with an n-type impurity; Depositing a conductive material on the rear surface of the semiconductor substrate, and then sintering the conductive material to form a rear electrode; Electroless plating nickel in the groove to form a nickel plating layer; Electroplating copper on the nickel plating layer to form a copper plating layer; And forming a front electrode by electroless plating silver on the copper plating layer to form a silver plating layer on the copper plating layer.

본 발명에 따른 함몰전극형 태양전지의 제조방법에 있어서, 니켈 도금층은 기판을 도금액에 침지시키고 질소 분위기 하에서 350 내지 400℃로 10 내지 20분 동안 무전해 도금함으로써 형성되며, 그 두께는 0.8 내지 1.2㎛인 것이 바람직하다.In the method of manufacturing a depression electrode type solar cell according to the present invention, the nickel plating layer is formed by immersing the substrate in a plating solution and electroless plating at 350 to 400 DEG C under a nitrogen atmosphere for 10 to 20 minutes, and its thickness is 0.8 to 1.2 Mu m.

또한, 구리 도금층은 기판을 구리 전해액조에 넣고 기판에 전극을 연결한 다음, 전류량을 0.5 내지 2A 범위에서 조절하면서 전기 도금함으로써 형성된다. 이때, 전류량을 초기에는 적게 하다가 차츰 증가시키면서 조절한다. 이렇게 전기 도금법에 의하여 구리 도금층을 형성하면 전극 부분으로부터 멀어질수록 핑거의 횡단면적이 감소하게 되므로 핑거가 삼각형의 형태를 갖게 된다.The copper plating layer is formed by placing a substrate in a copper electrolyte bath, connecting electrodes to the substrate, and then electroplating while adjusting the amount of current in the range of 0.5 to 2 A. At this time, the amount of current is initially reduced and then gradually increased. When the copper plating layer is formed by the electroplating method, the cross-sectional area of the finger decreases as the distance from the electrode portion decreases, so that the finger has a triangular shape.

도 4는 본 발명에 따른 함몰전극형 태양전지의 제조시 구리 도금층을 형성할 때 사용되는 전기도금장치를 도시한 것이다.FIG. 4 illustrates an electroplating apparatus used for forming a copper plating layer in the manufacture of a depression electrode type solar cell according to the present invention.

도 4에 도시된 바와 같이, 기판을 구리 전해액조에 침지시키고, 광원을 조사하면서 기판의 전면에 전압을 인가하여 기판 전면에 형성되어 있는 홈내를 구리로 채운다. 전압 인가시 전류량을 조절함으로써 핑거의 횡단면적을 조절할 수 있다.As shown in FIG. 4, a substrate is immersed in a copper electrolyte bath, and a voltage is applied to the entire surface of the substrate while irradiating a light source to fill the inside of the groove formed on the substrate with copper. When the voltage is applied, the cross-sectional area of the finger can be adjusted by controlling the amount of current.

본 발명에 따라 제조된 함몰전극형 태양전지는 전기 도금법을 이용하여 핑거를 도금함으로써 핑거의 표면적을 종래의 ½로 감소시키면서도 전류 밀도 증가에 따른 전압 손실을 크게 줄일 수 있을 뿐 아니라, 핑거의 표면적 감소에 따른 셰이딩 손실 감소 효과도 얻을 수 있다. 따라서, 본 발명에 따른 함몰전극형 태양전지는 에너지 변환효율이 매우 우수하다.The depressed electrode type solar cell manufactured according to the present invention can reduce the surface area of the finger by a factor of 2 by plating the finger using the electroplating method, and can significantly reduce the voltage loss due to the increase of the current density, The shading loss reduction effect can be obtained. Therefore, the depression electrode type solar cell according to the present invention has excellent energy conversion efficiency.

Claims (4)

a) p형 반도체 기판에 텍스처링을 실시하여 기판 전면과 후면에 피라미드 구조를 형성하는 단계;a) forming a pyramid structure on the front and back surfaces of the substrate by texturing the p-type semiconductor substrate; b) 상기 반도체 기판에 이미터를 확산하여 p-n 접합을 형성하는 단계;b) diffusing an emitter to the semiconductor substrate to form a p-n junction; c) 반도체 기판 전면에 산화막을 형성하는 단계;c) forming an oxide film on the entire surface of the semiconductor substrate; d) 상기 반도체 기판에 홈을 형성하는 단계;d) forming a groove in the semiconductor substrate; e) 상기 홈에 n형 불순물을 도핑하는 단계;e) doping the trench with an n-type impurity; f) 상기 반도체 기판 후면에 도전성 물질을 증착시킨 다음, 소결하여 후면전극을 형성하는 단계;f) depositing a conductive material on the rear surface of the semiconductor substrate and then sintering to form a rear electrode; g) 상기 홈내에 니켈을 무전해 도금하여 니켈 도금층을 형성하는 단계;g) electroless plating of nickel in the groove to form a nickel plated layer; h) 상기 니켈 도금층 상에 구리를 전기도금하여 구리 도금층을 형성하는 단계; 및h) electroplating copper on the nickel plating layer to form a copper plating layer; And i) 상기 구리 도금층 상에 은을 무전해 도금하여 은 도금층을 형성함으로써 전면 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 함몰전극형 태양전지의 제조방법.and i) forming a silver plating layer by electroless plating silver on the copper plating layer to form a front electrode. 제1항에 있어서, 상기 단계 g)에서 무전해 도금이 질소 분위기하에 350 내지 400℃에서 10 내지 20분 동안 실시되는 것을 특징으로 하는 함몰전극형 태양전지의 제조방법.The method of claim 1, wherein the electroless plating is performed in a nitrogen atmosphere at 350 to 400 ° C for 10 to 20 minutes in step g). 제1항에 있어서, 상기 니켈 도금층의 두께가 0.8 내지 1.2㎛인 것을 특징으로 하는 함몰전극형 태양전지의 제조방법.The method according to claim 1, wherein the thickness of the nickel plating layer is 0.8 to 1.2 탆. 제1항에 있어서, 상기 단계 h)에서 전기 도금시 전류량을 0.5 내지 2A 범위에서 점차 증가하도록 조절하는 것을 특징으로 하는 함몰전극형 태양전지의 제조방법.The method according to claim 1, wherein the amount of current during the electroplating in step h) is adjusted so as to gradually increase in a range of 0.5 to 2A.
KR1019960037674A 1996-08-31 1996-08-31 Process for preparing buried contact solar cell KR100374811B1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102157626A (en) * 2011-03-22 2011-08-17 上海采日光伏技术有限公司 Method for reducing contact resistance between emitter and buried gate of solar battery
KR101371865B1 (en) * 2012-10-16 2014-03-10 현대중공업 주식회사 Front electrode structure of solar cell and fabricating method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102157626A (en) * 2011-03-22 2011-08-17 上海采日光伏技术有限公司 Method for reducing contact resistance between emitter and buried gate of solar battery
CN102157626B (en) * 2011-03-22 2013-02-13 上海采日光伏技术有限公司 Method for reducing contact resistance between emitter and buried gate of solar battery
KR101371865B1 (en) * 2012-10-16 2014-03-10 현대중공업 주식회사 Front electrode structure of solar cell and fabricating method thereof

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