JPWO2019008482A1 - 表示システム、および表示システムの動作方法 - Google Patents
表示システム、および表示システムの動作方法 Download PDFInfo
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Abstract
Description
本実施の形態では、本発明の一態様である表示システムについて、図面を参照して説明する。
図1は、本発明の一態様の表示システムである表示システム10の構成例を示すブロック図である。表示システム10は、撮像装置20、制御装置30、および表示装置40を有する。
図5は、図1に示す表示システム10の変形例を示すブロック図である。図5に示す構成の表示システム10は、解析回路31および階調決定回路32の他、記憶回路33および予測回路34を有する点が、図4に示す構成の表示システム10と異なる。
次に、図5に示す構成の表示システム10の動作方法の一例について、図6および図7を用いて説明する。図6は、当該動作方法の一例を示すフローチャートである。
次に、撮像装置20の詳細な構成例について、図8乃至図14を用いて詳細に説明する。
図8(A)は、画素21の回路構成例を説明する図である。つまり、図8(A)は、撮像装置20が有する画素回路の構成例を説明する図である。図8(A)に示す構成の画素21は、光電変換素子150と、トランジスタ151と、トランジスタ152と、トランジスタ153と、トランジスタ154と、容量素子155と、を有する。
図9(A)に、上述した画素回路を有する画素21の構成例を示す。図9(A)に示す画素は、層161および層162の積層構成を有する例である。
図13(A)は、本発明の一態様の撮像装置の画素にカラーフィルタ等を付加した例を示す斜視図である。当該斜視図では、複数の画素の断面もあわせて図示している。光電変換素子150が形成される層161上には、絶縁層180が形成される。絶縁層180は可視光に対して透光性の高い酸化シリコン膜等を用いることができる。また、パッシベーション層として窒化シリコン膜を積層してもよい。また、反射防止層として、酸化ハフニウム等の誘電体膜を積層してもよい。
以下では、イメージセンサチップを収めたパッケージおよびカメラモジュールの一例について説明する。当該イメージセンサチップには、上記撮像装置の構成を用いることができる。
次に、表示装置40の詳細な構成例について、図15乃至図17を用いて説明する。
図15(A)は、画素41の回路構成例を説明する図である。つまり、図15(A)は、表示装置40が有する画素回路の構成例を説明する図である。図15(A)に示す構成の画素41は、トランジスタ3431と、容量素子3233と、液晶素子3432と、を有する。
容量素子3233はノード3435に書き込まれたデータを保持する保持容量としての機能を有する。
図16(A)および図17(A)に、図15(A)に示す画素回路を有する画素41の構成例を示す。図16(B)および図17(B)に、図15(B)に示す画素回路を有する画素41の構成例を示す。
次に、図5に示す記憶回路33の詳細な構成例について、図18および図19を用いて説明する。図18は、記憶回路33の構成例を説明するブロック図である。図18に示すように、記憶回路33は、コントローラ1405、行回路1410、列回路1415、メモリセルおよびセンスアンプアレイ1420(以下、「MC−SAアレイ1420」と呼ぶ。)を有する。
MC−SAアレイ1420は、メモリセルアレイ1422をセンスアンプアレイ1423上に積層した積層構造をもつ。グローバルビット線GBLL、GBLRはメモリセルアレイ1422上に積層されている。記憶回路33では、ビット線の構造に、ローカルビット線とグローバルビット線とで階層化された階層ビット線構造が採用されている。
本実施の形態では、上記の実施の形態で説明したニューラルネットワークに用いることが可能な半導体装置の構成例について説明する。
図21に、ニューラルネットワークの演算を行う機能を有する半導体装置MACの構成例を示す。半導体装置MACは、ニューロン間の結合強度(重み)に対応する第1のデータと、入力データに対応する第2のデータの積和演算を行う機能を有する。なお、第1のデータおよび第2のデータはそれぞれ、アナログデータまたは多値のデジタルデータ(離散的なデータ)とすることができる。また、半導体装置MACは、積和演算によって得られたデータを活性化関数によって変換する機能を有する。
上記の半導体装置MACを用いて、第1のデータと第2のデータの積和演算を行うことができる。以下、積和演算を行う際の半導体装置MACの動作例を説明する。
まず、時刻T01−T02において、配線WL[1]の電位がハイレベルとなり、配線WD[1]の電位が接地電位(GND)よりもVPR−VW[1,1]大きい電位となり、配線WDrefの電位が接地電位よりもVPR大きい電位となる。また、配線RW[1]、および配線RW[2]の電位が基準電位(REFP)となる。なお、電位VW[1,1]はメモリセルMC[1,1]に格納される第1のデータに対応する電位である。また、電位VPRは参照データに対応する電位である。これにより、メモリセルMC[1,1]およびメモリセルMCref[1]が有するトランジスタTr11がオン状態となり、ノードNM[1,1]の電位がVPR−VW[1,1]、ノードNMref[1]の電位がVPRとなる。
次に、時刻T05−T06において、配線RW[1]の電位が基準電位よりもVX[1]大きい電位となる。このとき、メモリセルMC[1,1]、およびメモリセルMCref[1]のそれぞれの容量素子C11には電位VX[1]が供給され、容量結合によりトランジスタTr12のゲートの電位が上昇する。なお、電位Vx[1]はメモリセルMC[1,1]およびメモリセルMCref[1]に供給される第2のデータに対応する電位である。
本実施の形態、本発明の一態様で開示されるトランジスタに用いることができるCAC(Cloud−Aligned Composite)−OSの構成について説明する。
本実施の形態では、本発明の一態様の表示システムを適用可能な移動体の例について説明する。
Claims (7)
- 撮像装置と、制御装置と、表示装置と、を有する表示システムであって、
前記撮像装置は、マトリクス状に配置された第1の画素を有し、
前記表示装置は、マトリクス状に配置された第2の画素を有し、
前記撮像装置は、前記第1の画素に照射された光の照度を基にして、第1の画像データを生成する機能を有し、
前記制御装置は、前記第1の画像データを基に、ヒストグラム作成する機能を有し、
前記制御装置は、前記ヒストグラムを、二以上の照度域に分割する機能を有し、
前記制御装置は、前記第1の画像データが情報として有する、前記第1の画素に照射された光の照度に対応する階調を変換することにより、前記第1の画像データに対してダイナミックレンジ圧縮を行った第2の画像データを生成する機能を有し、
前記制御装置は、それぞれの前記照度域における前記ヒストグラムの積分値を基に、前記ダイナミックレンジ圧縮における圧縮率を、前記照度域ごとに計算する機能を有する表示システム。 - 請求項1において、
前記積分値が大きい前記照度域における前記圧縮率は、前記積分値が小さい前記照度域における前記圧縮率より小さい表示システム。 - 請求項1において、
前記制御装置は、ニューラルネットワークを有し、
前記ニューラルネットワークは、前記第1の画像データを基にして、前記第1の画像データが取得されたフレーム期間より後のフレーム期間において前記撮像装置が取得する第3の画像データを予測する機能を有する表示システム。 - 請求項3において、
前記制御装置は、前記第3の画像データを基にして、前記圧縮率を更新するか否かを判定する機能を有する表示システム。 - 第1の画素がマトリクス状に配列された撮像装置と、制御装置と、第2の画素がマトリクス状に配列された表示装置と、を有する表示システムの動作方法であって、
前記撮像装置が、前記第1の画素に照射された光の照度を基にして、第1の画像データを生成し、
前記制御装置が、前記第1の画像データを基に、ヒストグラムを作成し、
前記制御装置が、前記ヒストグラムを、二以上の照度域に分割し、
前記制御装置が、前記第1の画像データが情報として有する、前記第1の画素に照射された光の照度に対応する階調を変換することにより、それぞれの前記照度域における前記ヒストグラムの積分値を基に前記照度域ごとに計算した圧縮率で、前記第1の画像データに対してダイナミックレンジ圧縮を行った第2の画像データを生成する機能を有する表示システムの動作方法。 - 請求項5において、
前記積分値が大きい前記照度域における前記圧縮率が、前記積分値が小さい前記照度域における前記圧縮率より小さくなるように、前記第1の画像データに対して前記ダイナミックレンジ圧縮を行う表示システムの動作方法。 - 請求項5において、
前記制御装置は、ニューラルネットワークを有し、
前記ニューラルネットワークにより、前記第1の画像データを基にして、前記第1の画像データが取得されたフレーム期間より後のフレーム期間において前記撮像装置が取得する第3の画像データを予測し、
前記第3の画像データを基に、前記圧縮率を更新するか否かを判定する表示システムの動作方法。
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CN108766349B (zh) * | 2018-06-19 | 2021-03-23 | 京东方科技集团股份有限公司 | 像素电路及其驱动方法、阵列基板、显示面板 |
WO2021064511A1 (ja) * | 2019-10-04 | 2021-04-08 | 株式会社半導体エネルギー研究所 | 半導体装置および判定システム |
CN116472575A (zh) * | 2021-11-18 | 2023-07-21 | 瑞仪光电(苏州)有限公司 | 显示装置、电流校正值的建立方法与电流校正*** |
CN114220371A (zh) * | 2021-12-10 | 2022-03-22 | 西安诺瓦星云科技股份有限公司 | 全灰阶逐点校正方法及相关装置 |
JP2023110325A (ja) * | 2022-01-28 | 2023-08-09 | キヤノン株式会社 | カメラシステム、移動体、カメラシステムの制御方法、及びコンピュータプログラム |
WO2023172679A1 (en) * | 2022-03-11 | 2023-09-14 | Applied Materials, Inc. | Display pixels made from stacked micro-led structures and photoluminescent materials |
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CN110945861A (zh) | 2020-03-31 |
US20210150994A1 (en) | 2021-05-20 |
KR20200024275A (ko) | 2020-03-06 |
JP7167022B2 (ja) | 2022-11-08 |
KR102480182B1 (ko) | 2022-12-21 |
WO2019008482A1 (ja) | 2019-01-10 |
CN110945861B (zh) | 2022-11-29 |
DE112018003456T5 (de) | 2020-03-19 |
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