JPWO2014087543A1 - 半導体装置の製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 97
- 238000004519 manufacturing process Methods 0.000 title claims description 40
- 239000000758 substrate Substances 0.000 claims abstract description 49
- 238000009792 diffusion process Methods 0.000 claims abstract description 30
- 239000012535 impurity Substances 0.000 claims abstract description 24
- 239000010408 film Substances 0.000 claims description 58
- 239000010409 thin film Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 6
- 238000011084 recovery Methods 0.000 description 14
- 230000015556 catabolic process Effects 0.000 description 9
- 230000000694 effects Effects 0.000 description 5
- 230000006378 damage Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000002829 reductive effect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000035515 penetration Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 1
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
Description
図1及び図2は、本発明の実施の形態1に係る半導体装置の製造方法を示す断面図である。
図3は、本発明の実施の形態2に係る半導体装置の製造方法を示す断面図である。写真製版とエッチングを複数行うことにより薄膜5の膜厚t1と薄膜6の膜厚t2が異なるようにしている。ここではt1>t2であるため、活性領域のp型アノード層7のドーズ量は、終端領域のp型リング層8のドーズ量よりも低くなる。そして、実施の形態1と同様にn−型半導体基板1を回転させながらn−型半導体基板1の主面の法線方向から20°以上傾斜させた方向から薄膜5,6を介してn−型半導体基板1に不純物を注入し、高温ドライブを行う。
図4は、本発明の実施の形態3に係る半導体装置の製造方法を示す断面図である。開口3を形成する際に、開口3の終端領域側の端部に薄膜15を残す。薄膜5,15を介してn−型半導体基板1に不純物を注入してp型アノード層7を形成する。薄膜15の膜厚t3は薄膜5の膜厚t1よりも薄く(t1>t3)、例えばt3の膜厚はt2と同じ膜厚又はt2とt1の間の膜厚に設定する。そして、実施の形態1と同様にn−型半導体基板1を回転させながらn−型半導体基板1の主面の法線方向から20°以上傾斜させた方向からn−型半導体基板1に不純物を注入し、高温ドライブを行う。
図5は、本発明の実施の形態4に係る半導体装置の製造方法を示す断面図である。薄膜5に複数の段差を設けている。これによりp型アノード層7のドーズ量を調整することができる。その他の構成及び効果は実施の形態3と同様である。
図6は、本発明の実施の形態5に係る半導体装置の製造方法を示す断面図である。開口3の終端領域側の端部において薄膜5の膜厚はt4であり、薄膜5の他の部分の膜厚t1より厚い(t4>t1)。そして、実施の形態1と同様にn−型半導体基板1を回転させながらn−型半導体基板1の主面の法線方向から20°以上傾斜させた方向から薄膜5,6を介してn−型半導体基板1に不純物を注入し、高温ドライブを行う。
図7は、本発明の実施の形態6に係る半導体装置の製造方法を示す断面図である。開口3の終端領域側の端部において薄膜5に傾斜が設けられ、薄膜5の膜厚は終端領域側に向かうほど厚くなる。これにより、実施の形態5と同様の効果を得ることができる。
図8は、本発明の実施の形態7に係る半導体装置の製造方法を示す断面図及び上面図である。ただし、上面図において酸化膜2は省略している。
図9は、本発明の実施の形態8に係る半導体装置の製造方法を示す断面図及び上面図である。本実施の形態では薄膜17がドット状であるためp型アノード層20もドット状となる。その他の構成は実施の形態7と同様であり、実施の形態7と同様の効果を得ることができる。
Claims (8)
- 活性領域と終端領域を有する半導体基板の主面上に絶縁膜を形成し、前記活性領域上の前記絶縁膜をエッチングして第1の開口を形成する工程と、
前記絶縁膜をマスクとして用いて、前記半導体基板を回転させながら前記半導体基板の前記主面の法線方向から20°以上傾斜させた方向から前記半導体基板に不純物を注入して、前記活性領域に拡散層を形成する工程とを備え、
前記拡散層は、前記第1の開口よりも前記終端領域側の前記絶縁膜の下方まで延びることを特徴とする半導体装置の製造方法。 - 前記終端領域上の前記絶縁膜をエッチングして第2の開口を前記第1の開口と同時に形成する工程と、
前記半導体基板に前記不純物を注入して、前記活性領域に前記拡散層を形成するのと同時に、前記終端領域にリング層を形成する工程とを更に備えることを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記第1及び第2の開口を形成する際に、前記第1の開口内に第1の薄膜を残し、前記第2の開口内に第2の薄膜を残し、
前記第1及び第2の薄膜を介して前記半導体基板に前記不純物を注入して前記拡散層と前記リング層を形成することを特徴とする請求項2に記載の半導体装置の製造方法。 - 前記第1及び第2の薄膜の膜厚は異なることを特徴とする請求項3に記載の半導体装置の製造方法。
- 前記第1の開口を形成する際に、前記第1の開口の前記終端領域側の端部に第3の薄膜を残し、
前記第3の薄膜の膜厚は前記第1の薄膜よりも薄く、
前記第1及び第3の薄膜を介して前記半導体基板に前記不純物を注入して前記拡散層を形成することを特徴とする請求項3又は4に記載の半導体装置の製造方法。 - 前記第1の開口の前記終端領域側の端部において、前記第1の薄膜の膜厚は前記終端領域側に向かうほど厚くなることを特徴とする請求項3又は4に記載の半導体装置の製造方法。
- 活性領域と終端領域を有する半導体基板の主面上に絶縁膜を形成し、前記活性領域上の前記絶縁膜をエッチングして膜厚の異なる第1及び第2の薄膜を残す工程と、
前記第1及び第2の薄膜を介して前記半導体基板に不純物を注入して、前記活性領域に不純物濃度が異なる第1及び第2の拡散層を形成する工程とを備えることを特徴とする半導体装置の製造方法。 - 前記第2の拡散層はストライプ状又はドット状であることを特徴とする請求項7に記載の半導体装置の製造方法。
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