JPS6481341A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6481341A
JPS6481341A JP24000287A JP24000287A JPS6481341A JP S6481341 A JPS6481341 A JP S6481341A JP 24000287 A JP24000287 A JP 24000287A JP 24000287 A JP24000287 A JP 24000287A JP S6481341 A JPS6481341 A JP S6481341A
Authority
JP
Japan
Prior art keywords
wirings
film
layers
aluminum
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24000287A
Other languages
Japanese (ja)
Other versions
JPH065694B2 (en
Inventor
Tetsuya Okuzumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24000287A priority Critical patent/JPH065694B2/en
Publication of JPS6481341A publication Critical patent/JPS6481341A/en
Publication of JPH065694B2 publication Critical patent/JPH065694B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the opening phenomenon of an internal electronic circuit from occurring by interposing a diffused layer between a polycrystalline silicon fuse film and aluminum wirings to the electronic circuit, and mechanically dividing the aluminum wirings in a polycrystalline silicon fuse memory into two sections. CONSTITUTION:A field oxide film 2 formed on a P-type silicon substrate 1, two n<+> type diffused layers 9 isolated from one another on the substrate 1 and insularly disposed oppositely to be surrounded at its periphery with a field oxide film 2, a polycrystalline silicon fuse film 3 including a fuse 3a formed on the film 2 of the isolating region of the two layers 9, aluminum connecting wirings 5a extended from both ends of the film 2 and aluminum wirings 9 to an internal electronic circuit are connected by contact holes 5, 11 through the layers 9. The layers 9 are operated as wiring layers to effectively prevent the corrosion disconnection of aluminum connecting wirings 6a generated when the film 3 is disconnected between the wirings 6a and 6 from affecting to the wirings 6.
JP24000287A 1987-09-24 1987-09-24 Semiconductor device Expired - Lifetime JPH065694B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24000287A JPH065694B2 (en) 1987-09-24 1987-09-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24000287A JPH065694B2 (en) 1987-09-24 1987-09-24 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6481341A true JPS6481341A (en) 1989-03-27
JPH065694B2 JPH065694B2 (en) 1994-01-19

Family

ID=17053002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24000287A Expired - Lifetime JPH065694B2 (en) 1987-09-24 1987-09-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH065694B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008066599A (en) * 2006-09-08 2008-03-21 Nec Electronics Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008066599A (en) * 2006-09-08 2008-03-21 Nec Electronics Corp Semiconductor device
US7791111B2 (en) 2006-09-08 2010-09-07 Nec Electronics Corporation Semiconductor device with an opening for cutting a fuse

Also Published As

Publication number Publication date
JPH065694B2 (en) 1994-01-19

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