JPS6448040U - - Google Patents

Info

Publication number
JPS6448040U
JPS6448040U JP14251187U JP14251187U JPS6448040U JP S6448040 U JPS6448040 U JP S6448040U JP 14251187 U JP14251187 U JP 14251187U JP 14251187 U JP14251187 U JP 14251187U JP S6448040 U JPS6448040 U JP S6448040U
Authority
JP
Japan
Prior art keywords
hybrid
utility
model registration
chamfered
paragraph
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14251187U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14251187U priority Critical patent/JPS6448040U/ja
Publication of JPS6448040U publication Critical patent/JPS6448040U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す平面図、第
2図はその側面図である。 図中、1はハイブリツドIC、2はIC基板、
3は半導体ICチツプ、4は陵部、5は樹脂モー
ルドである。
FIG. 1 is a plan view showing an embodiment of this invention, and FIG. 2 is a side view thereof. In the figure, 1 is a hybrid IC, 2 is an IC board,
3 is a semiconductor IC chip, 4 is a ridge, and 5 is a resin mold.

Claims (1)

【実用新案登録請求の範囲】 (1) ICが形成された基板部表面に外付けの素
子を搭載してなるハイブリツドICにおいて、外
付け素子の周縁の陵部が面取り加工されているこ
とを特徴とするハイブリツドIC。 (2) 実用新案登録請求の範囲第1項において、
面取り加工が曲面状に施されていることを特徴と
するハイブリツドIC。 (3) 実用新案登録請求の範囲第1項において、
面取り加工が傾斜面状に施されていることを特徴
とするハイブリツドIC。
[Claims for Utility Model Registration] (1) A hybrid IC in which an external element is mounted on the surface of a substrate on which an IC is formed, characterized in that a ridged portion on the periphery of the external element is chamfered. Hybrid IC. (2) In paragraph 1 of the claims for utility model registration,
A hybrid IC characterized by a curved surface that is chamfered. (3) In paragraph 1 of the claims for utility model registration,
A hybrid IC characterized by chamfering in the form of an inclined surface.
JP14251187U 1987-09-18 1987-09-18 Pending JPS6448040U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14251187U JPS6448040U (en) 1987-09-18 1987-09-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14251187U JPS6448040U (en) 1987-09-18 1987-09-18

Publications (1)

Publication Number Publication Date
JPS6448040U true JPS6448040U (en) 1989-03-24

Family

ID=31408531

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14251187U Pending JPS6448040U (en) 1987-09-18 1987-09-18

Country Status (1)

Country Link
JP (1) JPS6448040U (en)

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