JPS63500344A - ハイブリッド回路で電気回路を製造する方法 - Google Patents

ハイブリッド回路で電気回路を製造する方法

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Publication number
JPS63500344A
JPS63500344A JP61500710A JP50071086A JPS63500344A JP S63500344 A JPS63500344 A JP S63500344A JP 61500710 A JP61500710 A JP 61500710A JP 50071086 A JP50071086 A JP 50071086A JP S63500344 A JPS63500344 A JP S63500344A
Authority
JP
Japan
Prior art keywords
protective layer
bonding
photoresist
adhesive
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61500710A
Other languages
English (en)
Inventor
キユツトナー，クラウス
マイアー，ベルンハルト
Original Assignee
ロ−ベルト　ボツシユ　ゲゼルシヤフト　ミツト　ベシユレンクテル　ハフツング
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ロ−ベルト　ボツシユ　ゲゼルシヤフト　ミツト　ベシユレンクテル　ハフツング filed Critical ロ−ベルト　ボツシユ　ゲゼルシヤフト　ミツト　ベシユレンクテル　ハフツング
Publication of JPS63500344A publication Critical patent/JPS63500344A/ja
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるため要約のデータは記録されません。

Description

【発明の詳細な説明】 従来の技術 本発明は、独立請求項に記載した形式のハイブリッド技術で電気回路を製造する 方法に関する。この種の回路は原理的に公知である。この場合、インデイング結 合の均一な品質を保証するためには、少なくとも貴金属、好ましくは金から成る ゼンデイング面が利用される、それというのも該金属は、接着剤の硬化工程中に 発生するほとんど全ての物理的かつ化学的プロセスに対してかつ硬化の際に放出 される物質に対して不感性であるからである。例えば銅のような卑金属は硬化工 程の高められた温度で空気酸素が存在すると酸化を起す、従って保護ガス雰囲気 が必要となる。付加的に、接着位置の周囲で卑金属と、接着剤から放出される物 質との反応が生じ、該反応は導体路のインディング性を著しく低下しかつまた保 護ガス装入量を高めるか又は硬化前又はその間の接着剤のガス抜ぎを行っても阻 止することができない。
卑金属を使用するとジンディング処理のために特定された表面の湿式化学的清浄 化は、一般に同様に電子素子が施されているために不可能である。従って、本発 明の課題は、電気素子例えば半導体−１抵抗−及び／又はコンデンサチップを銅 又はその他のデンディング可能な卑金属から成る導体路網内に接着剤を用いて固 定することができ、しかもその際卑金属から成る表面のビンディング性が接着剤 の硬化工程によって劣化されない方法を開発することであった。
発明の効果 独立請求項の特徴部分に記載の特徴を有する本発明による方法は、簡単な処理工 程で、卑金属から成る表面、特に導体路及び接続面のインディング性を、ハイブ リッド技術における電気回路の製造及び取付は工程の全体に亘って保証すること を可能にするという利点を有する。前記保護層は容易に施されかつ接着剤、特に 元来条件付きでのみ有効であるにすぎないエポキシ系接着剤の硬化工程中の保護 雰囲気の調製を省くことができる。
従属請求項に記載の手段により、独立請求項に記載の方法の有利な実施態様及び 改良が可能である。特に、保護層を、１つ以上の素子の接着の前に平面状で基板 全面に施されかつ接着位置からまず選択的に、好ましくは露光及び現像によシ除 去されるホトレジストから形成するのが有利である。
保護層としてのホトレジストは、素子の接着後に別の接着処理又は別の加工処理 を実施するために再度選択的に除去するか、又は簡単な方法で、特に有機溶剤に より、完全に除去することができる。従ってこの場合には、素子の接着中及び接 着剤の熱処理中に、接着過程に不利に影響しうる、卑金属から成る表面での、接 着過程にとって有害な反応の発生が確実に阻止される。全面被覆の１つの有利な 選択的方法は、電気回路の被覆すべき領域だけにシルクスクリン印刷によシ保護 層を選択的に施すことより成り、この場合保護層は好ましくははんだレジスト（ はんだ停止ラッカー）から形成される。基板としては、好ましくはシリコン基板 が用いられ、卑金属導体路及び接続面としては、特に銅から成るものが適当であ る。接着剤としては、１００°Ｃ〜４００℃の温度で急速にかつ問題無く硬化可 能であるエポキシ系接着剤が有利に利用される。好ましくは、本方法を促進する ために、保護層を同様に前乾燥のだめの熱処理にかけ、該熱処理を約８０℃未満 の温度で行う。
インデイング結合は好ましくは熱圧着又は超音波を用いた溶液により行う。素子 と導体路又はその他の銅から成る表面との電気的接続部材としては、金から成る インＰディングワイヤを使用するのが有利である。
本発明における一ンデイング性の卑金属としては、電気化学的電圧列で＋０，６ ■よりも低い水素に対する標準電位を有する金属が理解されるべきである。この ような金属としては、ハイブリッド技術で電気回路を製造するだめの本発明によ る方法においては特に銅及びアルミニウムが挙げられる。
図面 図面には、本発明方法に基づき製造された電気回路の１実施例が示されており、 以下にそれについて詳細に説明する。第１図〜第５図は、操作過程の種々の段階 を示す。
実施例の記載 図面には１０で基板が示されており、該基板は好ましくはシリコンから成る。そ の代りに、銅被覆した工・ポキン系材料を使用することもできる。基板１０上を 導体路１１が延び、該導体路間に接続面１２が示されている。
第１図から明らかなように、基板１０の全面に、導体路及び接続面をおおうよう に、保護層１３が施されている。接着剤１４を用いて、接続面１２上に素子１５ が固定される（第３図〜第５図）。素子１５はインディングワイヤ１６によって 導体路１１上の表面と接続されている。
本発明による方法は、以下のようにして実施する。
基板１０、導体路１１及び接続面１２に、全面的にホトレジストから成る保護層 を施しかつ８０℃未満の温度で前乾燥する。ホトレジストとしては、例えば５Ｈ ＩＰＬＥＹ　社ノｉ品Ａ　Ｚ　１３５０　Ｊ　を使用−ｆ；６゜ホトレジストは 片面又は両面に施すことができ、その際後者は浸漬法でよシ簡単に実施可能であ る。第１図は、施されかつ前乾燥された保護層を有する基板を示す。
保護層のその都度要求される結像精度に基づき、選択的にはんだレジストラッカ ーをシルクスクリン印刷法で施すこともできる。この際の配置はほぼ第２図に示 した配置に相当し、この際には選択的に導体路１１の被覆されるべき領域だけに ラッカーが被覆されている。はんだレジストラッカーとしては、例えば　Ｗ。
Ｐｅｔｅｒｓ　ＫＧ社の製品ＷＥＰＥＬＡＮ　ＳＤ　２１５４　Ｐ、ブルー、を 使用することができる。
第２図は、第１図に示した保護層の全面塗布後の第２工程を示す。素子１５が接 着されるべき位置で、保護層１３のホトレジストは選択的露光後に現像液によっ て溶解除去されている。従って、接続面１２は素子１５を接着するために露出し ており、一方導体路１１の表面１７は保護層１３でなおおおわれている。
第３図は、接続面１２にエポキシ系接着剤を用いて素子１５としての半導体ＩＣ が接着されかつ接着剤が硬化した処理状態を示す。接着剤の硬化は、１００℃〜 ４００℃の温度、好ましくは１２０℃よりも高い温度で行い、この際には一般に 接着剤の製造元の指定に留意すべきである。図示の素子１５の他に、もちろん別 の素子を回路内に接着しかつ別の電子素子をシリコン基板１０内に集積すること ができる。
第４図は、有機溶剤を用いて保護層１３のホトレジストが完全に除去された状態 を示す。ホトレジストを一部分だけ除去すべき場合には、この除去は相応する領 域の新たな露光及び現像によシ行うことができる。
第５図は、本発明方法に基づき製造された完成した電気回路を示し、この場合に は例えば素子１５としての半導体ＩＣは金から成るインディングワイヤ１６によ り銅から成る導体路１１と接続されている。インディング性の、但しその他の点 では接着剤の硬化の際に作用を受ける、卑金属の銅の表面は、本発明方法によシ 全接着工程中に保護されている、従ってインディング性は劣化されずかつ銅から 成る廉価なかつ電気的に良伝導性の導体路を使用することができる。本発明によ る方法の適用は、前記実施例に制限されるものではなく、特に保護層１３のため に別のラッカー又は物質をかつ導体路１１として別の卑金属を使用することがで きる。銅の他に、好ましくは同様にアルミニウムから成るぎンデイングワイヤが 固定可能であるアルミニウム導体路が特に適当である。
手続補正書（方式） ％式％ １、事件の表示　ＰＣＴ／ＤＥ　８６１０００１１、発明の名称 ・・４７９７１回路で電気回路を製造する方法３、補正をする者 事件との関係特許出願人 住　所　〒１００　東京都千代田区丸の内３丁目３番１号昭和６２年　９月　８ 日　（発送日） ６、補正の対象 所定の書面の発明の名称の欄 悶　野　ｔＩｌ　審　餠　宍 ＡＮＮＥＸ　Ｔｏ　ＴＨＥ　ＩＮＴＥＲＮＡＴ！０ＮＡｒ、５ＥＡＲＣＨＲＥＰ ＯＲＴ　ＯＮ

Claims (1)

  1. 【特許請求の範囲】 １．少なくとも１つの電気素子（１５）、特に半導体一、抵抗−及び／又はコン デンサチツプを接着剤（１４）を用いて導体路網内に固定しかつボンデイングに よつて少なくとも１つの導体路（１１）及び／又は別の素子（１５）と電気的に 接続することにより、ハイブリツド技術で電気回路を製造する方法において、ボ ンデイング処理のために特定された、ボンデイング可能な卑金属から成る面（１ １，１７）を形成しかつ接着過程及び高めた温度で実施される、接着剤（１４） の硬化過程中に保護層（１３）によつて被覆し、該保護層をボンデイング処理前 に除去することを特徴とする、ハイブリツド技術で電気回路を製造する方法。 ２．保護層（１３）をホトレジストから形成し、該ホトレジストを素子（１５） の接着前に面状で、導体路（１１）及び／又は接続面（１２）を有する基板（１ ０）上に施し、接着位置からまず選択的に除去しかつ素子（１５）の接着及び接 着剤（１４）の熱処理後に完全に又は選択的に再び除去する、請求の範囲第１項 記載の方法。 ３．ホトレジスト（１５）の選択的除去を露光及び現像によつて行い、一方引続 いてのホトレジストの完全な除去を有機溶剤を用いて実施する、請求の範囲第２ 項記載の方法。 ４．保護層（１５）を選択的にラツカー、特にはんだレジストラツカーのシルク スクリン印刷によつて施す、請求の範囲第１項記載の方法。 ５．銅から成る導体路（１１）及び／又は接続面（１２）を有するシリコン基板 （１０）を使用する、前記請求の範囲のいずれか１項に記載の方法。 ６．１００℃〜４００℃の温度で硬化するエポキシ系接着剤（１４）を使用する 、前記請求の範囲のいずれか１項に記載の方法。 ７．ボンデイング結合を熱圧着又は超音波を用いた溶接によつて行う、前記請求 の範囲のいずれか１項に記載の方法。 ８．素子（１５）と銅から成る導体路（１１）との間の電気的接続を金から成る ボンデイングワイヤによつて行う、前記請求の範囲のいずれか１項に記載の方法 。 ９．保護層（１３）を８０℃未満の温度で前乾燥する、前記請求の範囲のいずれ か１項に記載の方法。
JP61500710A 1985-05-18 1986-01-15 ハイブリッド回路で電気回路を製造する方法 Pending JPS63500344A (ja)

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DE19853517965 DE3517965A1 (de) 1985-05-18 1985-05-18 Verfahren zur herstellung einer elektrischen schaltung in hybridtechnik

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JPH09293744A (ja) * 1996-02-29 1997-11-11 Denso Corp 電子部品の実装方法

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KR950021293A (ko) * 1993-12-03 1995-07-26 빈센트 비. 인그라시아 반도체 다이를 다이 패드에 부착하도록 산화물층을 이용한 회로 및 방법
DE19722355A1 (de) * 1997-05-28 1998-12-03 Bosch Gmbh Robert Verfahren zur Herstellung elektrischer Baugruppen und elektrische Baugruppe
DE102008058047B4 (de) * 2008-11-18 2013-11-07 Auto-Kabel Management Gmbh Verbindung von elektrischen Leitungen mittels Ultraschallschweißen

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US3838984A (en) * 1973-04-16 1974-10-01 Sperry Rand Corp Flexible carrier and interconnect for uncased ic chips
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JPS5933894A (ja) * 1982-08-19 1984-02-23 電気化学工業株式会社 混成集積用回路基板の製造法
EP0139063A1 (fr) * 1983-10-24 1985-05-02 SINTRA-ALCATEL Société Anonyme dite: Procédé de substitution d'un composant électronique connecté aux pistes conductrices d'un substrat porteur
DE3482013D1 (de) * 1983-11-11 1990-05-23 Toshiba Kawasaki Kk Verfahren zum herstellen einer integrierten hybridschaltung.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09293744A (ja) * 1996-02-29 1997-11-11 Denso Corp 電子部品の実装方法

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