JPS6316712U - - Google Patents
Info
- Publication number
- JPS6316712U JPS6316712U JP10982886U JP10982886U JPS6316712U JP S6316712 U JPS6316712 U JP S6316712U JP 10982886 U JP10982886 U JP 10982886U JP 10982886 U JP10982886 U JP 10982886U JP S6316712 U JPS6316712 U JP S6316712U
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- capacitor
- output signal
- signal
- charging transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図は、本考案の一実施例を示す回路図、及
び第２図は従来のＡＬＣ回路を示す回路図である
。
１４……増幅器、１６……充電トランジスタ、
１７……第１コンデンサ、１８……第１抵抗、１
９……ダイオード、２０……第２コンデンサ、２
２……制御信号発生回路、２５……ＡＬＣトラン
ジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional ALC circuit. 14...Amplifier, 16...Charging transistor,
17...First capacitor, 18...First resistor, 1
9...Diode, 20...Second capacitor, 2
2 ...Control signal generation circuit, 25...ALC transistor.
Claims (1)
器の入力信号の減衰を行なつて前記出力信号のレ
ベルを一定に保つ自動レベル制御回路において、
前記増幅器の出力信号がコンデンサ及び抵抗を介
してベースに印加される充電トランジスタと、該
充電トランジスタのベースとアースとの間に挿入
されたダイオードと、前記充電トランジスタによ
り充電されるコンデンサと、該コンデンサの端子
電圧に応じた制御信号を発生する制御信号発生回
路と、前記制御信号に応じて前記増幅器の入力信
号を減衰するトランジスタとから成る自動レベル
制御回路。 An automatic level control circuit that detects the level of an output signal of an amplifier and attenuates the input signal of the amplifier to keep the level of the output signal constant,
A charging transistor to which the output signal of the amplifier is applied to the base via a capacitor and a resistor, a diode inserted between the base of the charging transistor and ground, a capacitor charged by the charging transistor, and the capacitor. an automatic level control circuit comprising: a control signal generation circuit that generates a control signal according to a terminal voltage of the amplifier; and a transistor that attenuates an input signal of the amplifier according to the control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986109828U JPH0543534Y2 (en) | 1986-07-17 | 1986-07-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986109828U JPH0543534Y2 (en) | 1986-07-17 | 1986-07-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6316712U true JPS6316712U (en) | 1988-02-03 |
| JPH0543534Y2 JPH0543534Y2 (en) | 1993-11-02 |
Family
ID=30988286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986109828U Expired - Lifetime JPH0543534Y2 (en) | 1986-07-17 | 1986-07-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0543534Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5873621U (en) * | 1981-11-13 | 1983-05-18 | 三洋電機株式会社 | signal level control circuit |
| JPS58178615A (en) * | 1982-04-13 | 1983-10-19 | Matsushita Electric Ind Co Ltd | Recording amplifier circuit provided with alc |
-
1986
- 1986-07-17 JP JP1986109828U patent/JPH0543534Y2/ja not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5873621U (en) * | 1981-11-13 | 1983-05-18 | 三洋電機株式会社 | signal level control circuit |
| JPS58178615A (en) * | 1982-04-13 | 1983-10-19 | Matsushita Electric Ind Co Ltd | Recording amplifier circuit provided with alc |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0543534Y2 (en) | 1993-11-02 |
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