JPS6235696A - Ceramic substrate for electric circuit and manufacture thereof - Google Patents

Ceramic substrate for electric circuit and manufacture thereof

Info

Publication number
JPS6235696A
JPS6235696A JP17618085A JP17618085A JPS6235696A JP S6235696 A JPS6235696 A JP S6235696A JP 17618085 A JP17618085 A JP 17618085A JP 17618085 A JP17618085 A JP 17618085A JP S6235696 A JPS6235696 A JP S6235696A
Authority
JP
Japan
Prior art keywords
ceramic
copper oxide
ceramic substrate
copper
conductor pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17618085A
Other languages
Japanese (ja)
Inventor
塚本 和吉
公英 須郷
治文 万代
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP17618085A priority Critical patent/JPS6235696A/en
Publication of JPS6235696A publication Critical patent/JPS6235696A/en
Pending legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、電気回路用磁器基板に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a ceramic substrate for electric circuits.

(従来の技術) 近年、電子機器の小型化に伴い、電気回路を構成する各
種電子部品を実装するのに磁器基板が汎用され、最近で
は、実装密度をさらに高めるため、表面に導電材料で回
路を形成してなる磁器シートを積層してなる多層磁器基
板が開発されている。
(Prior technology) In recent years, with the miniaturization of electronic devices, ceramic substrates have been widely used to mount various electronic components that make up electric circuits. A multilayer porcelain substrate has been developed, which is made by laminating porcelain sheets formed by porcelain sheets.

この種の多層基板の磁器材料としては、アルミナが採用
されているが、焼結温度力弓500〜1600℃と高温
であることから、基板内部に形成される内部電極その他
の導体パターンの酸化防止のため内部導電材料として、
高融点材料、例えば、タングステンやモリブデン等を用
いなければならず、必然的に、導体パターンの抵抗が大
きくなるという問題がある。
Alumina is used as the porcelain material for this type of multilayer board, but since the sintering temperature is as high as 500 to 1,600°C, it prevents oxidation of internal electrodes and other conductive patterns formed inside the board. As an internal conductive material,
A material with a high melting point, such as tungsten or molybdenum, must be used, which inevitably causes the problem that the resistance of the conductor pattern increases.

これらの問題を解決する−ため、低温で焼結させること
ができる基板用磁器材料として、アルミナに多量の結晶
化ガラス成分を添加したもの、あるいはBa5nO=に
ホウ素を多量に添加したものなどが提案される一方(例
えば、特開昭57−184289号)、内部導電材料と
してAg、Ag−Pd、Cuなとの高導電性材料を用い
ることも提案されている。
To solve these problems, proposals have been made for ceramic materials for substrates that can be sintered at low temperatures, such as alumina with a large amount of crystallized glass added, or Ba5nO= with a large amount of boron added. On the other hand, it has also been proposed to use highly conductive materials such as Ag, Ag-Pd, and Cu as the internal conductive material (for example, Japanese Patent Laid-Open No. 57-184289).

(発明が解決しようとする間°照点) しかしながら、AgやPdは高価であることから、コス
ト低減のため安価な銅を使用する場合、銅は空気中では
酸化され易く、200℃程度の加熱で酸化されるため、
銅が酸化されないように非酸化性雰囲気中で焼成するこ
とが必要であり、非酸化性雰囲気中で焼成すると、銅ペ
ーストやグリーンシート中の有機物を除去するには少な
くとも500°C以上の高温で数時間加熱しなければな
らず、エネルギー的及び資源的な面から問題が多い。し
かも、金属銅を導電材料として多層磁器基板を製造した
場合、層剥がれを生じ易いという問題もある。
(The point that the invention is trying to solve) However, since Ag and Pd are expensive, when using cheap copper to reduce costs, copper is easily oxidized in the air, and heating at about 200 ° C. Because it is oxidized by
It is necessary to fire in a non-oxidizing atmosphere to prevent copper from being oxidized, and when firing in a non-oxidizing atmosphere, it is necessary to heat the copper at a high temperature of at least 500°C to remove the organic matter in the copper paste and green sheet. It requires heating for several hours, which poses many problems in terms of energy and resources. Moreover, when a multilayer ceramic substrate is manufactured using metallic copper as a conductive material, there is a problem that layer peeling is likely to occur.

従って、本発明は、ペースト中の有機物を空気中での熱
処理により除去して製造することができると同時に、低
抵抗の導体パターンを有する電気回路用磁器基板を得る
ことを主目的とするものである。
Therefore, the main object of the present invention is to obtain a ceramic substrate for electric circuits that can be manufactured by removing organic substances in the paste by heat treatment in the air and has a conductor pattern with low resistance. be.

(問題点を解決するための手段) 本発明は、前記問題を解決する手段として、セラミック
層の表面に導体パターンを形成してなる電気回路用磁器
基板において、前記セラミック層が低温焼結セラミック
材料からなり、前記導体パターンが還元金属銅からなる
ことを特長とする電気回路用磁器基板、を提供するもの
である。
(Means for Solving the Problems) As a means for solving the problems, the present invention provides a ceramic substrate for an electric circuit in which a conductor pattern is formed on the surface of a ceramic layer, wherein the ceramic layer is made of a low-temperature sintered ceramic material. The present invention provides a ceramic substrate for an electric circuit, characterized in that the conductor pattern is made of reduced metal copper.

本発明に係る電気回路用磁器基板は、低温焼結性セラミ
ック材料からなるグリーンシート上に、酸化銅及びビヒ
クルを含む酸化銅ペーストで導体パターンを形成した後
、空気中で熱処理して酸化銅ペースト中の有機物を燃焼
除去し、ついで還元性雰囲気中で熱処理して酸化銅を金
属銅に還元することによって製造することができる。
The ceramic substrate for electric circuits according to the present invention is produced by forming a conductor pattern on a green sheet made of a low-temperature sinterable ceramic material using a copper oxide paste containing copper oxide and a vehicle, and then heat-treating it in air to paste the copper oxide paste. It can be produced by burning off the organic matter therein and then heat-treating in a reducing atmosphere to reduce copper oxide to metallic copper.

多層磁器基板を製造する場合、導体パターンを形成した
グリーンシートを複数枚積層して圧着した後、空気中で
熱処理して酸化銅ペースト中の有機物を燃焼除去した後
、還元性雰囲気中で熱処理して酸化銅を金属銅に還元す
ることにより製造することができる。
When manufacturing a multilayer ceramic board, multiple green sheets with conductor patterns are laminated and crimped, heat treated in air to burn off the organic matter in the copper oxide paste, and then heat treated in a reducing atmosphere. It can be produced by reducing copper oxide to metallic copper.

本発明に係る電気回路用多層基板を形成する低温焼結性
セラミック材料としては、従来公知の低温焼成用磁器組
成物の他、(1)特願昭59−112036号明細書に
記載の一般式: %式%) (式中、MlはS r + Ca t M gのうち少
なくとも一種、MlはZr、Snのうち少なくとも一種
又は2種を表し、0≦X≦0.3.0≦y≦ 0.3.
0≦X+y≦0.3である。)で表される酸化物20〜
40モル%、Si0240〜70モル%、A/120コ
2〜10モル%、Ba0210モル%及び820、 4
〜25モル%からなる低温焼成用磁器組成物 (2)特願昭59−112036号明細書に記載の一般
式: %式%) (式中、MlはSr、Ca+Mgのうち少なくとも一種
、MlはZr、Snのうち少なくとも一種又は2種を表
し、O≦×≦0.3、O≦y≦ 0.3、O≦×+y≦
0.3である。)で表される酸化物5〜40モル%、S
;0240〜80モル%、A乏、0,2〜10モル%、
CaO2−10モル%及びB 20 ’s4〜25モル
%からなる低温焼成用磁器組成物を使用できる。
As the low-temperature sinterable ceramic material forming the multilayer board for electric circuits according to the present invention, in addition to conventionally known low-temperature firing ceramic compositions, (1) the general formula described in Japanese Patent Application No. 112036/1982, : % formula %) (In the formula, Ml represents at least one kind among S r + Cat M g, Ml represents at least one kind or two kinds among Zr and Sn, and 0≦X≦0.3.0≦y≦ 0.3.
0≦X+y≦0.3. ) Oxide 20~
40 mol%, Si0240-70 mol%, A/120 2-10 mol%, Ba0210 mol% and 820, 4
Porcelain composition for low temperature firing consisting of ~25 mol% (2) General formula described in Japanese Patent Application No. 59-112036: % formula %) (In the formula, Ml is at least one of Sr, Ca+Mg, and Ml is Represents at least one or two of Zr and Sn, O≦×≦0.3, O≦y≦0.3, O≦×+y≦
It is 0.3. ) 5 to 40 mol% of the oxide represented by S
;0240-80 mol%, A-poor, 0.2-10 mol%,
A porcelain composition for low temperature firing consisting of 10 mol% CaO2 and 4-25 mol% B20's can be used.

特に、本発明に係る電気回路用磁器基板のセラミック材
料としては、Si0225〜80重量%、BaO15−
70重量%およびB20.1.5−5重量%からなる磁
器組成物、及びS;022S〜80重量%、Ba015
〜70重景%、820重量、5〜5重量%及びA 、Q
、20* 30重量%以下からなる磁器組成物を使用す
るのが好適である。この磁器組成物は、焼成温度が85
0〜1000℃の焼成温度で、本発明方法に従って磁器
基板を製遣すると、IMHzで誘電率が10以下、誘電
体損失が0.1%以下、直流100V印加時の比抵抗が
lXl0”以上、抗折強度が1500 Kg/ c+n
2以上と、絶縁基板として要求される特性を総て備えた
電気回路用磁器基板が得られ、還元銅からなる導体パタ
ーンの劣化をきたすことがない。
In particular, the ceramic material of the ceramic substrate for electric circuits according to the present invention includes Si0225 to 80% by weight, BaO15-
Porcelain composition consisting of 70% by weight and B20.1.5-5% by weight, and S; 022S to 80% by weight, Ba015
~70 weight%, 820 weight, 5~5 weight% and A,Q
, 20*30% by weight or less is preferably used. This porcelain composition has a firing temperature of 85
When a ceramic substrate is produced according to the method of the present invention at a firing temperature of 0 to 1000°C, the dielectric constant at IMHz is 10 or less, the dielectric loss is 0.1% or less, and the resistivity when applying 100V DC is 1X10” or more. Transverse bending strength is 1500 Kg/c+n
2 or more, a ceramic substrate for electric circuits having all the characteristics required for an insulating substrate can be obtained, and the conductor pattern made of reduced copper will not deteriorate.

本発明に係る電気回路用磁器基板の内部電極や導体ライ
ンなどの導体パターンを形成する材料としては、CuO
及び/又はCu2O50−80ut%を主成分とし、残
部有機ビヒクルからなる酸化銅ペーストが好適である。
The material for forming conductor patterns such as internal electrodes and conductor lines of the ceramic substrate for electric circuits according to the present invention is CuO
And/or a copper oxide paste containing 50-80 ut% of Cu2O as a main component and the remainder being an organic vehicle is suitable.

導体パターンのセラミック層への接着強度を高めるため
、前記ペーストに15wt%以下のガラス7リツトを添
加してもよい。
In order to increase the adhesion strength of the conductive pattern to the ceramic layer, up to 15 wt% of glass may be added to the paste.

なお、ペースト中の酸化銅、即ち、CuO及び/又はC
u2Oの含有量を前記範囲に限定したのは、酸化銅の含
有量が50wt%未満では、ペーストの粘度が低くなり
過ぎて、塗布又は印刷した導体パターンににじみを生じ
、解像度不良となり、また、80wt%を越えると、ペ
ーストの粘度が高くなり過ぎて印刷性が悪くなるからで
ある。
Note that copper oxide in the paste, that is, CuO and/or C
The reason why the content of uO is limited to the above range is that if the content of copper oxide is less than 50 wt%, the viscosity of the paste becomes too low, causing bleeding in the coated or printed conductor pattern, resulting in poor resolution. This is because if it exceeds 80 wt%, the viscosity of the paste becomes too high and printability deteriorates.

焼成時の還元性雰囲気としては、例えば、窒素を70°
C以上のバブラーに通して、水蒸気を含有させた窒素雰
囲気CN299.7〜99.8%)が好適であるが、微
量の酸素を含有する水素雰囲気、炭酸ガス雰囲気、また
はこれらの混合雰囲気を用いてもよい。
As the reducing atmosphere during firing, for example, nitrogen at 70°
A nitrogen atmosphere (CN299.7 to 99.8%) containing water vapor through a bubbler of C or higher is suitable, but a hydrogen atmosphere containing a trace amount of oxygen, a carbon dioxide atmosphere, or a mixed atmosphere thereof may also be used. It's okay.

(イ乍用) 本発明に係る電気回路用磁器基板は、その内部電極、導
体ラインなどの導体パターンを形成する材料として酸化
銅を採用することにより、空気中でバインダや有機ビヒ
クルを燃焼除去する際に導体形成材料が影響を受けるの
を防止し、焼成後、該導電体形成材料を還元させること
により導体パターン本来の特性を付与される。
(For Inventory) The ceramic substrate for electric circuits according to the present invention uses copper oxide as a material for forming conductor patterns such as internal electrodes and conductor lines, so that binders and organic vehicles can be burned off in the air. The conductor-forming material is prevented from being affected during firing, and the original characteristics of the conductor pattern are imparted by reducing the conductor-forming material after firing.

以下、本発明の実施例について説明する。Examples of the present invention will be described below.

(実施例1) 原料として、BaCO3またはBad、SiC2、Al
2O2、B20.またはBNもしくは84Cを用い、こ
れらの原料をBaO38,Ehut%、 S ! 02
48.0wt%、AjljzO:+  9.Ou+t%
、 B20゜5、Ou+t%からなる磁器が得られるよ
うに秤量、調合した。得られた原料混合物を940°C
で仮焼し、粉砕した後、有機バインダーを加えて混練し
、ドクターブレード法にて厚さ0.3〜0.4a+mの
グリーンシートを成形した。
(Example 1) As raw materials, BaCO3 or Bad, SiC2, Al
2O2, B20. Or use BN or 84C and convert these raw materials into BaO38, Ehut%, S! 02
48.0wt%, AjljzO:+9. Ou+t%
, B20°5, Ou+t% were weighed and mixed to obtain porcelain. The obtained raw material mixture was heated to 940°C.
After calcining and pulverizing, an organic binder was added and kneaded, and a green sheet with a thickness of 0.3 to 0.4 a+m was formed using a doctor blade method.

また、これとは別に、粒径5μm以下のCuO及びCu
2Oを第1表に示す割合で混合し、さらに有機ビヒクル
を加えて酸化銅を80u+t%含有する酸化銅ペースト
を調製した。なお、有機ビヒクルは、エチルセルロース
をα−テレピネオールで10倍に希釈したものを使用し
た。
Apart from this, CuO and Cu with a particle size of 5 μm or less
2O was mixed in the proportions shown in Table 1, and an organic vehicle was further added to prepare a copper oxide paste containing 80 u+t% of copper oxide. The organic vehicle used was ethyl cellulose diluted 10 times with α-terpineol.

各酸化銅ペーストを用い、第1図に示すように、グリー
ンシート1の上に、3 mmX 3 mmの電極形成部
2及び幅が200μmで、ライン間隔が200μIII
の導体ライン形成部3からなる導体パターンを印刷し、
このグリーンシート1を、第2図に示すように、隣接す
る2枚のグリーンシート上の電極形成部2が相互に反対
側を向くように積層して熱圧着した後、空気中350°
Cで1時間加熱してペースト及びグリーンシート中の有
機物を燃焼除去した。次いで、空気中で400°Cまで
加熱した後、第2表に示す窒素雰囲気に切り替え980
°Cまで加熱し、1時間保持した後、室温まで冷却し、
試験用基板とした。4は内部電極取出し穴である。
Using each copper oxide paste, as shown in FIG.
A conductor pattern consisting of the conductor line forming portion 3 is printed,
As shown in FIG. 2, the green sheets 1 are stacked and thermocompressed so that the electrode forming parts 2 on two adjacent green sheets face opposite to each other, and then heated at 350 degrees in air.
The organic matter in the paste and green sheet was burned off by heating at C for 1 hour. Next, after heating to 400°C in air, the atmosphere was changed to the nitrogen atmosphere shown in Table 2 at 980 °C.
Heat to °C, hold for 1 hour, then cool to room temperature,
This was used as a test board. 4 is an internal electrode extraction hole.

各基板について、表面導体ライン及び内部導体ラインの
面積抵抗を測定した。その結果を第1表に示す。第1表
中の値は、それぞれ試験用基板10個についての平均値
である。
For each substrate, the sheet resistance of the surface conductor lines and internal conductor lines was measured. The results are shown in Table 1. The values in Table 1 are average values for 10 test substrates.

得られた多層磁器基板について、基板と導体ラインある
いは電極との間の反応を分析したところ、両者間に反応
は認められなかった。
When the obtained multilayer ceramic substrate was analyzed for the reaction between the substrate and the conductor lines or electrodes, no reaction was observed between the two.

第1表 第1表(続き) 主た、前記実施例で用意したグリーンシートを同様にし
て積層、熱圧着した後、30X10111111(7)
角板状にカットし、これを実施例と同条件下で焼成して
磁器を得、試験片とし、比抵抗、誘電率、誘電体損失及
び抗折強度を測定した。その結果は次の通りである。そ
れぞれの特性値は、試験片10個についての平均値であ
り、各特性の測定条件は次の通りである。
Table 1 Table 1 (Continued) Mainly, after laminating the green sheets prepared in the above example and thermocompression bonding in the same manner, 30X10111111 (7)
It was cut into a square plate shape and fired under the same conditions as in the example to obtain a porcelain, which was used as a test piece and measured for specific resistance, dielectric constant, dielectric loss, and bending strength. The results are as follows. Each characteristic value is an average value for 10 test pieces, and the measurement conditions for each characteristic are as follows.

比抵抗:    直流 100■ 誘電率:     IMHz 誘電体損失:   IMHz なお、抗折強度は次式により求めた。Specific resistance: DC 100■ Dielectric constant: IMHz Dielectric loss: IMHz Incidentally, the bending strength was determined by the following formula.

式中、Pは試験片が折断したときの荷重(kg)、ρは
支点間距離(cm)、bは試験片の幅(Cm)、dは試
験片の厚さくc−)である。
In the formula, P is the load (kg) when the test piece is broken, ρ is the distance between the supports (cm), b is the width of the test piece (Cm), and d is the thickness of the test piece (c-).

(電気的特性) 比抵抗:     lXl0”ΩC随 誘電率二6.0 誘電体損失:   0.06% 抗折強度:    1600 kg/am2第1表及び
第2表の結果から明らかなように、本発明に係る磁器基
板は、極めて低い面積抵抗を有し、しかもセラミック層
が高い比抵抗と低い誘電率を有し、誘電体損失も小さい
など優れた電気的特性を示すだけでなく、抗折強度が大
きいなど優れた機械的特性を示す。
(Electrical properties) Specific resistance: lXl0"ΩC dielectric constant 26.0 Dielectric loss: 0.06% Bending strength: 1600 kg/am2 As is clear from the results in Tables 1 and 2, this The ceramic substrate according to the invention not only has an extremely low sheet resistance, the ceramic layer has a high specific resistance and a low dielectric constant, and exhibits excellent electrical properties such as low dielectric loss, but also has high bending strength. It exhibits excellent mechanical properties such as a large

(発明の効果) 以上の説明から明らかなように、本発明によれば、低抵
抗の電気回路用磁器基板を容易、かつ安価に得ることが
でき、しかも空気中で有機物を燃焼除去でき、熱処理に
よって導体パターンの面積抵抗あるいはセラミック層の
電気的特性、機械的特性、さらには熱的特性の変化が無
く、内部導体との反応も見られないので、特性の安定し
たものを製造できるなど、優れた効果が得られる。
(Effects of the Invention) As is clear from the above description, according to the present invention, a low-resistance ceramic substrate for electric circuits can be obtained easily and inexpensively, organic matter can be removed by burning in the air, and heat treatment is possible. As a result, there is no change in the sheet resistance of the conductor pattern, electrical properties, mechanical properties, or even thermal properties of the ceramic layer, and there is no reaction with the internal conductor, making it possible to manufacture products with stable properties. You can get the same effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る電気回路用磁器基板の製造過程に
おいて表面に酸化銅ペーストを塗布したグリーンシート
を示す平面図、第2図は第1図に示すグリーンシートの
積層過程を示す斜視図である。 1〜グリーンシート、2〜電極形成部、3〜導体ライン
形成部。 特 許 出 願 人 株式会社 村田製作所代 理 人
 弁理士 青 山  葆ばか2名第11a
Fig. 1 is a plan view showing a green sheet whose surface is coated with copper oxide paste in the manufacturing process of the ceramic substrate for electric circuits according to the present invention, and Fig. 2 is a perspective view showing the lamination process of the green sheets shown in Fig. 1. It is. 1 - Green sheet, 2 - Electrode forming part, 3 - Conductor line forming part. Patent applicant Murata Manufacturing Co., Ltd. Agent Patent attorney Aoyama Baka 2 No. 11a

Claims (4)

【特許請求の範囲】[Claims] (1)セラミック層の表面に導体パターンを形成してな
る電気回路用磁器基板において、前記セラミック層が低
温焼結セラミック材料からなり、前記導体パターンが還
元金属銅からなることを特長とする電気回路用磁器基板
(1) A ceramic substrate for an electric circuit comprising a conductor pattern formed on the surface of a ceramic layer, characterized in that the ceramic layer is made of a low-temperature sintered ceramic material, and the conductor pattern is made of reduced metallic copper. Porcelain substrate for use.
(2)複数のセラミック層が積層され、各セラミック層
の表面に還元金属銅からなる導体パターンが形成されて
いる特許請求の範囲第1項記載の電気回路用磁器基板。
(2) A ceramic substrate for an electric circuit according to claim 1, wherein a plurality of ceramic layers are laminated, and a conductor pattern made of reduced metal copper is formed on the surface of each ceramic layer.
(3)低温焼結性セラミック材料からなるグリーンシー
ト上に、酸化銅及びビヒクルを含む酸化銅ペーストで導
体パターンを形成した後、空気中で熱処理して酸化銅ペ
ースト中の有機物を燃焼除去し、ついで非酸化性雰囲気
中で熱処理して酸化銅を金属銅に還元することを特長と
する電気回路用磁器基板の製造方法。
(3) After forming a conductor pattern with a copper oxide paste containing copper oxide and a vehicle on a green sheet made of a low-temperature sinterable ceramic material, heat treatment is performed in air to burn off organic substances in the copper oxide paste, A method for manufacturing a ceramic substrate for an electric circuit, which is characterized in that the copper oxide is then reduced to metallic copper by heat treatment in a non-oxidizing atmosphere.
(4)導体パターンを形成したグリーンシートを複数枚
積層して圧着した後、空気中で熱処理して酸化銅ペース
ト中の有機物を燃焼除去する特許請求の範囲第3項記載
の方法。
(4) The method according to claim 3, wherein a plurality of green sheets having conductor patterns formed thereon are laminated and pressure-bonded, and then heat treated in air to burn off organic substances in the copper oxide paste.
JP17618085A 1985-08-09 1985-08-09 Ceramic substrate for electric circuit and manufacture thereof Pending JPS6235696A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17618085A JPS6235696A (en) 1985-08-09 1985-08-09 Ceramic substrate for electric circuit and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17618085A JPS6235696A (en) 1985-08-09 1985-08-09 Ceramic substrate for electric circuit and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6235696A true JPS6235696A (en) 1987-02-16

Family

ID=16009052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17618085A Pending JPS6235696A (en) 1985-08-09 1985-08-09 Ceramic substrate for electric circuit and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6235696A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001247371A (en) * 2000-03-03 2001-09-11 Murata Mfg Co Ltd Method for producing multilayer ceramic substrate
JP2013109966A (en) * 2011-11-21 2013-06-06 Hitachi Chemical Co Ltd Copper oxide paste and method for producing metal copper layer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001247371A (en) * 2000-03-03 2001-09-11 Murata Mfg Co Ltd Method for producing multilayer ceramic substrate
JP4590674B2 (en) * 2000-03-03 2010-12-01 株式会社村田製作所 Manufacturing method of multilayer ceramic substrate
JP2013109966A (en) * 2011-11-21 2013-06-06 Hitachi Chemical Co Ltd Copper oxide paste and method for producing metal copper layer

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