JPS6219757U - - Google Patents

Info

Publication number
JPS6219757U
JPS6219757U JP11136585U JP11136585U JPS6219757U JP S6219757 U JPS6219757 U JP S6219757U JP 11136585 U JP11136585 U JP 11136585U JP 11136585 U JP11136585 U JP 11136585U JP S6219757 U JPS6219757 U JP S6219757U
Authority
JP
Japan
Prior art keywords
region
island
integrated circuit
wiring layer
channel stopper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11136585U
Other languages
Japanese (ja)
Other versions
JPH079385Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985111365U priority Critical patent/JPH079385Y2/en
Publication of JPS6219757U publication Critical patent/JPS6219757U/ja
Application granted granted Critical
Publication of JPH079385Y2 publication Critical patent/JPH079385Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図及至第３図はそれぞれ本考案を説明する
ための平面図、断面図及び平面図、第４図及び第
５図はそれぞれ従来例を説明するための平面図、
断面図である。 主は図番の説明、１は半導体基板、６はベース
領域、８は酸化膜、９はチヤンネルストツパー、
１４はエミツタ配線層、１６は反転層、２０は第
１の領域、２１は第２の領域である。 1 to 3 are a plan view, a sectional view, and a plan view for explaining the present invention, respectively, and FIGS. 4 and 5 are plan views for explaining a conventional example, respectively.
FIG. The main part is the explanation of the drawing numbers, 1 is the semiconductor substrate, 6 is the base region, 8 is the oxide film, 9 is the channel stopper,
14 is an emitter wiring layer, 16 is an inversion layer, 20 is a first region, and 21 is a second region.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路素子の構成する少なくとも１つの半導体領
域を形成した島領域と該島領域表面を被覆する絶
縁膜上を延在する配線層と該配線層直下の前記島
領域表面に生じる反転層を防止するためのチヤン
ネルストツパーを具備した半導体集積回路装置に
おいて、該チヤンネルストツパーは前記島領域表
面に構成したこれと同導電型の第１の領域と該第
１の領域両側面に設けた前記第１の領域より低不
純物濃度の第２の領域からなることを特徴とする
半導体集積回路装置。 To prevent an inversion layer from occurring on an island region in which at least one semiconductor region constituting a circuit element is formed, a wiring layer extending over an insulating film covering the surface of the island region, and a surface of the island region immediately below the wiring layer. In a semiconductor integrated circuit device equipped with a channel stopper, the channel stopper includes a first region of the same conductivity type formed on the surface of the island region and the first region provided on both sides of the first region. A semiconductor integrated circuit device comprising a second region having a lower impurity concentration than the second region.
JP1985111365U 1985-07-19 1985-07-19 Semiconductor integrated circuit device Expired - Lifetime JPH079385Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985111365U JPH079385Y2 (en) 1985-07-19 1985-07-19 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985111365U JPH079385Y2 (en) 1985-07-19 1985-07-19 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS6219757U true JPS6219757U (en) 1987-02-05
JPH079385Y2 JPH079385Y2 (en) 1995-03-06

Family

ID=30991221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985111365U Expired - Lifetime JPH079385Y2 (en) 1985-07-19 1985-07-19 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPH079385Y2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5164876A (en) * 1974-12-03 1976-06-04 Nippon Electric Co ZETSUENGEETOGATADENKAIKOKAHANDOTAISOCHINOSEIZOHOHO
JPS5234671A (en) * 1975-07-31 1977-03-16 Matsushita Electronics Corp Semiconductor integrated circuit
JPS54148486A (en) * 1978-05-15 1979-11-20 Hitachi Ltd Semiconductor device
JPS57155769A (en) * 1981-03-20 1982-09-25 Fujitsu Ltd Manufacture of semiconductor device
JPS5923560A (en) * 1982-07-29 1984-02-07 Matsushita Electronics Corp Switching element

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5164876A (en) * 1974-12-03 1976-06-04 Nippon Electric Co ZETSUENGEETOGATADENKAIKOKAHANDOTAISOCHINOSEIZOHOHO
JPS5234671A (en) * 1975-07-31 1977-03-16 Matsushita Electronics Corp Semiconductor integrated circuit
JPS54148486A (en) * 1978-05-15 1979-11-20 Hitachi Ltd Semiconductor device
JPS57155769A (en) * 1981-03-20 1982-09-25 Fujitsu Ltd Manufacture of semiconductor device
JPS5923560A (en) * 1982-07-29 1984-02-07 Matsushita Electronics Corp Switching element

Also Published As

Publication number Publication date
JPH079385Y2 (en) 1995-03-06

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