JPS62191437U - - Google Patents

Info

Publication number
JPS62191437U
JPS62191437U JP7962986U JP7962986U JPS62191437U JP S62191437 U JPS62191437 U JP S62191437U JP 7962986 U JP7962986 U JP 7962986U JP 7962986 U JP7962986 U JP 7962986U JP S62191437 U JPS62191437 U JP S62191437U
Authority
JP
Japan
Prior art keywords
led array
chip
row
insulating substrate
common electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7962986U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7962986U priority Critical patent/JPS62191437U/ja
Publication of JPS62191437U publication Critical patent/JPS62191437U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Description

【図面の簡単な説明】
第1図は本考案のLEDアレイチツプの一実施
例を示す斜視図、第2図は従来のLEDアレイプ
リントヘツドの斜視図、第3図は第2図のプリン
トヘツドの一部を拡大して示す斜視図、第4図は
第1図のプリントヘツドの一部を拡大して示す平
面図、第5図は本考案の他の実施例の、第4図と
同様の部分を示す平面図である。 11…LEDアレイ、11a,11b,…11
n…LEDアレイチツプ、12…セラミツクベー
ス、13…駆動用ICチツプ、14…個別電極側
配線群、15…金属ワイヤ、16…共通電極側電
源配線部、17…導電性接着剤層。

Claims (1)

  1. 【実用新案登録請求の範囲】 1 絶縁基板と、該絶縁基板上に線状に配列され
    、各々その両側に個別電極を有し、前記絶縁基板
    に接する側に共通電極を有する複数のLEDアレ
    イチツプの列と、前記LEDアレイチツプの列の
    両側に配置されたLED駆動用ICチツプと、前
    記LEDアレイチツプの個別電極と前記駆動用I
    Cチツプとの接続のため前記絶縁基板上に形成さ
    れた個別電極接続用配線パターンと、前記LED
    アレイチツプの共通電極に接続された共通電極接
    続用配線パターンとを有し、前記共通電極接続用
    配線パターンは、前記LEDアレイチツプの列に
    沿つて延びた部分と、該列の途中から該列の延び
    た方向に交差する方向に延びた部分とを有するこ
    とを特徴とするLEDアレイプリントヘツド。 2 前記絶縁基板上の配線パターンは一層で構成
    されていることを特徴とする実用新案登録請求の
    範囲第1項記載のLEDアレイプリントヘツド。 3 各LEDアレイチツプの各側の個別電極に対
    応して1つの駆動用ICチツプが設けられ、これ
    らを互いに接続する個別電極接続用パターンが、
    各LEDアレイチツプの長さ内に配設され、LE
    Dアレイチツプ同士の継ぎ目の部分から、前記共
    通電極接続用パターンが、前記LEDアレイの延
    びた方向に交差する方向に延び出していることを
    特徴とする実用新案登録請求の範囲第1項記載の
    LEDアレイプリントヘツド。
JP7962986U 1986-05-28 1986-05-28 Pending JPS62191437U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7962986U JPS62191437U (ja) 1986-05-28 1986-05-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7962986U JPS62191437U (ja) 1986-05-28 1986-05-28

Publications (1)

Publication Number Publication Date
JPS62191437U true JPS62191437U (ja) 1987-12-05

Family

ID=30929669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7962986U Pending JPS62191437U (ja) 1986-05-28 1986-05-28

Country Status (1)

Country Link
JP (1) JPS62191437U (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183752A (ja) * 1984-03-01 1985-09-19 Ricoh Co Ltd 長尺電子装置
JPS6170772A (ja) * 1984-09-14 1986-04-11 Hitachi Ltd 発光ダイオ−ドアレイヘツド

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183752A (ja) * 1984-03-01 1985-09-19 Ricoh Co Ltd 長尺電子装置
JPS6170772A (ja) * 1984-09-14 1986-04-11 Hitachi Ltd 発光ダイオ−ドアレイヘツド

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