JPS6167234A - 混成集積回路のリ−ド線の接続方法 - Google Patents

混成集積回路のリ−ド線の接続方法

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Publication number
JPS6167234A
JPS6167234A JP59188128A JP18812884A JPS6167234A JP S6167234 A JPS6167234 A JP S6167234A JP 59188128 A JP59188128 A JP 59188128A JP 18812884 A JP18812884 A JP 18812884A JP S6167234 A JPS6167234 A JP S6167234A
Authority
JP
Japan
Prior art keywords
foil
nickel
copper
lead wire
circuit conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59188128A
Other languages
English (en)
Inventor
Kozo Hirai
平井 幸造
Masaaki Togashi
富樫 公明
Yasuhiko Horio
泰彦 堀尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59188128A priority Critical patent/JPS6167234A/ja
Publication of JPS6167234A publication Critical patent/JPS6167234A/ja
Pending legal-status Critical Current

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    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は混成集積回路において半導体チップと回路導体
をアルミニウムリード線を用いて結線する方法に関する
ものである。
(従来例の構成とその問題点) 従来、金属基板に絶縁物層を介して回路を形成して成る
詰成集積回路において、半導体チップと回路導体とを接
続する方法として、最も一般的な方法は、金線あるいは
アルミニウム線によるワイヤボンディング法が用いられ
ている。アルミニウム線によるワイヤボンディングをす
る場合、銅箔から成る回路導体に直接、超音波振動法に
よりアルミニウム線を固着させることは不可能で、何ら
かの方法で、固着させる回路導体表面をアルミニウムあ
るいはニッケルにする必要がある。
従来用いられている方法として、第1図に示すように、
金属基板1に絶縁物層2を介して積層した銅箔3から成
る回路導体のボンディング部分に回路導体と半田4によ
り接着した半導体チップ5と、回路導体の表面に部分的
にメッキされたニッケルM6との間をアルミニウムリー
ド線7により超音波振動法で結線する方法がある。
また、第2図に示すように、金属基Fi1に絶縁物層2
を介して積層した銅箔3から成る回路導体に、半田4あ
るいは導電性の接着剤8によりアルミニウムあるいはニ
ッケルから成る金属ペレット9を固着し、そこに前記と
同様アルミニウムリ−ド線7により超音波振動法で結線
する方法がある。
また、第3図に示すように、金属基板1上に絶縁物層2
を介して銅箔3と、アルミニウム箔10をクラッドした
金属箔を積層した基板を、銅箔層とアルミニウム箔層を
それぞれ別々にエツチングすることによって、銅箔3か
ら成る回路導体部分と銅箔上の一部にアルミニウム箔1
0を形成させ、そのアルミニウム箔10に、前記と同様
、アルミニウムリード線7により超音波振動法で結線す
る方法がある。
しかし第1図の、部分的にニッケルメッキをする方法で
は、銅箔により回路形成した基板に基板完成後ニッケル
メッキをするため、工程が長くなり、またメッキ設備を
必要とするなどかなりな困難と負担が伴う。
また第2図に示す金属ペレット9を基板上に半田4ある
いは導電性接着剤8により固着する方法は、ボンディン
グすべき半導体チップの数が少なく、しかもトランジス
タやダイオードのように接続するワイヤー数の少ない場
合には効果的な方法であるが、ボンディングすべき半導
体チップの数が多い場合や、IC,LSI等のように接
続するワイヤー数が多い場合には、金属ペレットを1個
づつ基板上に固着するには固着する金属ペレットの数に
よって非常に時間がかかり生産性が落ち、また金属ペレ
ットの大きさを小さくするには限界があり、従って数が
多くなるとスペース上の問題も無視できなくなる。
また、第3図に示す銅箔と、アルミニウム箔をクラッド
した箔を積層し銅箔部分とアルミニウム箔部分をそれぞ
れ別々にエツチングすることによって回路導体とボンデ
ィング部とを形成する方法では、混成集積回路を構成す
る半導体チップ、コンデンサ、トランジスタ等の部品を
半田で接着させる回路導体部分にアルミニウム箔がある
と良好な半田付けができないため、どうしても半田付は
部分はアルミニウム箔を除去する必要がある。
そのためとの銅箔と、アルミニウム箔をクラッドした箔
を用いる方法では、アルミニウム部分と胴部分の2種類
の回路導体を形成させるエツチング工程が必要になり、
工程が複雑になる。
以上のように、従来の方法では半導体チップと回路導体
をアルミニウム線で接続するには、設備的、工程的に種
々問題点を有していた。
(発明の目的) 本発明は、上記、従来の問題点を解消するもので一般の
プリント基板と同様の筒車な工程、設備でアルミニウム
線の超音波ボンディングが可能な混成集積回路基板を提
供しようとするものである。
(発明の構成) 本発明は、金属基板上に絶縁物層を介して、銅とニッケ
ルの2M構造から成る金属箔をニッケル側を表面にして
積層した積層物の前記銅−ニッケル箔をエツチングして
回路導体を形成させて混成集積回路基板を製造する方法
で、ある。
(実施例の説明) 本発明の一実施例を第4図に従って説明する。
、金属基板1に絶縁物層2を介して銅とニッケルの2層
構造から成る金属箔をニッケル箔11を表面にして積層
し、銅箔3とニッケル箔11を同時にエツチングするこ
とによって回路導体を形成させた回路導体上に半田4に
より半導体チップ5を接着させ、アルミニウムリード線
7によって半導体チップ5と銅箔3と、ニッケル箔11
の2層構造から成る回路導体を超音波振動法により結線
し混成集積回路を形成する方法である。
(発明の効果) 本発明によれば、回路導体を形成するための1回のエツ
チング工程のみで回路導体の形成とアルミニウムリード
線の超音波振動法による結線を合せ可能ならしむるもの
で工程が増えたり、特別な設備が必要になることがない
また銅とニッケルの2層構造となっているため、大電流
が流れる回路の場合、ニッケルの電気伝導特性の良くな
い点を銅箔部分の電気伝導特性の良イ点カカハーシ、混
成集積回路として、ニッケル箔層によりボンディングを
可能とし、銅箔層により導体抵抗の低下をはかることが
できるものである。
もちろん、半導体チップの半田付は部分のニツケル箔の
わずかな導体抵抗が問題になる場合は、銅−ニッケルの
2M構造から成る金属箔を2回のエツチングにより、部
分的にニッケル箔のみを取り除いて半導体チップを銅箔
に直接半田付けするようにすることも可能である。
【図面の簡単な説明】
第1図ないし第3図は従来の方法の説明図、第4図は本
発明の詳細な説明図である。 1 ・・・金属基板、 2 ・・・絶縁物層、 3 ・
・・銅箔、4 ・・・半田、 5 ・・・半導体チップ
、6・・・ニッケルメッキ層、 7 ・・・アルミニウ
ムリード線、 8 ・・・導電性接着剤、 9 ・・・
金属ペレット、10・・・アルミニウム箔、11・・・
ニッケル箔。

Claims (1)

    【特許請求の範囲】
  1.  金属基板上に絶縁物層を介して、銅とニッケルの2層
    構造より成る金属箔をニッケル側を表面にして積層した
    積層物の前記銅−ニッケル箔をエッチングして形成させ
    た回路導体の表面ニッケル箔にアルミニウムリード線を
    超音波振動法により固着させることを特徴とする混成集
    積回路のリード線の接続方法。
JP59188128A 1984-09-10 1984-09-10 混成集積回路のリ−ド線の接続方法 Pending JPS6167234A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59188128A JPS6167234A (ja) 1984-09-10 1984-09-10 混成集積回路のリ−ド線の接続方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59188128A JPS6167234A (ja) 1984-09-10 1984-09-10 混成集積回路のリ−ド線の接続方法

Publications (1)

Publication Number Publication Date
JPS6167234A true JPS6167234A (ja) 1986-04-07

Family

ID=16218210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59188128A Pending JPS6167234A (ja) 1984-09-10 1984-09-10 混成集積回路のリ−ド線の接続方法

Country Status (1)

Country Link
JP (1) JPS6167234A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0964605A2 (en) * 1998-06-09 1999-12-15 Nitto Denko Corporation Low-thermal expansion circuit board and multilayer circuit board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5434678A (en) * 1977-08-22 1979-03-14 Matsushita Electronics Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5434678A (en) * 1977-08-22 1979-03-14 Matsushita Electronics Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0964605A2 (en) * 1998-06-09 1999-12-15 Nitto Denko Corporation Low-thermal expansion circuit board and multilayer circuit board
EP0964605A3 (en) * 1998-06-09 2001-08-22 Nitto Denko Corporation Low-thermal expansion circuit board and multilayer circuit board

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