JPS61241925A - Method of forming electrode - Google Patents
Method of forming electrodeInfo
- Publication number
- JPS61241925A JPS61241925A JP60082868A JP8286885A JPS61241925A JP S61241925 A JPS61241925 A JP S61241925A JP 60082868 A JP60082868 A JP 60082868A JP 8286885 A JP8286885 A JP 8286885A JP S61241925 A JPS61241925 A JP S61241925A
- Authority
- JP
- Japan
- Prior art keywords
- film
- electrode
- substrate
- forming
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 12
- 238000007740 vapor deposition Methods 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 abstract description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 13
- 238000005566 electron beam evaporation Methods 0.000 abstract description 9
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 abstract description 7
- 239000011521 glass Substances 0.000 abstract description 5
- 239000000853 adhesive Substances 0.000 abstract description 3
- 230000001070 adhesive effect Effects 0.000 abstract description 3
- 229910052748 manganese Inorganic materials 0.000 abstract description 3
- 239000011572 manganese Substances 0.000 abstract description 3
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 abstract 1
- 239000005083 Zinc sulfide Substances 0.000 abstract 1
- 230000004913 activation Effects 0.000 abstract 1
- 238000010276 construction Methods 0.000 abstract 1
- 230000008020 evaporation Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 abstract 1
- 238000001771 vacuum deposition Methods 0.000 abstract 1
- 229910052984 zinc sulfide Inorganic materials 0.000 abstract 1
- DRDVZXDWVBGGMH-UHFFFAOYSA-N zinc;sulfide Chemical compound [S-2].[Zn+2] DRDVZXDWVBGGMH-UHFFFAOYSA-N 0.000 abstract 1
- 239000010408 film Substances 0.000 description 34
- 230000000694 effects Effects 0.000 description 7
- 239000010409 thin film Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 206010011732 Cyst Diseases 0.000 description 3
- 208000031513 cyst Diseases 0.000 description 3
- 238000007738 vacuum evaporation Methods 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- -1 manganese-activated zinc sulfide Chemical class 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は薄膜Ｘ Ｌ （Ｘ１ｅｃｔｒｏ −Ｌｕｍｉ
ｎｅｇａ＠ｎｃｅ ）素子などの電極形成方法に関し、
特に微細に分割された多数の電極をリフトオフ法を用い
て形成する方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to thin film XL (X1electro-Lumi)
Regarding the electrode formation method of nega@nce) elements, etc.
In particular, the present invention relates to a method of forming a large number of finely divided electrodes using a lift-off method.
従来の技術
たとえば、従来よりミ場発光蛍光体を用いた固体映像表
示装置としては、Ｘ−Ｙマトリックス表示装置が知られ
ている。この装置は電場発光層の両面に水平平行電極群
と垂直平行電極群とを互いに直交するように配置し、そ
れぞれの電極群に接続された給電線により切換装置を通
して信号を加えて両電極の交点部分の電場発光層（以下
、ＫＬ発光層と略称する。）ｔ−発光させ（この交点の
発光部分面を絵素と称する。）、発光絵素の組合せによ
って文字記号１図形等を表示させるものである。ここで
用いられる固体映像表示板は、通常ガラスなどの透光性
基板上に透明平行電極群を形成し、その上にＫＬ発光層
および発光制御層を順次積層し、さらにその上に背面平
行電極群を下層の透明平行電極群に直交する配置で積層
して形成する。各電極群には給電線への接続のために引
出し端子が設けられている。一般に透明平行電極群とし
ては平滑なガラス基板上に酸化錫を被着するなどにより
形成される。これに直交し、対向する背面平行電極群と
してはアルミ斤つムが真空蒸着などにより形成される。2. Description of the Related Art For example, an XY matrix display device is conventionally known as a solid-state image display device using a mi-field emitting phosphor. In this device, a group of horizontal parallel electrodes and a group of vertical parallel electrodes are arranged perpendicularly to each other on both sides of an electroluminescent layer, and a signal is applied through a switching device by a feeder line connected to each electrode group, and a signal is applied to the intersection of both electrodes. A part of the electroluminescent layer (hereinafter abbreviated as KL luminescent layer) emits light (the luminescent part surface at this intersection is referred to as a picture element), and a character symbol, figure, etc. is displayed by a combination of luminescent picture elements. It is. The solid-state image display board used here usually has a group of transparent parallel electrodes formed on a transparent substrate such as glass, a KL light-emitting layer and a light-emission control layer are sequentially laminated thereon, and a rear parallel electrode is further layered on top of that. The electrodes are stacked in an arrangement perpendicular to the underlying transparent parallel electrode group. Each electrode group is provided with a lead terminal for connection to a power supply line. Generally, the transparent parallel electrode group is formed by depositing tin oxide on a smooth glass substrate. As the rear parallel electrode group which is perpendicular to this and is opposed to this, an aluminum plate is formed by vacuum evaporation or the like.
この背面平行電極のノ々ターン形成には従来メタルマス
ク法が最も簡単な方法として用いられてきたが、このメ
タルマスク法はＩＥＬパネルの電極などのようにパター
ンが大面積化、微細化した場合にはマスクの加工精度や
マスクと基板との密着性などの問題で限界があった。Conventionally, the metal mask method has been used as the simplest method for forming this back-parallel electrode with multiple turns, but this metal mask method is useful when the pattern becomes large and fine, such as the electrodes of an IEL panel. However, there were limitations due to problems such as mask processing accuracy and the adhesion between the mask and the substrate.
発明が解決しようとする問題点
前述のような欠点を改善する方法として、メタルマスク
を用いない電極パターンの形成法が考案されておシ、主
なものとしてはケミカルエッチ法とリフトオフ法がある
。ケミカルエッチ法は、まず基板全面に電極膜を形成し
、その後でホトレジストを塗布して電極のパターンを露
光し不要部をケミカルにエツチングして除去するもので
ある。Problems to be Solved by the Invention In order to improve the above-mentioned drawbacks, methods for forming electrode patterns without using a metal mask have been devised, and the main methods include a chemical etching method and a lift-off method. In the chemical etching method, an electrode film is first formed on the entire surface of the substrate, then photoresist is applied, the electrode pattern is exposed, and unnecessary parts are chemically etched and removed.
したがって電極膜を真空蒸着にて形成するときに基板温
度を十分高くすることができ、低抵抗で付着力の大きい
電極の形成が可能であるが、膜のピンホール等の欠陥が
あると他の構成膜もエツチングしてしまうという欠点が
あった。リフトオフ法かじめホトレジストにて形成して
おき、しかる後に電極膜を全面形成し、その後不要部と
ホトレジストヲ除去するものである。この場合は膜のピ
ンホール等の欠陥とは無関係に電極のパターン形成がで
きるが、真空蒸着にて電極を形成する場合、ホトレジス
トの耐熱温度（通常１００℃以下）以上に基板温度を高
くするとＶシスト膜の変形や硬化が発生しパターンが乱
詐る。したがって電極膜の付着力や抵抗値の点で問題が
あった。Therefore, when forming an electrode film by vacuum evaporation, it is possible to raise the substrate temperature sufficiently high and form an electrode with low resistance and strong adhesion, but if there are defects such as pinholes in the film, other problems may occur. There was a drawback that the constituent films were also etched. In the lift-off method, a photoresist is first formed, and then an electrode film is formed on the entire surface, and then unnecessary portions and the photoresist are removed. In this case, electrode patterns can be formed regardless of defects such as pinholes in the film, but when forming electrodes by vacuum evaporation, if the substrate temperature is raised above the heat resistance temperature of the photoresist (usually 100°C or less), V Deformation and hardening of the cyst film occur, resulting in irregular patterns. Therefore, there were problems with the adhesion and resistance of the electrode film.
そこで本発明は従来のリフトオフ法を用いて形成した電
極より抵抗が低く、付着強度の大きい電極を形成する方
法を提供することを目的とする。Therefore, an object of the present invention is to provide a method for forming an electrode having lower resistance and greater adhesion strength than electrodes formed using the conventional lift-off method.
問題点を解決するための手段
本発明は上記問題点を解決するため、電極形成のための
パターンがあらかじめホトレジストにより形成されてい
る基板に、基板温度が室温から１００Ｃ以下にて蒸着に
より金属膜を形成し、さらにその上に基板温［ｆ１１５
０℃から４００℃以下にて蒸着にニジ金属膜を形成し、
しかる後に前記ホトレジストを除去する。Means for Solving the Problems The present invention solves the above problems by depositing a metal film on a substrate on which a pattern for forming electrodes has been formed using photoresist by vapor deposition at a temperature of the substrate from room temperature to 100C or less. The substrate temperature [f115
Forming a rainbow metal film by vapor deposition at 0°C to 400°C or less,
After that, the photoresist is removed.
作用
本発明は上記した構成により、電極形成のためのパター
ンがあらかじめホ）Ｌ／シストにて形成されている基板
に、ホトレジストの耐熱温度を越えない室温から１００
℃以下の基板温度にて蒸着により金属膜を形成し、つぎ
に金属膜の抵抗が下がるように基板温度を１６０℃から
４００℃以下にして再度重ねて金属膜を蒸着することに
より、パターンの乱れがなくしかも従来より低抵抗、高
付着力の電極を実現することができる。Effect of the present invention With the above-described configuration, a pattern for forming an electrode is formed on a substrate made of L/cyst in advance, and is heated from room temperature to
A metal film is formed by vapor deposition at a substrate temperature of ℃ or less, and then the substrate temperature is lowered from 160℃ to 400℃ or less to reduce the resistance of the metal film, and the metal film is deposited again to reduce the pattern disturbance. However, it is possible to realize an electrode with lower resistance and higher adhesion than conventional electrodes.
実施例
第１図、第２図は、本発明にかかる電極の形成方法を用
いた薄膜ＩＣＬ素子の製造における一実施例を示したも
のである。本発明にかかる電極の形成方法を用いた薄膜
ＫＬ素子は以下のようにして製造される。縦１２０ＭＭ
、横２２０ｆｌ、厚さ２ｇの透明なガラス基板１上に電
子ビーム蒸着法にて厚さ３０００人のＩＴＯ膜を基板全
面に形成する。Embodiment FIGS. 1 and 2 show an embodiment of manufacturing a thin film ICL element using the electrode forming method according to the present invention. A thin film KL element using the electrode forming method according to the present invention is manufactured as follows. Height 120MM
An ITO film having a thickness of 3,000 wafers is formed on the entire surface of a transparent glass substrate 1 having a width of 220 fl and a thickness of 2 g by electron beam evaporation.
その後写真食刻法にて透明電極２をパターン形成する。Thereafter, a transparent electrode 2 is patterned by photolithography.
その上に厚さ５０００人の酸化イツトリウム膜３、厚さ
４０００人のマンガン付活硫化亜鉛膜４、厚さ５ｏｏｏ
人の酸化イツトリウム膜６の各層の膜を電子ビーム蒸着
法にて順次積層して形成する。その後ホトレジストヲ全
面に塗布し、背面電極のパターンを露光し、背面電極部
のみが酸化イツトリウム膜６に形成されるよう不要なホ
トレジストを除去してＶシスト膜ｅを形成する◇この基
板を真空蒸着装置（図面は省略）内にセットし基板温度
を室温として電子ビーム蒸着法にて第１のアルミニウム
膜７を厚さ１ｏＯＯλ形成した。On top of that is a 5,000-layer thick yttrium oxide film 3, a 4,000-layer thick manganese-activated zinc sulfide film 4, and a 5ooo-thick film.
Each layer of the human yttrium oxide film 6 is sequentially laminated by electron beam evaporation. After that, photoresist is applied to the entire surface, the back electrode pattern is exposed, and unnecessary photoresist is removed so that only the back electrode portion is formed on the yttrium oxide film 6 to form the V cyst film e.◇This substrate is vacuum evaporated. A first aluminum film 7 was formed to a thickness of 1000λ by electron beam evaporation while setting the substrate in an apparatus (not shown) and keeping the substrate temperature at room temperature.
さらにひきつづいて基板温度が２００℃になるように蒸
着面の方向よυランプで加熱を行ない電子ビーム蒸着法
にて第２のアルミニウム膜８を形成した。この後レジス
ト膜６を除去することによりアルミニウムの背面電極が
完放し、薄膜ＫＬ素子が製造された。このようにして形
成されたアルミニウムの背面電極の抵抗を基板装置室温
で同じ電子ビーム蒸着法で形成した厚さ２０００人の電
極の抵抗と比べると約半分に下がっており、しかも付着
強度も大であった。またホトレジストの乱れによる電極
のパターンの乱れもなく通常のりフトオ７の手法がその
まま使用できた。Further, the second aluminum film 8 was formed by electron beam evaporation by heating with a v lamp in the direction of the deposition surface so that the substrate temperature reached 200°C. Thereafter, by removing the resist film 6, the aluminum back electrode was completely exposed, and a thin film KL element was manufactured. The resistance of the aluminum back electrode formed in this way is about half that of a 2,000-layer thick electrode formed by the same electron beam evaporation method at room temperature on the substrate device, and the adhesive strength is also high. there were. In addition, there was no disturbance of the electrode pattern due to disturbance of the photoresist, and the method of ordinary glue Futo 7 could be used as is.
本実施例では基板を加熱するのにランプを用いて蒸着面
方向から加熱したが、これは第１のアルミニウム膜が赤
外反射膜として作用するためレジスト膜の温度上昇を押
えるためである。したがってランプ以外の熱源でも効果
は同じであるが、蒸着面の反対側から加熱を行なった場
合は若干効果は小さくなる。また電極の材料はアルミニ
ウムに限るものではないことは明らかでお夛、他にムＵ
。In this example, a lamp was used to heat the substrate from the direction of the deposition surface. This is because the first aluminum film acts as an infrared reflective film and suppresses the rise in temperature of the resist film. Therefore, although the effect is the same with heat sources other than lamps, the effect becomes slightly smaller when heating is performed from the opposite side of the vapor deposition surface. Also, it is clear that the electrode material is not limited to aluminum; there are other materials as well.
.
五ｇ 、 Ｏｒ 、 Ｎｉなどが考えられる。Possible examples include 5g, Or, Ni, etc.
第１．第２のアルミニウム膜の厚さの比もとくに限定さ
れるものではないが、第１の膜が厚い程熱しゃへいの効
果は大であ夛、第２の膜が厚い程抵抗値降下の効果は大
きい。またアルミニウムの蒸着には電子ビーム蒸着法を
用いたが、他の方法たとえば抵抗加熱法でも全く同じ効
果であることは言うまでもなく、薄膜８Ｌ素子以外の表
示素子などの電極の形成にも何らさしつかえなく使用で
きる。1st. The ratio of the thickness of the second aluminum film is not particularly limited either, but the thicker the first film is, the greater the heat shielding effect is, and the thicker the second film is, the less the effect of lowering the resistance value. big. Furthermore, although electron beam evaporation was used to deposit aluminum, it goes without saying that other methods, such as resistance heating, would have exactly the same effect, and there would be no problem in forming electrodes for display elements other than thin-film 8L elements. Can be used.
発明の効果
以上述べてきたように、本発明によれば、きわめて簡易
な構成で微細で低抵抗かつ付着強度の大きい電極を形成
することができ、実用的にきわめて有用である。Effects of the Invention As described above, according to the present invention, it is possible to form a fine electrode with a very simple structure, low resistance, and high adhesion strength, and is extremely useful in practice.
第１図は本発明の一実施例における電極の形成方法を説
明するための平面図、第２図はその人−Ｘ断面図である
。
１・・・・・・ガラス基板、２・・・・・・透明電極、
３，５・・・・・・酸化イツトリウム膜、４・・・・・
・マンガン付活硫化亜鉛膜、６・・・・・・レジスト膜
、７・・・・・・第１のアルミニウム膜、８・・・・・
・第２のアルミニウム膜。FIG. 1 is a plan view for explaining a method of forming an electrode in an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line X of the person. 1...Glass substrate, 2...Transparent electrode,
3,5...Yttrium oxide film, 4...
・Manganese-activated zinc sulfide film, 6... Resist film, 7... First aluminum film, 8...
-Second aluminum film.
Claims (2)
ジストにより形成されている基板に、基板温度が室温か
ら１００℃以下にて蒸着により金属膜を形成し、さらに
その上に基板温度を１５０℃から４００℃以下にて蒸着
により金属膜を形成し、しかるのちに前記ホトレジスト
を除去する工程を含む電極の形成方法。(1) A metal film is formed by vapor deposition at a substrate temperature of room temperature to 100°C or less on a substrate on which a pattern for electrode formation has been previously formed using photoresist, and then the substrate temperature is further increased from 150°C to 400°C. A method for forming an electrode, which includes the steps of forming a metal film by vapor deposition and then removing the photoresist.
われることを特徴とする特許請求の範囲第１項記載の電
極の形成方法。(2) The method for forming an electrode according to claim 1, wherein the heating of the substrate is performed from the direction of the vapor deposition surface of the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60082868A JPH0666155B2 (en) | 1985-04-18 | 1985-04-18 | Method of forming electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60082868A JPH0666155B2 (en) | 1985-04-18 | 1985-04-18 | Method of forming electrodes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61241925A true JPS61241925A (en) | 1986-10-28 |
| JPH0666155B2 JPH0666155B2 (en) | 1994-08-24 |
Family
ID=13786289
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60082868A Expired - Fee Related JPH0666155B2 (en) | 1985-04-18 | 1985-04-18 | Method of forming electrodes |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0666155B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0594300B1 (en) * | 1992-09-22 | 1998-07-29 | STMicroelectronics, Inc. | Method for forming a metal contact |
| JP2020072114A (en) * | 2018-10-29 | 2020-05-07 | 国立研究開発法人産業技術総合研究所 | Method of forming fine metal bump and fine metal bump |
-
1985
- 1985-04-18 JP JP60082868A patent/JPH0666155B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0594300B1 (en) * | 1992-09-22 | 1998-07-29 | STMicroelectronics, Inc. | Method for forming a metal contact |
| JP2020072114A (en) * | 2018-10-29 | 2020-05-07 | 国立研究開発法人産業技術総合研究所 | Method of forming fine metal bump and fine metal bump |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0666155B2 (en) | 1994-08-24 |
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