JPS61111215U - - Google Patents
Info
- Publication number
- JPS61111215U JPS61111215U JP19568684U JP19568684U JPS61111215U JP S61111215 U JPS61111215 U JP S61111215U JP 19568684 U JP19568684 U JP 19568684U JP 19568684 U JP19568684 U JP 19568684U JP S61111215 U JPS61111215 U JP S61111215U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- base
- ground point
- capacitor
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Amplifiers (AREA)
Description
第１図は、この考案の基本的実施例の構成を示
す回路図、第２図は、この考案の具体的実施例の
構成を示す回路図、第３図は、第２図に示す回路
各部の波形を示す波形図、第４図は、この考案の
応用的実施例の構成を示す回路図である。
１……電源入力端、Ｑ１……トランジスタ（第
１のトランジスタ）、Ｑ２……トランジスタ（第
２のトランジスタ）、Ｒ１……抵抗（第１の抵抗
）、Ｒ２……抵抗（第２の抵抗（、Ｃ１……コン
デンサ（第１のコンデンサ）、Ｃ２……コンデン
サ（第２のコンデンサ）、Ｖｃｃ……出力電圧。
Figure 1 is a circuit diagram showing the configuration of a basic embodiment of this invention, Figure 2 is a circuit diagram showing the configuration of a specific embodiment of this invention, and Figure 3 is each part of the circuit shown in Figure 2. FIG. 4 is a circuit diagram showing the configuration of an applied embodiment of this invention. 1...Power supply input terminal, Q1 ...Transistor (first transistor), Q2 ...Transistor (second transistor), R1 ... Resistor (first resistor), R2 ...Resistor (first transistor) 2 resistance (, C 1 ... capacitor (first capacitor), C 2 ... capacitor (second capacitor), Vcc ... output voltage.
Claims (1)
れる第１の抵抗および第１のコンデンサと、 この第１のコンデンサと前記第１の抵抗との接
続点の電圧がベースに印加され、コレクタが前記
電源入力端に接続され、エミツタから出力電圧が
取り出される第１のトランジスタと、 エミツタが第２のコンデンサを介して前記電源
入力端に接続されるとともに第２の抵抗を介して
接地点に接続され、コレクタが前記第１のトラン
ジスタのベースに接続され、ベースが接地点に接
続される第２のトランジスタ とを具備することを特徴とする電源制御回路。[Claims for Utility Model Registration] A first resistor and a first capacitor that are sequentially inserted in series between a power input terminal and a ground point, and a connection point between the first capacitor and the first resistor. a first transistor having a voltage applied to its base, a collector connected to the power supply input terminal, and an output voltage taken out from its emitter; a second transistor connected to a ground point through two resistors, a collector connected to the base of the first transistor, and a second transistor whose base is connected to the ground point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19568684U JPS61111215U (en) | 1984-12-24 | 1984-12-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19568684U JPS61111215U (en) | 1984-12-24 | 1984-12-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61111215U true JPS61111215U (en) | 1986-07-14 |
Family
ID=30753289
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19568684U Pending JPS61111215U (en) | 1984-12-24 | 1984-12-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61111215U (en) |
-
1984
- 1984-12-24 JP JP19568684U patent/JPS61111215U/ja active Pending
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