JPS6075109A - Output detection circuit for hall element - Google Patents
Output detection circuit for hall elementInfo
- Publication number
- JPS6075109A JPS6075109A JP18371483A JP18371483A JPS6075109A JP S6075109 A JPS6075109 A JP S6075109A JP 18371483 A JP18371483 A JP 18371483A JP 18371483 A JP18371483 A JP 18371483A JP S6075109 A JPS6075109 A JP S6075109A
- Authority
- JP
- Japan
- Prior art keywords
- hall element
- output
- output point
- differential amplifier
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
この発明はポール素子用出力検出回路に係り、特にホー
ル素子の出力検出回路のオフセントによる悪影響の防止
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an output detection circuit for a pole element, and more particularly to prevention of adverse effects due to offset in an output detection circuit for a Hall element.
第１図は従来のホール素子用出力検出回路を示している
。ホール素子２の電流端子間には電源端子４及び基準電
位点から駆動電圧Ｖｃｃを印加する。FIG. 1 shows a conventional output detection circuit for a Hall element. A driving voltage Vcc is applied between the current terminals of the Hall element 2 from the power supply terminal 4 and the reference potential point.
このホール素子２の出力は差動増幅器６に与えられ、こ
の差動増＠器６の出力・反転入力端子間には抵抗８が接
続されて帰還回路が形成されている。The output of this Hall element 2 is given to a differential amplifier 6, and a resistor 8 is connected between the output and inverting input terminal of this differential amplifier 6 to form a feedback circuit.
この差動増幅器６の出力はコンデンサ１ｏを介して比較
器１２の非反転入力端子（＋）に与えられ、この非反転
入力端子（＋）と反転大刀端子（−）とは抵抗１４を介
して共通に接続されているとともに、端子１６には共通
に一定のバイアスが与えられ、ホール出力は出力端子１
日から取出される。The output of the differential amplifier 6 is applied to the non-inverting input terminal (+) of the comparator 12 via a capacitor 1o, and the non-inverting input terminal (+) and the inverting long-terminal (-) are connected via a resistor 14. In addition to being commonly connected, a constant bias is commonly applied to the terminals 16, and the Hall output is connected to the output terminal 1.
taken out from the sun.
このようなホール素子用出力検出回路において、ホール
素子２が圧力変化に対しても作用するため、直流増幅器
で構成すると、出カオフセソトが発生するため、低電圧
下では使い難い。In such a Hall element output detection circuit, since the Hall element 2 also acts on pressure changes, if it is configured with a DC amplifier, output off-set occurs, making it difficult to use under low voltage.
また、ホール素子２を内蔵する半導体集積回路では、組
立工程において、オフセット発生防止のため、ホール素
子２のチップに対して加圧されないように配慮すること
が必要である。Further, in a semiconductor integrated circuit incorporating the Hall element 2, it is necessary to take care not to apply pressure to the chip of the Hall element 2 in order to prevent offset generation during the assembly process.
このようなオフセン１−が発生すると、増幅ゲインを高
（取ることが困難になり、ＳＮ比が悪化する欠点がある
。When such an offset 1- occurs, it becomes difficult to obtain a high amplification gain, which has the drawback of deteriorating the S/N ratio.
この発明はボール素子のオフセットによる影響を無くし
、増幅ゲインの増加を可能にするとともに構成の簡略化
を図ったホール素子用出刃検出回路の提供を目的とする
。It is an object of the present invention to provide a cutting edge detection circuit for a Hall element, which eliminates the influence of offset of the ball element, makes it possible to increase the amplification gain, and has a simplified configuration.
この発明は、ホール素子の差動出力を増幅する差動増幅
器の出力点とホール素子の非帰還側出力点とを直流的に
同電位に設定するとともに、差動増幅器の出力と前記非
帰還側出力点に発生する出力とを比較器で比較して信号
検出することを特徴とする。This invention sets the output point of a differential amplifier that amplifies the differential output of the Hall element and the non-feedback side output point of the Hall element to the same potential in terms of DC, and also sets the output point of the differential amplifier and the non-feedback side output point of the Hall element to the same potential. The feature is that the signal is detected by comparing the output generated at the output point with a comparator.
以下、この発明を図面に示した実施例を参照しして詳細
に説明する。Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.
第２図はこの発明のホール素子用出力検出回路の実施例
を示し、第１図の回路と共通部分には同一符号を付しで
ある。ホール素子２の一方の出力点と差動増幅器６の反
転入力端子（＝）との間にコンデンサ２０が設置され、
ホール素子２の他方の出力点、即ち非帰還側出力点と非
反転入力端子（→−）との間に抵抗２２が設置されてい
る。抵抗２２と帰還抵抗８とは等しい抵抗値に設定し、
差動増幅器６のバイアス電流による電位差を等しくする
。FIG. 2 shows an embodiment of an output detection circuit for a Hall element according to the present invention, and parts common to the circuit of FIG. 1 are given the same reference numerals. A capacitor 20 is installed between one output point of the Hall element 2 and the inverting input terminal (=) of the differential amplifier 6,
A resistor 22 is installed between the other output point of the Hall element 2, that is, the non-feedback side output point, and the non-inverting input terminal (→-). The resistor 22 and the feedback resistor 8 are set to the same resistance value,
The potential difference due to the bias current of the differential amplifier 6 is made equal.
また、差動増幅器６は直流全帰還増幅器とし、ホール素
子２の非帰還出力点と差動増幅器６の出力を直流的に同
電位に設定する。Further, the differential amplifier 6 is a DC full feedback amplifier, and the non-feedback output point of the Hall element 2 and the output of the differential amplifier 6 are set to the same DC potential.
そして、ホール素子２の前記非帰還出力点に発生する出
力と、差動増幅器６の増幅出力を比較器１２に与え、差
動増幅器６と比較器１２とを直流的に直結し、従来のコ
ンデンサ１０を省略する。Then, the output generated at the non-feedback output point of the Hall element 2 and the amplified output of the differential amplifier 6 are applied to the comparator 12, and the differential amplifier 6 and the comparator 12 are directly connected in a direct current manner. 10 is omitted.
このように構成すれば、差動増幅器６は交流増幅器とし
て構成される。第３図Ａにおいて、信号ＳＬをホール素
子２の非帰還出力点に発生する信号、Ｓ２を差動増幅器
６の増幅出力とすると、比較器１２はこれら両信号を比
較し、その出力は第３図Ｂに示すスイッチング信号とな
る。With this configuration, the differential amplifier 6 is configured as an AC amplifier. In FIG. 3A, if the signal SL is the signal generated at the non-feedback output point of the Hall element 2, and S2 is the amplified output of the differential amplifier 6, the comparator 12 compares these two signals, and its output is the signal generated at the non-feedback output point of the Hall element 2. The switching signal shown in Figure B is obtained.
このように出力検出回路が交流増幅器として構成される
結果、ホール素子２のオフセントによる影響を無視する
ことができるため、増幅ゲインを高く取ることができ、
ＳＮ比を改善することができる。また、結合用のコンデ
ンサが省略されるため、半導体集積化した場合、外付コ
ンデンサが削減でき、構成の簡略化を図ることができる
。さらに、比較器１２に対するバイアス回路も不要にな
り、電源のリップルの影響も回避することができ、精度
の高いホール出方を取出すことができる。As a result of the output detection circuit being configured as an AC amplifier in this way, the influence of the off-cent of the Hall element 2 can be ignored, so a high amplification gain can be achieved.
The SN ratio can be improved. Further, since a coupling capacitor is omitted, when semiconductor integration is performed, external capacitors can be reduced and the configuration can be simplified. Furthermore, a bias circuit for the comparator 12 is not required, the influence of ripples in the power supply can be avoided, and a highly accurate hole extraction method can be obtained.
第４図はこの発明のホール素子用出方検出回路の他の実
施例を示し、第２図に示すホール素子用出力検出回路と
同一部分には同一符号を付しである。この実施例は、前
記実施例の抵抗２２に代えて電源ラインと差動増幅器６
の非反転入力端子（＋）及び反転入力端子（−）との間
に定電流源２４．２６を設置し、この定電流源２４．２
６から個別に非反転入力端子（＋）及び反転入力端子（
−）に定電流ＩＢを与えるようにしたものである。この
ようにしても、Ａ、Ｂ点を直流的に同電位に設定するこ
とができ、前記実施例と同様の効果が期待できるもので
ある。FIG. 4 shows another embodiment of the output detection circuit for a Hall element according to the present invention, and the same parts as those of the output detection circuit for a Hall element shown in FIG. 2 are given the same reference numerals. In this embodiment, a power supply line and a differential amplifier 6 are used instead of the resistor 22 in the previous embodiment.
A constant current source 24.26 is installed between the non-inverting input terminal (+) and the inverting input terminal (-) of the constant current source 24.2.
6 to the non-inverting input terminal (+) and inverting input terminal (
-) is applied with a constant current IB. Even in this case, the points A and B can be set to the same DC potential, and the same effect as in the embodiment described above can be expected.
以上説明したようにこの発明によれば、ホール素子のオ
フセントによる影響を無くし、増幅ゲインの増加により
ＳＮ比を改善でき、しがも構成の簡略化を図ることがで
きる。As explained above, according to the present invention, it is possible to eliminate the influence of the offset of the Hall element, improve the SN ratio by increasing the amplification gain, and simplify the configuration.
第１図は従来のホール素子用出方検出回路を示すブロッ
ク図、第２図はこの発明のホール素子用出力検出回路の
実施例を示す回路図、第３図はその動作を示す説明図、
第４図はこの発明のボール素子用出力検出回路の他の実
施例を示す回路図である。
２・・・ホール素子、６・・・差動増幅器、１２・・・
比較器、２２・・・抵抗、２４．２６・・・定電流源。
第１図
第２図
第３図
第４図FIG. 1 is a block diagram showing a conventional output detection circuit for a Hall element, FIG. 2 is a circuit diagram showing an embodiment of the output detection circuit for a Hall element of the present invention, and FIG. 3 is an explanatory diagram showing its operation.
FIG. 4 is a circuit diagram showing another embodiment of the ball element output detection circuit of the present invention. 2... Hall element, 6... Differential amplifier, 12...
Comparator, 22...Resistor, 24.26... Constant current source. Figure 1 Figure 2 Figure 3 Figure 4
Claims (1)
ホール素子の非帰還側出力点とを直流的に同電位に設定
するとともに、差動増幅器の出力と前記非帰還側出力点
に発生する出力とを比較器で比較して信号検出すること
を特徴とするホール素子用出力検出回路。The output point of the differential amplifier that amplifies the differential output of the Hall element and the non-feedback side output point of the Hall element are set to the same DC potential, and a voltage is generated between the output of the differential amplifier and the non-feedback side output point. 1. An output detection circuit for a Hall element, which detects a signal by comparing the output with a comparator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18371483A JPS6075109A (en) | 1983-10-01 | 1983-10-01 | Output detection circuit for hall element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18371483A JPS6075109A (en) | 1983-10-01 | 1983-10-01 | Output detection circuit for hall element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6075109A true JPS6075109A (en) | 1985-04-27 |
| JPH0325045B2 JPH0325045B2 (en) | 1991-04-04 |
Family
ID=16140668
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18371483A Granted JPS6075109A (en) | 1983-10-01 | 1983-10-01 | Output detection circuit for hall element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6075109A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI627429B (en) * | 2017-08-21 | 2018-06-21 | 茂達電子股份有限公司 | Error elimination amplifier circuit and motor control circuit |
-
1983
- 1983-10-01 JP JP18371483A patent/JPS6075109A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0325045B2 (en) | 1991-04-04 |
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