JPS6055634A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

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Publication number
JPS6055634A
JPS6055634A JP58164482A JP16448283A JPS6055634A JP S6055634 A JPS6055634 A JP S6055634A JP 58164482 A JP58164482 A JP 58164482A JP 16448283 A JP16448283 A JP 16448283A JP S6055634 A JPS6055634 A JP S6055634A
Authority
JP
Japan
Prior art keywords
film
pad
conductive film
oxide film
fine wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58164482A
Other languages
English (en)
Inventor
Takashi Okuda
高 奥田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58164482A priority Critical patent/JPS6055634A/ja
Publication of JPS6055634A publication Critical patent/JPS6055634A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05558—Shape in side view conformal layer on a patterned surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4807—Shape of bonding interfaces, e.g. interlocking features
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
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    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
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    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は半導体集積回路装置に関し、特に耐湿性を向上
させた構造を有する半導体集積回路装置に関する。
〔従来技術〕
半導体集積回路装置（以下ＩＣと記す）のパッケージン
グにはメタル・ガラスを封止材料とする気密封止と樹脂
を用いる非気密封止とがある。
樹脂封止は安価で多量生産が可能なことから多くのＩＣ
に用いられているが耐湿性に問題がある。
例えば、熱的環境試験終了後のＩＣを８５０°Ｃ／８５
％ＲＨ、バイアス印加の条件で試験を行うと第１図に示
す曲線（イ）のような結果が得られる。すなわち、試験
開始後約３００時間で大部分のＩＣが不良となる。不良
は断線不良が主であり、その原因は金属細線がボンディ
ングされているｋｌパッドが腐食してなくなシ、内部回
路との接続が不能になるためである。従来のＭＯＳ　Ｉ
Ｃの金属パッド近傍の構造は一般に第２図（ａ）　、　
（ｂ）に示す平面図及びＡ−Ａ’断面図になっている。
すなわち、例えばＰ型半導体基板１上にフィールド酸化
膜２を所定の間隔を保持して形成したのち半導体素子等
から内部回路（図示せず）への接続用配線としてのＮ型
拡散層３を形成する。Ｎ型拡散層３はその上部の酸化膜
にあけられた開孔部９を通してｉ配線４とオーミックに
接続している。Ａｌ配線４はＡ７パツド４′と一体に形
成されておシ、とのＡｌパッドにボンディングされる金
属細線７にょシ外部と接続されている。なお５は保護用
酸化膜であり、第１図（ａ）の平面図においては内部を
明確に示すために省略し、である。
上記のような構造を有する樹脂封止されたＩＣにおいて
は、樹脂を通して浸入した水分によりＭパッドの露出部
８が腐食されるといの欠点がある。
腐食の原因としては電池作用によるｋｌのマイグレーシ
ラン、又は浸入した水分がＩＣ内部のリンと反応してリ
ン酸を形成し、このリン酸がＡｌパッドを溶解するもの
等と省えられている。すなわち、耐湿性試験で不良とな
ったＩＣのＡｌパッドは金属細線７の接合部６の周囲で
溶けてなくなっているのが観察される。
〔発明の目的〕
本発明の目的は、上記欠点をカバーし、金属細線と内部
回路との断線を防止する配線構造を有する半導体集積回
路装置を提供することにある。
〔発明の構成〕
本発明の半導体集積回路装置は、半導体基板上に形成さ
れた酸化膜と、該酸化膜上に形成された第１の導電性膜
と、該第１の導電性膜上に絶縁膜を介して形成されかつ
該絶縁膜を貫通して前記第１の導電性膜と少くとも２箇
所で接続する第２の導電性膜と、前記第１の導電性膜と
の接続箇所のうちの一つの前記第２の導電性膜上にボン
ディングされた金属細線とを含んで構成される。
〔実施例の説明〕
次に本発明の実施例を図面を用いて詳細に説明するＯ 第３図（ａ）　、　（ｔ））は本発明の一実施例の平面
図及びＢ−Ｂ’断面図である。
第３図（ａ）　、　（ｂ）に示すように、半導体基板１
上に形成されたフィールド酸化膜２上には第１の導電性
膜としてのポリシリコン膜１１が形成されている。この
ポリシリコン膜１１上には絶縁用酸化膜１０を介して第
２の導電性膜としてのＡｌ配線４とＡｌパッド４′とが
一体に形成されておシ、このポリシリコン膜１１は開孔
部１２　、１２’でＡｌパッド４′とＡｌ配線４とに接
続している。そしてＡＪパッド４′上には金属細線７が
ボンディングされ接続部６を形成している。ｉパッド４
′の一辺Ａは約１１０μｍであり、このうち保護用酸化
膜５から露出しているＡｌパッドの一辺Ｂは約１００μ
ｍである。ボンディングされる金属細線７の接続部６の
直径を約７０μｍとすると、保護用酸化膜５とを接続部
６とに覆われていないＡｌパッドの露出部８は１５μｍ
以上の幅で形成されることになる。
このように構成されたＩＣにおいては一水分とリンとで
生成されたリン酸によシＡｌパッド４′の露出部８が腐
食されたとしても、金属細線７の接続部６の中心下面に
接するＡｌパッド部は腐食されないでポリシリコン膜１
１と接続を保っている。
ポリシリコン膜１１は更に絶縁用酸化膜１０の開孔部１
２′でＡｌ配線４と接続しており、従って金属細線７は
このポリシリコン膜１１及びＡｌ配線４とを通して内部
回路へ接続するＮ型拡散層３と５− 接続しておシ断線となることばない。
本発明を適用したＩＣ１ｌＪＬ／’て従来のＩＣと同一
条件で耐湿性試験を行った結果は第１図の曲線（ロ）に
示すとおりとなった。すなわち８００時間経過してよう
やく不良が発生したが、不良率は極めて低いものであシ
、しかも不良の中でＡＡパッド部の断線不良の占る割合
は５０％以下であった。
〔発明の効果〕
以上詳細に説明したように、本発明によれば、ボンディ
ングされた金属細線の接続部周囲の金属パッドが腐食さ
れた場合でも、金ｒ１細線と内部の配線間の接続が保た
れる構造を有する信頼性の茜い半導体集積回路装置が得
られるのでその効果は大きい。
【図面の簡単な説明】 第１図は耐湿性試験時間と不良率との関係を示す図、第
２図（ａ）　、　（ｂ）は従来のＭＯ８ＩＣ１７）平面
図及び断面図、第３図＜８）　、　（ｔ）３は本発明の
一実施例の平面図である。 −〇− １・・・・・・半導体基板、２・・・・・・フィールド
［化膜、３・・・・・・Ｎ型拡散層、４・・・・・・Ａ
ｌ配線、４′・・・・・・Ａｌパッド、５・・・・・・
保護用酸化膜、６・・・・・・接続部、７・・・・・・
金属＋Ｙ４Ｉｌ線、９・・・・・・開孔部、１０・・・
・・・絶縁用酸化膜、１１・・・・・・ポリシリコン膜
、１２，１２’・・・・・・開孔部。 ７− Ｚ　ｌ　図 仏、駐吟開（Ｈ） Ｎ　＼

Claims (1)

    【特許請求の範囲】
  1. 半導体基板上に形成された酸化膜と、該酸化膜上に形成
    された第１の導電性膜と、該第１の導電性膜上に絶縁膜
    を介して形成されかつ該絶縁膜を貫通して前記第１の導
    電性膜と少くとも２箇所で接続する第２の導電性膜と、
    前記第１の導電性膜との接続箇所のうちの一つの前記第
    ２の導電性膜上にボンディングされた金属細線とを含む
    ことをａｌｌとする半導体集積回路装置。
JP58164482A 1983-09-07 1983-09-07 半導体集積回路装置 Pending JPS6055634A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58164482A JPS6055634A (ja) 1983-09-07 1983-09-07 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58164482A JPS6055634A (ja) 1983-09-07 1983-09-07 半導体集積回路装置

Publications (1)

Publication Number Publication Date
JPS6055634A true JPS6055634A (ja) 1985-03-30

Family

ID=15794006

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58164482A Pending JPS6055634A (ja) 1983-09-07 1983-09-07 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS6055634A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100734250B1 (ko) * 2001-01-09 2007-07-02 삼성전자주식회사 단차를 구비하는 반도체 장치의 본딩 패드 및 이를제조하는 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100734250B1 (ko) * 2001-01-09 2007-07-02 삼성전자주식회사 단차를 구비하는 반도체 장치의 본딩 패드 및 이를제조하는 방법

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