JPS6047452A - Manufacture of au bonding pad - Google Patents

Manufacture of au bonding pad

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Publication number
JPS6047452A
JPS6047452A JP15666083A JP15666083A JPS6047452A JP S6047452 A JPS6047452 A JP S6047452A JP 15666083 A JP15666083 A JP 15666083A JP 15666083 A JP15666083 A JP 15666083A JP S6047452 A JPS6047452 A JP S6047452A
Authority
JP
Japan
Prior art keywords
layer
substrate
film
heat treatment
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15666083A
Other languages
Japanese (ja)
Inventor
Kunio Ookawa
大川　訓生
Taku Noguchi
卓 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15666083A priority Critical patent/JPS6047452A/en
Publication of JPS6047452A publication Critical patent/JPS6047452A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05157—Cobalt [Co] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05179—Niobium [Nb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01041—Niobium [Nb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain an Au film having strong adhesive force on a substrate without heat treatment on the formation of the film or after it by forming an Nb film on the substrate and overlapping a Cr film and the Au film. CONSTITUTION:An Nb film 4 in 150-3,000Angstrom thickness is evaporated onto an Si or SiO2 substrate 1 at room temperature, and a Cr film 2 in approximately 600Angstrom thickness and an Au film 3 in approximately 3,000Angstrom thickness are evaporated similarly at room temperature. Since the diffusion force of Nb is strong and bonding power between Cr and Au is powerful, Nb easily diffuses to the substrate and Cr and Cr to Nb and Au without heat treatment on the formation of the Nb, Cr and Au films or after the formation of the Cr and Au films and these films and the substrate are mutually attached firmly, Au strongly adheres on the substrate, and the adhesive force of Au is excellent. An Au junction pad having strong adhesive force can also be formed similarly on a GaAs substrate, and the manufacture can be utilized when the Au layer having powerful adhesive force is shaped on not only a pad but also the substrate without heat treatment.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、Ａｕポンプイングツ（ラド全加熱処理音節
さないでも製造できるＡｕポンプイングツ（ラドの製造
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for producing Au pumpings (RAD) which can be produced without the need for complete heat treatment.

〔従来技術〕[Prior art]

第１図は従来の製法によるＡｕポンプイングツくラドを
示す断面図であり、図において、（１）は８１基板、（
２１１″ｔこの基板上に真空蒸着法によって成膜された
Ｃｒ層、（３）はこの０１層上に真空蒸着法に工つて成
膜されたＡｕ層である。Ａｕ　Ｎ　（３１０基板ｔｌｌ
への付着力全強化するために、Ｃｒ層（２１、Ａｕ層（
３）の成膜時に基板ｆｉｌ　ｋ約２００℃に加熱して行
なうか、あるい１ｊＯｒ層とＡｕ層（３）の成膜後約２
５０’Ｃで２時間程度加熱してＣｒ層（２）全基板ｉｌ
ｌとＡｕ層（３）に拡散させている。FIG. 1 is a cross-sectional view showing an Au pumping pad made by a conventional manufacturing method. In the figure, (1) is an 81 substrate,
211''t Cr layer formed on this substrate by vacuum evaporation method, (3) is Au layer formed on this 01 layer by vacuum evaporation method. Au N (310 substrate tll
In order to fully strengthen the adhesion to the Cr layer (21) and the Au layer (
The substrate film is heated to approximately 200°C during the film formation of step 3), or the substrate film is heated to approximately 200°C after the film formation of the 1jOr layer and the Au layer (3).
Heat at 50'C for about 2 hours to form a Cr layer (2) on the entire substrate.
1 and is diffused into the Au layer (3).

従来の製法にＬるＡｕポンディングパッドに上記のよう
に構成され、Ｃｒ層（２）全基板ｉｌｌ　＋　Ａｕ　Ｊ
＠　［３）にそれぞれ拡散させることにより、基板ｉｌ
ｌとＣｒ層（２）の付着力およびＣｒ層（２）とＡｕ層
（３）の付着力全強化している。その結果、Ａｕ層ｉ３
１　Ｌｄ　Ｃｒ層（２）？介して基板ｆｌｌへ強く・付
着している。The conventional manufacturing method consists of an Au bonding pad as described above, and a Cr layer (2) on the whole substrate ill + Au J
@[3] By diffusing each of the
The adhesion force between L and Cr layer (2) and the adhesion force between Cr layer (2) and Au layer (3) are fully strengthened. As a result, Au layer i3
1 Ld Cr layer (2)? It strongly adheres to the substrate flll through the film.

従来の製法によるＡｕポンディングパッドは以上のよう
に構成されており、単に室温で基板ｆｉｌ上にＣｒ層（
２１、Ａｕ層（３）構成１漢したたけでｆ′ｉＡｕポン
ディングパッドは容易に基板＋Ｉ＋からけ〈離してしま
う。基板（１）への十分な付着力を得る１こめには、Ｃ
ｒ層（２１、Ａｕ層（３）の成膜時に基板ｉｌｌ　’ｅ
約２００’Ｃに加熱するか、あるいは、Ａｕ層（３）の
成膜後に約２５０゜Ｃで加熱処理することが必要であり
、高温で不安定な物質が加熱時に基板上に存在する場合
にげそれぞれが変質してしまうという欠点があつ１こ。The Au bonding pad manufactured by the conventional method is constructed as described above, and simply forms a Cr layer (
21. Au layer (3) configuration 1 After the formation of the Au bonding pad, the f′i Au bonding pad easily separates from the substrate +I+. To obtain sufficient adhesion to the substrate (1), C
When forming the r layer (21, Au layer (3))
It is necessary to heat the substrate to about 200°C, or heat it to about 250°C after forming the Au layer (3), and if there are substances that are unstable at high temperatures on the substrate during heating. The only drawback is that each part changes in quality.

〔発明の概要〕[Summary of the invention]

この発明は上記のような従来の製法によるものの欠点全
除去するためになされたもので、基板上にＮｂＮ１１ｋ
成膜する工程、このＮｂ層上にＣｒＮを成膜する工程、
及びこのＣｒ層上にＡｕ層を成膜する工程？施すことに
エリ、成膜時の基板加熱や成膜後の加熱処理？行なわな
いでも製造でき、基板への付着力が従来と変わらないＡ
ｕポンディングパッドの製法を提供しようとするもので
ある。This invention was made in order to eliminate all the drawbacks of the conventional manufacturing method as described above.
a step of forming a film, a step of forming a CrN film on this Nb layer,
And the step of forming an Au layer on this Cr layer? What about heating the substrate during film formation or heat treatment after film formation? A that can be manufactured without any additional steps, and the adhesion to the substrate is the same as before.
The present invention aims to provide a method for manufacturing a U-bonding pad.

〔発明の実施例〕 第２図はこの発明の一実施例で得られたポンディングパ
ッドを示す断面であり、ｉｌｌ　ｉｊ　ｓ１又１ｊｓｉ
ｏｓ＋基板、（４）ハこの基板ｉｌｌ上に室温で真空蒸
着又はスパッタリングで成膜されｆＣＮｂ層で膜厚け１
５０Ａ〜３０００Ａ程度で、例えば１５０人である。（
２）はこのＮｔ）層（４）の上に室温で真空蒸着又はス
パッタリングで成膜されたＣｒ層で膜厚は例えば６０Ａ
である。（３）はこのＣｒ層（２）上に室温で真空蒸着
で成膜さｔまたＡｕ層で膜層は例えば３５０ＯＡである
。[Embodiment of the Invention] FIG. 2 is a cross section showing a bonding pad obtained in an embodiment of the present invention.
os+ substrate, (4) fCNb layer is formed on this substrate ill by vacuum evaporation or sputtering at room temperature and has a thickness of 1
It is about 50A to 3000A, and for example, 150 people. (
2) is a Cr layer formed on this Nt layer (4) by vacuum deposition or sputtering at room temperature, and the film thickness is, for example, 60A.
It is. (3) is an Au layer formed on the Cr layer (2) by vacuum evaporation at room temperature, and has a thickness of, for example, 350 OA.

このように加熱処理をしないでも、Ｎｌ）層（４）は基
板ｉｌｌとＣｒ層（２）へ拡散し、かつＣｒ層（２）は
Ａｕ層（３）とＮｂ層へ拡散している。これは、Ｎｂ層
が拡散力が強く、さらにＯｒとＡｕとの結合力が強いた
めと思われる。しかし、加熱処理をすれば、Ｎｂ層の拡
散力がより強くなるので、実施は可能である。Even without heat treatment, the Nl layer (4) diffuses into the substrate ill and the Cr layer (2), and the Cr layer (2) diffuses into the Au layer (3) and the Nb layer. This seems to be because the Nb layer has a strong diffusion force and also because the bonding force between Or and Au is strong. However, if heat treatment is performed, the diffusion power of the Nb layer will become stronger, so implementation is possible.

上記のような製法により構成さねｔｃＡｕポンディング
パッドにおいては、Ｎｌ）層ｉ４１　、　Ｏｒ　ｌ脅１
２１　、　Ａｕ層（３）の成膜時に行なう基板加熱や０
１層とＡｕ層の成膜後に行なう加熱処理を行なわなくて
も、Ｎｂ層（４）ハ基板ｆｔｉとＣｒ層（２）へ、Ｃｒ
層（２）はＮｂ層（４）とＡｕ層（３）へ容易に拡散し
、隣同志が互いに強く付着し合っている。この結果、Ａ
ｕ層（３）ケ基板ｉ１１に強く付着している。この付着
力は従来の製法によるものと同程度、むしろそれ以上で
ある。In the tcAu bonding pad constructed by the above-mentioned manufacturing method, the Nl) layer i41, Or l layer 1
21. Substrate heating and zero temperature during the deposition of the Au layer (3)
The Nb layer (4) is transferred to the substrate fti and the Cr layer (2) without the heat treatment that is performed after forming the first layer and the Au layer.
Layer (2) easily diffuses into Nb layer (4) and Au layer (3), and the neighbors are strongly adhered to each other. As a result, A
The u layer (3) is strongly attached to the substrate i11. This adhesion force is comparable to, or even greater than, that achieved by conventional manufacturing methods.

基板（１）とＮｌ）層（４）との間に基板＋１１　ｋ構
成する材質の薄い自然酸化膜層が存在し、Ｎｌ１層（４
）とＣｒ層（２）との間ＶＣＮｂの薄い自然酸化膜層が
存在し、さらＶＣＯｒ層（２）とＡｕ層（３）の間にｃ
ｒの薄い自然酸化膜層が存在するが、これら自然酸化膜
層が存在しても付着力の十分強いポンディングパッドが
得られる。Between the substrate (1) and the Nl layer (4), there is a thin natural oxide film layer of the material that constitutes the substrate +11k, and the Nl layer (4)
) and the Cr layer (2), there is a thin natural oxide layer of VCNb between the VCOr layer (2) and the Au layer (3).
Although there is a thin natural oxide film layer of r, a bonding pad with sufficiently strong adhesion can be obtained even with the presence of these natural oxide film layers.

上記の例でに、基板をＳｉ又はＳｉｎｇとしたが、Ｇａ
Ａｓなどの半導体基板でも同様に付着力が強いＡｕポン
ディングパッド全製造できる。In the above example, the substrate was made of Si or Sing, but Ga
Similarly, all Au bonding pads with strong adhesion can be manufactured on semiconductor substrates such as As.

ところで上記説明では、この発＃′ｆ！：Ａｕポンディ
ングパッドの基板への付着力強化のために利用する場合
について述べたが、参考としてＡｕポンディングパッド
に限らず、基板上に付着力の強いＡｕ層全全加熱処理ぜ
すに形成する場合にも利用できることはいうまでもない
。By the way, in the above explanation, this issue #'f! : We have described the case where the Au bonding pad is used to strengthen the adhesion to the substrate, but as a reference, it can be used not only for the Au bonding pad but also for forming all the Au layers with strong adhesion on the substrate after complete heat treatment. Needless to say, it can also be used when

〔発明の効果〕〔Effect of the invention〕

以上のように、この発１刃によれば、基板上にＮｂ層を
成膜する工程、このＮｂ層上Ｋｃｒ層を成膜する工程、
及びこのｃｒＩ？Ｉｉ上にＡｕ層全全成膜る工程を施し
たので、成膜時の基板加熱や成膜後の加熱処理を行なわ
ないでも製造でき、基板への付着力が従来と変わらない
Ａｕポンディングパッドが得られるという効果がある。As described above, according to this first blade, a step of forming an Nb layer on a substrate, a step of forming a Kcr layer on this Nb layer,
and this crI? Since the entire Au layer is formed on Ii, it can be manufactured without heating the substrate during film formation or heat treatment after film formation, and the Au bonding pad has the same adhesion to the substrate as before. This has the effect that it can be obtained.

なお、加熱処理を行なえば、Ｎｂ層の拡散力がエリ強く
なる効果がある。Note that heat treatment has the effect of significantly increasing the diffusion power of the Nb layer.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の製法によるＡｕポンディングパッド全示
す断面図、第２図はこの発明のＡｕポンディングパッド
の製造方法の一実施例に工す製造されたもの全示す断面
図である。 図において、ｉｌｌは基板、ｉ２１１ｔ’ｌ　Ｃｒ層、
ｔ３１　ｉｊ　Ａｕ層、（４）はＮｌ）層である。 なお、各図中同一符号に同一また汀相当部分金示すもの
とする。 代理人　大岩増雄 第１図 第２図 手続補正書（自発） １、事件の表示　特願昭５８−１５６６６０号２、発明
の名称 Ａｕポンディングパッドの製造方法 ３、補正をする者 代表省片山仁へ部 ５、　補正の対象 明細４の発明の詳細な説明の桐。 ６、補正の内容 （１）　明細引の第２頁第４行に「Ｃｒ層」とあるのを
「Ｃｒ層（２）」　と訂正する。 （２）　同第８頁第１９行に［６０ＡＪ　とあるのを「
６００人」とＪ］正する。 （３）　同第４頁第１行に「膜層」とあるのを「膜厚」
と訂正する。 （４）　同第４頁第４行に「Ｎｂ層へ」とあるのをｒＮ
ｂ層（４）へ」と訂正する。 （５）　同第６頁第１行にｒＮｂ層の拡散力が」とある
のを「ＡｕＪｇ！の基板への付着力が」と訂正する。 以　上FIG. 1 is a sectional view showing the entirety of an Au bonding pad according to a conventional manufacturing method, and FIG. 2 is a sectional view showing the entirety of an Au bonding pad manufactured using an embodiment of the method for manufacturing an Au bonding pad of the present invention. In the figure, ill is the substrate, i211t'l Cr layer,
t31 ij Au layer, (4) is Nl) layer. In addition, the same reference numerals in each figure indicate the same or equivalent parts. Agent Masuo Oiwa Figure 1 Figure 2 Procedural amendment (voluntary) 1. Indication of the case Japanese Patent Application No. 156660/1982 2. Name of the invention Method for manufacturing Au bonding pads 3. Person making the amendment Representative Hitoshi Katayama Part 5: Detailed explanation of the invention of Specification 4 subject to amendment. 6. Contents of the amendment (1) In the fourth line of the second page of the detailed statement, "Cr layer" is corrected to "Cr layer (2)." (2) On page 8, line 19, replace [60AJ with “
600 people,” J] corrected. (3) In the first line of page 4, "film layer" is replaced with "film thickness."
I am corrected. (4) In the 4th line of the 4th page of the same page, change the word ``to the Nb layer'' to rN.
"To layer B (4)". (5) In the first line of page 6, the phrase ``The diffusion force of the rNb layer'' is corrected to ``The adhesion force of AuJg! to the substrate''. that's all

Claims (1)

【特許請求の範囲】 ＋１＋　基板上にＮｂ１ｉｉｋ成膜する工程、このＩＪ
ｂ層上１ｃＯｒ層？成膜する工程、及びこの０１層上に
Ａｕ層層成成膜る工程を施すＡｕポンプイングツくラド
の製造方法。 （２）　基板は半導体である特許請求の範囲第１項記載
のＡｕポンプイングツくラドの製造方法。[Claims] +1+ A process of forming a Nb1iik film on a substrate, this IJ
1cOr layer above the b layer? A method for manufacturing an Au pumping layer, which includes a step of forming a film, and a step of forming an Au layer on the 01 layer. (2) A method for manufacturing an Au pumping layer according to claim 1, wherein the substrate is a semiconductor.
JP15666083A 1983-08-25 1983-08-25 Manufacture of au bonding pad Pending JPS6047452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15666083A JPS6047452A (en) 1983-08-25 1983-08-25 Manufacture of au bonding pad

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15666083A JPS6047452A (en) 1983-08-25 1983-08-25 Manufacture of au bonding pad

Publications (1)

Publication Number Publication Date
JPS6047452A true JPS6047452A (en) 1985-03-14

Family

ID=15632508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15666083A Pending JPS6047452A (en) 1983-08-25 1983-08-25 Manufacture of au bonding pad

Country Status (1)

Country Link
JP (1) JPS6047452A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6445039A (en) * 1987-08-13 1989-02-17 Sony Corp Manufacture of electron tube cathode device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6445039A (en) * 1987-08-13 1989-02-17 Sony Corp Manufacture of electron tube cathode device

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